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jeremybenn |
/* Intel 387 floating point stuff.
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Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
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2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "doublest.h"
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#include "floatformat.h"
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#include "frame.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "language.h"
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#include "regcache.h"
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#include "value.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "i386-tdep.h"
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#include "i387-tdep.h"
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/* Print the floating point number specified by RAW. */
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static void
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print_i387_value (const gdb_byte *raw, struct ui_file *file)
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{
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DOUBLEST value;
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/* Using extract_typed_floating here might affect the representation
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of certain numbers such as NaNs, even if GDB is running natively.
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This is fine since our caller already detects such special
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numbers and we print the hexadecimal representation anyway. */
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value = extract_typed_floating (raw, builtin_type_i387_ext);
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/* We try to print 19 digits. The last digit may or may not contain
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garbage, but we'd better print one too many. We need enough room
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to print the value, 1 position for the sign, 1 for the decimal
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point, 19 for the digits and 6 for the exponent adds up to 27. */
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#ifdef PRINTF_HAS_LONG_DOUBLE
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fprintf_filtered (file, " %-+27.19Lg", (long double) value);
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#else
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fprintf_filtered (file, " %-+27.19g", (double) value);
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#endif
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}
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/* Print the classification for the register contents RAW. */
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static void
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print_i387_ext (const gdb_byte *raw, struct ui_file *file)
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{
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int sign;
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int integer;
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unsigned int exponent;
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unsigned long fraction[2];
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sign = raw[9] & 0x80;
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integer = raw[7] & 0x80;
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exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
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fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
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fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
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| (raw[5] << 8) | raw[4]);
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if (exponent == 0x7fff && integer)
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{
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if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
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/* Infinity. */
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fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
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else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
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/* Real Indefinite (QNaN). */
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fputs_unfiltered (" Real Indefinite (QNaN)", file);
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else if (fraction[1] & 0x40000000)
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/* QNaN. */
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fputs_filtered (" QNaN", file);
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else
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/* SNaN. */
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fputs_filtered (" SNaN", file);
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}
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else if (exponent < 0x7fff && exponent > 0x0000 && integer)
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/* Normal. */
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print_i387_value (raw, file);
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else if (exponent == 0x0000)
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{
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/* Denormal or zero. */
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print_i387_value (raw, file);
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if (integer)
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/* Pseudo-denormal. */
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fputs_filtered (" Pseudo-denormal", file);
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else if (fraction[0] || fraction[1])
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/* Denormal. */
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fputs_filtered (" Denormal", file);
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}
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else
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/* Unsupported. */
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fputs_filtered (" Unsupported", file);
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}
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/* Print the status word STATUS. */
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static void
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print_i387_status_word (unsigned int status, struct ui_file *file)
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{
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fprintf_filtered (file, "Status Word: %s",
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hex_string_custom (status, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
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fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
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fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
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fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
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fputs_filtered ("\n", file);
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fprintf_filtered (file,
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" TOP: %d\n", ((status >> 11) & 7));
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}
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/* Print the control word CONTROL. */
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static void
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print_i387_control_word (unsigned int control, struct ui_file *file)
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{
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fprintf_filtered (file, "Control Word: %s",
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hex_string_custom (control, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
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fputs_filtered ("\n", file);
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fputs_filtered (" PC: ", file);
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switch ((control >> 8) & 3)
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{
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case 0:
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fputs_filtered ("Single Precision (24-bits)\n", file);
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break;
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case 1:
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fputs_filtered ("Reserved\n", file);
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break;
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case 2:
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fputs_filtered ("Double Precision (53-bits)\n", file);
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break;
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case 3:
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fputs_filtered ("Extended Precision (64-bits)\n", file);
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break;
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}
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fputs_filtered (" RC: ", file);
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switch ((control >> 10) & 3)
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{
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case 0:
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fputs_filtered ("Round to nearest\n", file);
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break;
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case 1:
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fputs_filtered ("Round down\n", file);
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break;
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case 2:
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fputs_filtered ("Round up\n", file);
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break;
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case 3:
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fputs_filtered ("Round toward zero\n", file);
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break;
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}
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}
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/* Print out the i387 floating point state. Note that we ignore FRAME
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in the code below. That's OK since floating-point registers are
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never saved on the stack. */
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void
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i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
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struct frame_info *frame, const char *args)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
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gdb_byte buf[4];
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ULONGEST fctrl;
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ULONGEST fstat;
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ULONGEST ftag;
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ULONGEST fiseg;
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ULONGEST fioff;
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ULONGEST foseg;
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ULONGEST fooff;
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ULONGEST fop;
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int fpreg;
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int top;
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gdb_assert (gdbarch == get_frame_arch (frame));
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/* Define I387_ST0_REGNUM such that we use the proper definitions
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for FRAME's architecture. */
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#define I387_ST0_REGNUM tdep->st0_regnum
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fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM);
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fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM);
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ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM);
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fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM);
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fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM);
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foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM);
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fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM);
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fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM);
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top = ((fstat >> 11) & 7);
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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gdb_byte raw[I386_MAX_REGISTER_SIZE];
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int tag = (ftag >> (fpreg * 2)) & 3;
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int i;
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fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
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switch (tag)
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{
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case 0:
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fputs_filtered ("Valid ", file);
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break;
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case 1:
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fputs_filtered ("Zero ", file);
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break;
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case 2:
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fputs_filtered ("Special ", file);
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break;
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case 3:
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fputs_filtered ("Empty ", file);
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break;
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}
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get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM, raw);
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fputs_filtered ("0x", file);
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for (i = 9; i >= 0; i--)
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fprintf_filtered (file, "%02x", raw[i]);
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if (tag != 3)
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print_i387_ext (raw, file);
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fputs_filtered ("\n", file);
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}
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fputs_filtered ("\n", file);
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print_i387_status_word (fstat, file);
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print_i387_control_word (fctrl, file);
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273 |
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fprintf_filtered (file, "Tag Word: %s\n",
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hex_string_custom (ftag, 4));
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fprintf_filtered (file, "Instruction Pointer: %s:",
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276 |
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hex_string_custom (fiseg, 2));
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fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8));
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278 |
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fprintf_filtered (file, "Operand Pointer: %s:",
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279 |
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hex_string_custom (foseg, 2));
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280 |
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fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
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281 |
|
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fprintf_filtered (file, "Opcode: %s\n",
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282 |
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hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
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283 |
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|
284 |
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#undef I387_ST0_REGNUM
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285 |
|
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}
|
286 |
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|
287 |
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|
288 |
|
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/* Return nonzero if a value of type TYPE stored in register REGNUM
|
289 |
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needs any special handling. */
|
290 |
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|
291 |
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int
|
292 |
|
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i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
|
293 |
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{
|
294 |
|
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if (i386_fp_regnum_p (regnum))
|
295 |
|
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{
|
296 |
|
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/* Floating point registers must be converted unless we are
|
297 |
|
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accessing them in their hardware type. */
|
298 |
|
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if (type == builtin_type_i387_ext)
|
299 |
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return 0;
|
300 |
|
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else
|
301 |
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return 1;
|
302 |
|
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}
|
303 |
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|
304 |
|
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return 0;
|
305 |
|
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}
|
306 |
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|
307 |
|
|
/* Read a value of type TYPE from register REGNUM in frame FRAME, and
|
308 |
|
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return its contents in TO. */
|
309 |
|
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|
310 |
|
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void
|
311 |
|
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i387_register_to_value (struct frame_info *frame, int regnum,
|
312 |
|
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struct type *type, gdb_byte *to)
|
313 |
|
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{
|
314 |
|
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gdb_byte from[I386_MAX_REGISTER_SIZE];
|
315 |
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|
316 |
|
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gdb_assert (i386_fp_regnum_p (regnum));
|
317 |
|
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|
318 |
|
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/* We only support floating-point values. */
|
319 |
|
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if (TYPE_CODE (type) != TYPE_CODE_FLT)
|
320 |
|
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{
|
321 |
|
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warning (_("Cannot convert floating-point register value "
|
322 |
|
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"to non-floating-point type."));
|
323 |
|
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return;
|
324 |
|
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}
|
325 |
|
|
|
326 |
|
|
/* Convert to TYPE. */
|
327 |
|
|
get_frame_register (frame, regnum, from);
|
328 |
|
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convert_typed_floating (from, builtin_type_i387_ext, to, type);
|
329 |
|
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}
|
330 |
|
|
|
331 |
|
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/* Write the contents FROM of a value of type TYPE into register
|
332 |
|
|
REGNUM in frame FRAME. */
|
333 |
|
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|
334 |
|
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void
|
335 |
|
|
i387_value_to_register (struct frame_info *frame, int regnum,
|
336 |
|
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struct type *type, const gdb_byte *from)
|
337 |
|
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{
|
338 |
|
|
gdb_byte to[I386_MAX_REGISTER_SIZE];
|
339 |
|
|
|
340 |
|
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gdb_assert (i386_fp_regnum_p (regnum));
|
341 |
|
|
|
342 |
|
|
/* We only support floating-point values. */
|
343 |
|
|
if (TYPE_CODE (type) != TYPE_CODE_FLT)
|
344 |
|
|
{
|
345 |
|
|
warning (_("Cannot convert non-floating-point type "
|
346 |
|
|
"to floating-point register value."));
|
347 |
|
|
return;
|
348 |
|
|
}
|
349 |
|
|
|
350 |
|
|
/* Convert from TYPE. */
|
351 |
|
|
convert_typed_floating (from, type, to, builtin_type_i387_ext);
|
352 |
|
|
put_frame_register (frame, regnum, to);
|
353 |
|
|
}
|
354 |
|
|
|
355 |
|
|
|
356 |
|
|
/* Handle FSAVE and FXSAVE formats. */
|
357 |
|
|
|
358 |
|
|
/* At fsave_offset[REGNUM] you'll find the offset to the location in
|
359 |
|
|
the data structure used by the "fsave" instruction where GDB
|
360 |
|
|
register REGNUM is stored. */
|
361 |
|
|
|
362 |
|
|
static int fsave_offset[] =
|
363 |
|
|
{
|
364 |
|
|
28 + 0 * 10, /* %st(0) ... */
|
365 |
|
|
28 + 1 * 10,
|
366 |
|
|
28 + 2 * 10,
|
367 |
|
|
28 + 3 * 10,
|
368 |
|
|
28 + 4 * 10,
|
369 |
|
|
28 + 5 * 10,
|
370 |
|
|
28 + 6 * 10,
|
371 |
|
|
28 + 7 * 10, /* ... %st(7). */
|
372 |
|
|
0, /* `fctrl' (16 bits). */
|
373 |
|
|
4, /* `fstat' (16 bits). */
|
374 |
|
|
8, /* `ftag' (16 bits). */
|
375 |
|
|
16, /* `fiseg' (16 bits). */
|
376 |
|
|
12, /* `fioff'. */
|
377 |
|
|
24, /* `foseg' (16 bits). */
|
378 |
|
|
20, /* `fooff'. */
|
379 |
|
|
18 /* `fop' (bottom 11 bits). */
|
380 |
|
|
};
|
381 |
|
|
|
382 |
|
|
#define FSAVE_ADDR(fsave, regnum) \
|
383 |
|
|
(fsave + fsave_offset[regnum - I387_ST0_REGNUM])
|
384 |
|
|
|
385 |
|
|
|
386 |
|
|
/* Fill register REGNUM in REGCACHE with the appropriate value from
|
387 |
|
|
*FSAVE. This function masks off any of the reserved bits in
|
388 |
|
|
*FSAVE. */
|
389 |
|
|
|
390 |
|
|
void
|
391 |
|
|
i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
|
392 |
|
|
{
|
393 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
394 |
|
|
const gdb_byte *regs = fsave;
|
395 |
|
|
int i;
|
396 |
|
|
|
397 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
398 |
|
|
|
399 |
|
|
/* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
|
400 |
|
|
proper definitions for REGCACHE's architecture. */
|
401 |
|
|
|
402 |
|
|
#define I387_ST0_REGNUM tdep->st0_regnum
|
403 |
|
|
#define I387_NUM_XMM_REGS tdep->num_xmm_regs
|
404 |
|
|
|
405 |
|
|
for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
|
406 |
|
|
if (regnum == -1 || regnum == i)
|
407 |
|
|
{
|
408 |
|
|
if (fsave == NULL)
|
409 |
|
|
{
|
410 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
411 |
|
|
continue;
|
412 |
|
|
}
|
413 |
|
|
|
414 |
|
|
/* Most of the FPU control registers occupy only 16 bits in the
|
415 |
|
|
fsave area. Give those a special treatment. */
|
416 |
|
|
if (i >= I387_FCTRL_REGNUM
|
417 |
|
|
&& i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
|
418 |
|
|
{
|
419 |
|
|
gdb_byte val[4];
|
420 |
|
|
|
421 |
|
|
memcpy (val, FSAVE_ADDR (regs, i), 2);
|
422 |
|
|
val[2] = val[3] = 0;
|
423 |
|
|
if (i == I387_FOP_REGNUM)
|
424 |
|
|
val[1] &= ((1 << 3) - 1);
|
425 |
|
|
regcache_raw_supply (regcache, i, val);
|
426 |
|
|
}
|
427 |
|
|
else
|
428 |
|
|
regcache_raw_supply (regcache, i, FSAVE_ADDR (regs, i));
|
429 |
|
|
}
|
430 |
|
|
|
431 |
|
|
/* Provide dummy values for the SSE registers. */
|
432 |
|
|
for (i = I387_XMM0_REGNUM; i < I387_MXCSR_REGNUM; i++)
|
433 |
|
|
if (regnum == -1 || regnum == i)
|
434 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
435 |
|
|
if (regnum == -1 || regnum == I387_MXCSR_REGNUM)
|
436 |
|
|
{
|
437 |
|
|
gdb_byte buf[4];
|
438 |
|
|
|
439 |
|
|
store_unsigned_integer (buf, 4, 0x1f80);
|
440 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM, buf);
|
441 |
|
|
}
|
442 |
|
|
|
443 |
|
|
#undef I387_ST0_REGNUM
|
444 |
|
|
#undef I387_NUM_XMM_REGS
|
445 |
|
|
}
|
446 |
|
|
|
447 |
|
|
/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
|
448 |
|
|
with the value from REGCACHE. If REGNUM is -1, do this for all
|
449 |
|
|
registers. This function doesn't touch any of the reserved bits in
|
450 |
|
|
*FSAVE. */
|
451 |
|
|
|
452 |
|
|
void
|
453 |
|
|
i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
|
454 |
|
|
{
|
455 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
456 |
|
|
gdb_byte *regs = fsave;
|
457 |
|
|
int i;
|
458 |
|
|
|
459 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
460 |
|
|
|
461 |
|
|
/* Define I387_ST0_REGNUM such that we use the proper definitions
|
462 |
|
|
for REGCACHE's architecture. */
|
463 |
|
|
#define I387_ST0_REGNUM tdep->st0_regnum
|
464 |
|
|
|
465 |
|
|
for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
|
466 |
|
|
if (regnum == -1 || regnum == i)
|
467 |
|
|
{
|
468 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
469 |
|
|
the fsave area. Give those a special treatment. */
|
470 |
|
|
if (i >= I387_FCTRL_REGNUM
|
471 |
|
|
&& i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
|
472 |
|
|
{
|
473 |
|
|
gdb_byte buf[4];
|
474 |
|
|
|
475 |
|
|
regcache_raw_collect (regcache, i, buf);
|
476 |
|
|
|
477 |
|
|
if (i == I387_FOP_REGNUM)
|
478 |
|
|
{
|
479 |
|
|
/* The opcode occupies only 11 bits. Make sure we
|
480 |
|
|
don't touch the other bits. */
|
481 |
|
|
buf[1] &= ((1 << 3) - 1);
|
482 |
|
|
buf[1] |= ((FSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
|
483 |
|
|
}
|
484 |
|
|
memcpy (FSAVE_ADDR (regs, i), buf, 2);
|
485 |
|
|
}
|
486 |
|
|
else
|
487 |
|
|
regcache_raw_collect (regcache, i, FSAVE_ADDR (regs, i));
|
488 |
|
|
}
|
489 |
|
|
#undef I387_ST0_REGNUM
|
490 |
|
|
}
|
491 |
|
|
|
492 |
|
|
|
493 |
|
|
/* At fxsave_offset[REGNUM] you'll find the offset to the location in
|
494 |
|
|
the data structure used by the "fxsave" instruction where GDB
|
495 |
|
|
register REGNUM is stored. */
|
496 |
|
|
|
497 |
|
|
static int fxsave_offset[] =
|
498 |
|
|
{
|
499 |
|
|
32, /* %st(0) through ... */
|
500 |
|
|
48,
|
501 |
|
|
64,
|
502 |
|
|
80,
|
503 |
|
|
96,
|
504 |
|
|
112,
|
505 |
|
|
128,
|
506 |
|
|
144, /* ... %st(7) (80 bits each). */
|
507 |
|
|
0, /* `fctrl' (16 bits). */
|
508 |
|
|
2, /* `fstat' (16 bits). */
|
509 |
|
|
4, /* `ftag' (16 bits). */
|
510 |
|
|
12, /* `fiseg' (16 bits). */
|
511 |
|
|
8, /* `fioff'. */
|
512 |
|
|
20, /* `foseg' (16 bits). */
|
513 |
|
|
16, /* `fooff'. */
|
514 |
|
|
6, /* `fop' (bottom 11 bits). */
|
515 |
|
|
160 + 0 * 16, /* %xmm0 through ... */
|
516 |
|
|
160 + 1 * 16,
|
517 |
|
|
160 + 2 * 16,
|
518 |
|
|
160 + 3 * 16,
|
519 |
|
|
160 + 4 * 16,
|
520 |
|
|
160 + 5 * 16,
|
521 |
|
|
160 + 6 * 16,
|
522 |
|
|
160 + 7 * 16,
|
523 |
|
|
160 + 8 * 16,
|
524 |
|
|
160 + 9 * 16,
|
525 |
|
|
160 + 10 * 16,
|
526 |
|
|
160 + 11 * 16,
|
527 |
|
|
160 + 12 * 16,
|
528 |
|
|
160 + 13 * 16,
|
529 |
|
|
160 + 14 * 16,
|
530 |
|
|
160 + 15 * 16, /* ... %xmm15 (128 bits each). */
|
531 |
|
|
};
|
532 |
|
|
|
533 |
|
|
#define FXSAVE_ADDR(fxsave, regnum) \
|
534 |
|
|
(fxsave + fxsave_offset[regnum - I387_ST0_REGNUM])
|
535 |
|
|
|
536 |
|
|
/* We made an unfortunate choice in putting %mxcsr after the SSE
|
537 |
|
|
registers %xmm0-%xmm7 instead of before, since it makes supporting
|
538 |
|
|
the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
|
539 |
|
|
don't include the offset for %mxcsr here above. */
|
540 |
|
|
|
541 |
|
|
#define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
|
542 |
|
|
|
543 |
|
|
static int i387_tag (const gdb_byte *raw);
|
544 |
|
|
|
545 |
|
|
|
546 |
|
|
/* Fill register REGNUM in REGCACHE with the appropriate
|
547 |
|
|
floating-point or SSE register value from *FXSAVE. This function
|
548 |
|
|
masks off any of the reserved bits in *FXSAVE. */
|
549 |
|
|
|
550 |
|
|
void
|
551 |
|
|
i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
|
552 |
|
|
{
|
553 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
554 |
|
|
const gdb_byte *regs = fxsave;
|
555 |
|
|
int i;
|
556 |
|
|
|
557 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
558 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
559 |
|
|
|
560 |
|
|
/* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
|
561 |
|
|
proper definitions for REGCACHE's architecture. */
|
562 |
|
|
|
563 |
|
|
#define I387_ST0_REGNUM tdep->st0_regnum
|
564 |
|
|
#define I387_NUM_XMM_REGS tdep->num_xmm_regs
|
565 |
|
|
|
566 |
|
|
for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
|
567 |
|
|
if (regnum == -1 || regnum == i)
|
568 |
|
|
{
|
569 |
|
|
if (regs == NULL)
|
570 |
|
|
{
|
571 |
|
|
regcache_raw_supply (regcache, i, NULL);
|
572 |
|
|
continue;
|
573 |
|
|
}
|
574 |
|
|
|
575 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
576 |
|
|
the fxsave area. Give those a special treatment. */
|
577 |
|
|
if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
|
578 |
|
|
&& i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
|
579 |
|
|
{
|
580 |
|
|
gdb_byte val[4];
|
581 |
|
|
|
582 |
|
|
memcpy (val, FXSAVE_ADDR (regs, i), 2);
|
583 |
|
|
val[2] = val[3] = 0;
|
584 |
|
|
if (i == I387_FOP_REGNUM)
|
585 |
|
|
val[1] &= ((1 << 3) - 1);
|
586 |
|
|
else if (i== I387_FTAG_REGNUM)
|
587 |
|
|
{
|
588 |
|
|
/* The fxsave area contains a simplified version of
|
589 |
|
|
the tag word. We have to look at the actual 80-bit
|
590 |
|
|
FP data to recreate the traditional i387 tag word. */
|
591 |
|
|
|
592 |
|
|
unsigned long ftag = 0;
|
593 |
|
|
int fpreg;
|
594 |
|
|
int top;
|
595 |
|
|
|
596 |
|
|
top = ((FXSAVE_ADDR (regs, I387_FSTAT_REGNUM))[1] >> 3);
|
597 |
|
|
top &= 0x7;
|
598 |
|
|
|
599 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
600 |
|
|
{
|
601 |
|
|
int tag;
|
602 |
|
|
|
603 |
|
|
if (val[0] & (1 << fpreg))
|
604 |
|
|
{
|
605 |
|
|
int regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM;
|
606 |
|
|
tag = i387_tag (FXSAVE_ADDR (regs, regnum));
|
607 |
|
|
}
|
608 |
|
|
else
|
609 |
|
|
tag = 3; /* Empty */
|
610 |
|
|
|
611 |
|
|
ftag |= tag << (2 * fpreg);
|
612 |
|
|
}
|
613 |
|
|
val[0] = ftag & 0xff;
|
614 |
|
|
val[1] = (ftag >> 8) & 0xff;
|
615 |
|
|
}
|
616 |
|
|
regcache_raw_supply (regcache, i, val);
|
617 |
|
|
}
|
618 |
|
|
else
|
619 |
|
|
regcache_raw_supply (regcache, i, FXSAVE_ADDR (regs, i));
|
620 |
|
|
}
|
621 |
|
|
|
622 |
|
|
if (regnum == I387_MXCSR_REGNUM || regnum == -1)
|
623 |
|
|
{
|
624 |
|
|
if (regs == NULL)
|
625 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM, NULL);
|
626 |
|
|
else
|
627 |
|
|
regcache_raw_supply (regcache, I387_MXCSR_REGNUM,
|
628 |
|
|
FXSAVE_MXCSR_ADDR (regs));
|
629 |
|
|
}
|
630 |
|
|
|
631 |
|
|
#undef I387_ST0_REGNUM
|
632 |
|
|
#undef I387_NUM_XMM_REGS
|
633 |
|
|
}
|
634 |
|
|
|
635 |
|
|
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
636 |
|
|
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
637 |
|
|
all registers. This function doesn't touch any of the reserved
|
638 |
|
|
bits in *FXSAVE. */
|
639 |
|
|
|
640 |
|
|
void
|
641 |
|
|
i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
|
642 |
|
|
{
|
643 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
644 |
|
|
gdb_byte *regs = fxsave;
|
645 |
|
|
int i;
|
646 |
|
|
|
647 |
|
|
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
648 |
|
|
gdb_assert (tdep->num_xmm_regs > 0);
|
649 |
|
|
|
650 |
|
|
/* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
|
651 |
|
|
proper definitions for REGCACHE's architecture. */
|
652 |
|
|
|
653 |
|
|
#define I387_ST0_REGNUM tdep->st0_regnum
|
654 |
|
|
#define I387_NUM_XMM_REGS tdep->num_xmm_regs
|
655 |
|
|
|
656 |
|
|
for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
|
657 |
|
|
if (regnum == -1 || regnum == i)
|
658 |
|
|
{
|
659 |
|
|
/* Most of the FPU control registers occupy only 16 bits in
|
660 |
|
|
the fxsave area. Give those a special treatment. */
|
661 |
|
|
if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
|
662 |
|
|
&& i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
|
663 |
|
|
{
|
664 |
|
|
gdb_byte buf[4];
|
665 |
|
|
|
666 |
|
|
regcache_raw_collect (regcache, i, buf);
|
667 |
|
|
|
668 |
|
|
if (i == I387_FOP_REGNUM)
|
669 |
|
|
{
|
670 |
|
|
/* The opcode occupies only 11 bits. Make sure we
|
671 |
|
|
don't touch the other bits. */
|
672 |
|
|
buf[1] &= ((1 << 3) - 1);
|
673 |
|
|
buf[1] |= ((FXSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
|
674 |
|
|
}
|
675 |
|
|
else if (i == I387_FTAG_REGNUM)
|
676 |
|
|
{
|
677 |
|
|
/* Converting back is much easier. */
|
678 |
|
|
|
679 |
|
|
unsigned short ftag;
|
680 |
|
|
int fpreg;
|
681 |
|
|
|
682 |
|
|
ftag = (buf[1] << 8) | buf[0];
|
683 |
|
|
buf[0] = 0;
|
684 |
|
|
buf[1] = 0;
|
685 |
|
|
|
686 |
|
|
for (fpreg = 7; fpreg >= 0; fpreg--)
|
687 |
|
|
{
|
688 |
|
|
int tag = (ftag >> (fpreg * 2)) & 3;
|
689 |
|
|
|
690 |
|
|
if (tag != 3)
|
691 |
|
|
buf[0] |= (1 << fpreg);
|
692 |
|
|
}
|
693 |
|
|
}
|
694 |
|
|
memcpy (FXSAVE_ADDR (regs, i), buf, 2);
|
695 |
|
|
}
|
696 |
|
|
else
|
697 |
|
|
regcache_raw_collect (regcache, i, FXSAVE_ADDR (regs, i));
|
698 |
|
|
}
|
699 |
|
|
|
700 |
|
|
if (regnum == I387_MXCSR_REGNUM || regnum == -1)
|
701 |
|
|
regcache_raw_collect (regcache, I387_MXCSR_REGNUM,
|
702 |
|
|
FXSAVE_MXCSR_ADDR (regs));
|
703 |
|
|
|
704 |
|
|
#undef I387_ST0_REGNUM
|
705 |
|
|
#undef I387_NUM_XMM_REGS
|
706 |
|
|
}
|
707 |
|
|
|
708 |
|
|
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
|
709 |
|
|
*RAW. */
|
710 |
|
|
|
711 |
|
|
static int
|
712 |
|
|
i387_tag (const gdb_byte *raw)
|
713 |
|
|
{
|
714 |
|
|
int integer;
|
715 |
|
|
unsigned int exponent;
|
716 |
|
|
unsigned long fraction[2];
|
717 |
|
|
|
718 |
|
|
integer = raw[7] & 0x80;
|
719 |
|
|
exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
|
720 |
|
|
fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
|
721 |
|
|
fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
|
722 |
|
|
| (raw[5] << 8) | raw[4]);
|
723 |
|
|
|
724 |
|
|
if (exponent == 0x7fff)
|
725 |
|
|
{
|
726 |
|
|
/* Special. */
|
727 |
|
|
return (2);
|
728 |
|
|
}
|
729 |
|
|
else if (exponent == 0x0000)
|
730 |
|
|
{
|
731 |
|
|
if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
|
732 |
|
|
{
|
733 |
|
|
/* Zero. */
|
734 |
|
|
return (1);
|
735 |
|
|
}
|
736 |
|
|
else
|
737 |
|
|
{
|
738 |
|
|
/* Special. */
|
739 |
|
|
return (2);
|
740 |
|
|
}
|
741 |
|
|
}
|
742 |
|
|
else
|
743 |
|
|
{
|
744 |
|
|
if (integer)
|
745 |
|
|
{
|
746 |
|
|
/* Valid. */
|
747 |
|
|
return (0);
|
748 |
|
|
}
|
749 |
|
|
else
|
750 |
|
|
{
|
751 |
|
|
/* Special. */
|
752 |
|
|
return (2);
|
753 |
|
|
}
|
754 |
|
|
}
|
755 |
|
|
}
|
756 |
|
|
|
757 |
|
|
/* Prepare the FPU stack in REGCACHE for a function return. */
|
758 |
|
|
|
759 |
|
|
void
|
760 |
|
|
i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
|
761 |
|
|
{
|
762 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
763 |
|
|
ULONGEST fstat;
|
764 |
|
|
|
765 |
|
|
/* Define I387_ST0_REGNUM such that we use the proper
|
766 |
|
|
definitions for the architecture. */
|
767 |
|
|
#define I387_ST0_REGNUM tdep->st0_regnum
|
768 |
|
|
|
769 |
|
|
/* Set the top of the floating-point register stack to 7. The
|
770 |
|
|
actual value doesn't really matter, but 7 is what a normal
|
771 |
|
|
function return would end up with if the program started out with
|
772 |
|
|
a freshly initialized FPU. */
|
773 |
|
|
regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
|
774 |
|
|
fstat |= (7 << 11);
|
775 |
|
|
regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
|
776 |
|
|
|
777 |
|
|
/* Mark %st(1) through %st(7) as empty. Since we set the top of the
|
778 |
|
|
floating-point register stack to 7, the appropriate value for the
|
779 |
|
|
tag word is 0x3fff. */
|
780 |
|
|
regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
|
781 |
|
|
|
782 |
|
|
#undef I387_ST0_REGNUM
|
783 |
|
|
}
|