OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [mips-linux-tdep.c] - Blame information for rev 24

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Target-dependent code for GNU/Linux on MIPS processors.
2
 
3
   Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008
4
   Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#include "defs.h"
22
#include "gdbcore.h"
23
#include "target.h"
24
#include "solib-svr4.h"
25
#include "osabi.h"
26
#include "mips-tdep.h"
27
#include "gdb_string.h"
28
#include "gdb_assert.h"
29
#include "frame.h"
30
#include "regcache.h"
31
#include "trad-frame.h"
32
#include "tramp-frame.h"
33
#include "gdbtypes.h"
34
#include "solib.h"
35
#include "solib-svr4.h"
36
#include "solist.h"
37
#include "symtab.h"
38
#include "target-descriptions.h"
39
#include "mips-linux-tdep.h"
40
 
41
static struct target_so_ops mips_svr4_so_ops;
42
 
43
/* Figure out where the longjmp will land.
44
   We expect the first arg to be a pointer to the jmp_buf structure
45
   from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
46
   at.  The pc is copied into PC.  This routine returns 1 on
47
   success.  */
48
 
49
#define MIPS_LINUX_JB_ELEMENT_SIZE 4
50
#define MIPS_LINUX_JB_PC 0
51
 
52
static int
53
mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
54
{
55
  CORE_ADDR jb_addr;
56
  struct gdbarch *gdbarch = get_frame_arch (frame);
57
  char buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
58
 
59
  jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
60
 
61
  if (target_read_memory (jb_addr
62
                            + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
63
                          buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
64
    return 0;
65
 
66
  *pc = extract_unsigned_integer (buf,
67
                                  gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
68
 
69
  return 1;
70
}
71
 
72
/* Transform the bits comprising a 32-bit register to the right size
73
   for regcache_raw_supply().  This is needed when mips_isa_regsize()
74
   is 8.  */
75
 
76
static void
77
supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
78
{
79
  gdb_byte buf[MAX_REGISTER_SIZE];
80
  store_signed_integer (buf,
81
                        register_size (get_regcache_arch (regcache), regnum),
82
                        extract_signed_integer (addr, 4));
83
  regcache_raw_supply (regcache, regnum, buf);
84
}
85
 
86
/* Unpack an elf_gregset_t into GDB's register cache.  */
87
 
88
void
89
mips_supply_gregset (struct regcache *regcache,
90
                     const mips_elf_gregset_t *gregsetp)
91
{
92
  int regi;
93
  const mips_elf_greg_t *regp = *gregsetp;
94
  char zerobuf[MAX_REGISTER_SIZE];
95
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
96
 
97
  memset (zerobuf, 0, MAX_REGISTER_SIZE);
98
 
99
  for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
100
    supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
101
 
102
  if (mips_linux_restart_reg_p (gdbarch))
103
    supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
104
 
105
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
106
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
107
 
108
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
109
                    regp + EF_CP0_EPC);
110
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
111
                    regp + EF_CP0_BADVADDR);
112
  supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
113
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
114
                    regp + EF_CP0_CAUSE);
115
 
116
  /* Fill inaccessible registers with zero.  */
117
  regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
118
  regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
119
  for (regi = MIPS_FIRST_EMBED_REGNUM;
120
       regi <= MIPS_LAST_EMBED_REGNUM;
121
       regi++)
122
    regcache_raw_supply (regcache, regi, zerobuf);
123
}
124
 
125
/* Pack our registers (or one register) into an elf_gregset_t.  */
126
 
127
void
128
mips_fill_gregset (const struct regcache *regcache,
129
                   mips_elf_gregset_t *gregsetp, int regno)
130
{
131
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
132
  int regaddr, regi;
133
  mips_elf_greg_t *regp = *gregsetp;
134
  void *dst;
135
 
136
  if (regno == -1)
137
    {
138
      memset (regp, 0, sizeof (mips_elf_gregset_t));
139
      for (regi = 1; regi < 32; regi++)
140
        mips_fill_gregset (regcache, gregsetp, regi);
141
      mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
142
      mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
143
      mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
144
      mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
145
      mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
146
      mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
147
      mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
148
      return;
149
   }
150
 
151
  if (regno > 0 && regno < 32)
152
    {
153
      dst = regp + regno + EF_REG0;
154
      regcache_raw_collect (regcache, regno, dst);
155
      return;
156
    }
157
 
158
  if (regno == mips_regnum (gdbarch)->lo)
159
     regaddr = EF_LO;
160
  else if (regno == mips_regnum (gdbarch)->hi)
161
    regaddr = EF_HI;
162
  else if (regno == mips_regnum (gdbarch)->pc)
163
    regaddr = EF_CP0_EPC;
164
  else if (regno == mips_regnum (gdbarch)->badvaddr)
165
    regaddr = EF_CP0_BADVADDR;
166
  else if (regno == MIPS_PS_REGNUM)
167
    regaddr = EF_CP0_STATUS;
168
  else if (regno == mips_regnum (gdbarch)->cause)
169
    regaddr = EF_CP0_CAUSE;
170
  else if (mips_linux_restart_reg_p (gdbarch)
171
           && regno == MIPS_RESTART_REGNUM)
172
    regaddr = EF_REG0;
173
  else
174
    regaddr = -1;
175
 
176
  if (regaddr != -1)
177
    {
178
      dst = regp + regaddr;
179
      regcache_raw_collect (regcache, regno, dst);
180
    }
181
}
182
 
183
/* Likewise, unpack an elf_fpregset_t.  */
184
 
185
void
186
mips_supply_fpregset (struct regcache *regcache,
187
                      const mips_elf_fpregset_t *fpregsetp)
188
{
189
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
190
  int regi;
191
  char zerobuf[MAX_REGISTER_SIZE];
192
 
193
  memset (zerobuf, 0, MAX_REGISTER_SIZE);
194
 
195
  for (regi = 0; regi < 32; regi++)
196
    regcache_raw_supply (regcache,
197
                         gdbarch_fp0_regnum (gdbarch) + regi,
198
                         *fpregsetp + regi);
199
 
200
  regcache_raw_supply (regcache,
201
                       mips_regnum (gdbarch)->fp_control_status,
202
                       *fpregsetp + 32);
203
 
204
  /* FIXME: how can we supply FCRIR?  The ABI doesn't tell us.  */
205
  regcache_raw_supply (regcache,
206
                       mips_regnum (gdbarch)->fp_implementation_revision,
207
                       zerobuf);
208
}
209
 
210
/* Likewise, pack one or all floating point registers into an
211
   elf_fpregset_t.  */
212
 
213
void
214
mips_fill_fpregset (const struct regcache *regcache,
215
                    mips_elf_fpregset_t *fpregsetp, int regno)
216
{
217
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
218
  char *from, *to;
219
 
220
  if ((regno >= gdbarch_fp0_regnum (gdbarch))
221
      && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
222
    {
223
      to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
224
      regcache_raw_collect (regcache, regno, to);
225
    }
226
  else if (regno == mips_regnum (gdbarch)->fp_control_status)
227
    {
228
      to = (char *) (*fpregsetp + 32);
229
      regcache_raw_collect (regcache, regno, to);
230
    }
231
  else if (regno == -1)
232
    {
233
      int regi;
234
 
235
      for (regi = 0; regi < 32; regi++)
236
        mips_fill_fpregset (regcache, fpregsetp,
237
                            gdbarch_fp0_regnum (gdbarch) + regi);
238
      mips_fill_fpregset (regcache, fpregsetp,
239
                          mips_regnum (gdbarch)->fp_control_status);
240
    }
241
}
242
 
243
/* Support for 64-bit ABIs.  */
244
 
245
/* Figure out where the longjmp will land.
246
   We expect the first arg to be a pointer to the jmp_buf structure
247
   from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
248
   at.  The pc is copied into PC.  This routine returns 1 on
249
   success.  */
250
 
251
/* Details about jmp_buf.  */
252
 
253
#define MIPS64_LINUX_JB_PC 0
254
 
255
static int
256
mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
257
{
258
  CORE_ADDR jb_addr;
259
  struct gdbarch *gdbarch = get_frame_arch (frame);
260
  void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
261
  int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
262
 
263
  jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
264
 
265
  if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
266
                          buf,
267
                          gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
268
    return 0;
269
 
270
  *pc = extract_unsigned_integer (buf,
271
                                  gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
272
 
273
  return 1;
274
}
275
 
276
/* Register set support functions.  These operate on standard 64-bit
277
   regsets, but work whether the target is 32-bit or 64-bit.  A 32-bit
278
   target will still use the 64-bit format for PTRACE_GETREGS.  */
279
 
280
/* Supply a 64-bit register.  */
281
 
282
void
283
supply_64bit_reg (struct regcache *regcache, int regnum,
284
                  const gdb_byte *buf)
285
{
286
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
287
  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
288
      && register_size (gdbarch, regnum) == 4)
289
    regcache_raw_supply (regcache, regnum, buf + 4);
290
  else
291
    regcache_raw_supply (regcache, regnum, buf);
292
}
293
 
294
/* Unpack a 64-bit elf_gregset_t into GDB's register cache.  */
295
 
296
void
297
mips64_supply_gregset (struct regcache *regcache,
298
                       const mips64_elf_gregset_t *gregsetp)
299
{
300
  int regi;
301
  const mips64_elf_greg_t *regp = *gregsetp;
302
  gdb_byte zerobuf[MAX_REGISTER_SIZE];
303
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
304
 
305
  memset (zerobuf, 0, MAX_REGISTER_SIZE);
306
 
307
  for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
308
    supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
309
                      (const gdb_byte *)(regp + regi));
310
 
311
  if (mips_linux_restart_reg_p (gdbarch))
312
    supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
313
                      (const gdb_byte *)(regp + MIPS64_EF_REG0));
314
 
315
  supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
316
                    (const gdb_byte *) (regp + MIPS64_EF_LO));
317
  supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
318
                    (const gdb_byte *) (regp + MIPS64_EF_HI));
319
 
320
  supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
321
                    (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
322
  supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
323
                    (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
324
  supply_64bit_reg (regcache, MIPS_PS_REGNUM,
325
                    (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
326
  supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
327
                    (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
328
 
329
  /* Fill inaccessible registers with zero.  */
330
  regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
331
  regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
332
  for (regi = MIPS_FIRST_EMBED_REGNUM;
333
       regi <= MIPS_LAST_EMBED_REGNUM;
334
       regi++)
335
    regcache_raw_supply (regcache, regi, zerobuf);
336
}
337
 
338
/* Pack our registers (or one register) into a 64-bit elf_gregset_t.  */
339
 
340
void
341
mips64_fill_gregset (const struct regcache *regcache,
342
                     mips64_elf_gregset_t *gregsetp, int regno)
343
{
344
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
345
  int regaddr, regi;
346
  mips64_elf_greg_t *regp = *gregsetp;
347
  void *dst;
348
 
349
  if (regno == -1)
350
    {
351
      memset (regp, 0, sizeof (mips64_elf_gregset_t));
352
      for (regi = 1; regi < 32; regi++)
353
        mips64_fill_gregset (regcache, gregsetp, regi);
354
      mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
355
      mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
356
      mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
357
      mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
358
      mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
359
      mips64_fill_gregset (regcache, gregsetp,  mips_regnum (gdbarch)->cause);
360
      mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
361
      return;
362
   }
363
 
364
  if (regno > 0 && regno < 32)
365
    regaddr = regno + MIPS64_EF_REG0;
366
  else if (regno == mips_regnum (gdbarch)->lo)
367
    regaddr = MIPS64_EF_LO;
368
  else if (regno == mips_regnum (gdbarch)->hi)
369
    regaddr = MIPS64_EF_HI;
370
  else if (regno == mips_regnum (gdbarch)->pc)
371
    regaddr = MIPS64_EF_CP0_EPC;
372
  else if (regno == mips_regnum (gdbarch)->badvaddr)
373
    regaddr = MIPS64_EF_CP0_BADVADDR;
374
  else if (regno == MIPS_PS_REGNUM)
375
    regaddr = MIPS64_EF_CP0_STATUS;
376
  else if (regno == mips_regnum (gdbarch)->cause)
377
    regaddr = MIPS64_EF_CP0_CAUSE;
378
  else if (mips_linux_restart_reg_p (gdbarch)
379
           && regno == MIPS_RESTART_REGNUM)
380
    regaddr = MIPS64_EF_REG0;
381
  else
382
    regaddr = -1;
383
 
384
  if (regaddr != -1)
385
    {
386
      gdb_byte buf[MAX_REGISTER_SIZE];
387
      LONGEST val;
388
 
389
      regcache_raw_collect (regcache, regno, buf);
390
      val = extract_signed_integer (buf, register_size (gdbarch, regno));
391
      dst = regp + regaddr;
392
      store_signed_integer (dst, 8, val);
393
    }
394
}
395
 
396
/* Likewise, unpack an elf_fpregset_t.  */
397
 
398
void
399
mips64_supply_fpregset (struct regcache *regcache,
400
                        const mips64_elf_fpregset_t *fpregsetp)
401
{
402
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
403
  int regi;
404
 
405
  /* See mips_linux_o32_sigframe_init for a description of the
406
     peculiar FP register layout.  */
407
  if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
408
    for (regi = 0; regi < 32; regi++)
409
      {
410
        const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
411
        if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
412
          reg_ptr += 4;
413
        regcache_raw_supply (regcache,
414
                             gdbarch_fp0_regnum (gdbarch) + regi,
415
                             reg_ptr);
416
      }
417
  else
418
    for (regi = 0; regi < 32; regi++)
419
      regcache_raw_supply (regcache,
420
                           gdbarch_fp0_regnum (gdbarch) + regi,
421
                           (const char *)(*fpregsetp + regi));
422
 
423
  supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
424
                    (const gdb_byte *)(*fpregsetp + 32));
425
 
426
  /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
427
     include it - but the result of PTRACE_GETFPREGS does.  The best we
428
     can do is to assume that its value is present.  */
429
  supply_32bit_reg (regcache,
430
                    mips_regnum (gdbarch)->fp_implementation_revision,
431
                    (const gdb_byte *)(*fpregsetp + 32) + 4);
432
}
433
 
434
/* Likewise, pack one or all floating point registers into an
435
   elf_fpregset_t.  */
436
 
437
void
438
mips64_fill_fpregset (const struct regcache *regcache,
439
                      mips64_elf_fpregset_t *fpregsetp, int regno)
440
{
441
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
442
  gdb_byte *to;
443
 
444
  if ((regno >= gdbarch_fp0_regnum (gdbarch))
445
      && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
446
    {
447
      /* See mips_linux_o32_sigframe_init for a description of the
448
         peculiar FP register layout.  */
449
      if (register_size (gdbarch, regno) == 4)
450
        {
451
          int regi = regno - gdbarch_fp0_regnum (gdbarch);
452
 
453
          to = (gdb_byte *) (*fpregsetp + (regi & ~1));
454
          if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
455
            to += 4;
456
          regcache_raw_collect (regcache, regno, to);
457
        }
458
      else
459
        {
460
          to = (gdb_byte *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
461
          regcache_raw_collect (regcache, regno, to);
462
        }
463
    }
464
  else if (regno == mips_regnum (gdbarch)->fp_control_status)
465
    {
466
      gdb_byte buf[MAX_REGISTER_SIZE];
467
      LONGEST val;
468
 
469
      regcache_raw_collect (regcache, regno, buf);
470
      val = extract_signed_integer (buf, register_size (gdbarch, regno));
471
      to = (gdb_byte *) (*fpregsetp + 32);
472
      store_signed_integer (to, 4, val);
473
    }
474
  else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
475
    {
476
      gdb_byte buf[MAX_REGISTER_SIZE];
477
      LONGEST val;
478
 
479
      regcache_raw_collect (regcache, regno, buf);
480
      val = extract_signed_integer (buf, register_size (gdbarch, regno));
481
      to = (gdb_byte *) (*fpregsetp + 32) + 4;
482
      store_signed_integer (to, 4, val);
483
    }
484
  else if (regno == -1)
485
    {
486
      int regi;
487
 
488
      for (regi = 0; regi < 32; regi++)
489
        mips64_fill_fpregset (regcache, fpregsetp,
490
                              gdbarch_fp0_regnum (gdbarch) + regi);
491
      mips64_fill_fpregset (regcache, fpregsetp,
492
                            mips_regnum (gdbarch)->fp_control_status);
493
      mips64_fill_fpregset (regcache, fpregsetp,
494
                            (mips_regnum (gdbarch)
495
                              ->fp_implementation_revision));
496
    }
497
}
498
 
499
 
500
/*  Use a local version of this function to get the correct types for
501
    regsets, until multi-arch core support is ready.  */
502
 
503
static void
504
fetch_core_registers (struct regcache *regcache,
505
                      char *core_reg_sect, unsigned core_reg_size,
506
                      int which, CORE_ADDR reg_addr)
507
{
508
  mips_elf_gregset_t gregset;
509
  mips_elf_fpregset_t fpregset;
510
  mips64_elf_gregset_t gregset64;
511
  mips64_elf_fpregset_t fpregset64;
512
 
513
  if (which == 0)
514
    {
515
      if (core_reg_size == sizeof (gregset))
516
        {
517
          memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
518
          mips_supply_gregset (regcache,
519
                               (const mips_elf_gregset_t *) &gregset);
520
        }
521
      else if (core_reg_size == sizeof (gregset64))
522
        {
523
          memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
524
          mips64_supply_gregset (regcache,
525
                                 (const mips64_elf_gregset_t *) &gregset64);
526
        }
527
      else
528
        {
529
          warning (_("wrong size gregset struct in core file"));
530
        }
531
    }
532
  else if (which == 2)
533
    {
534
      if (core_reg_size == sizeof (fpregset))
535
        {
536
          memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
537
          mips_supply_fpregset (regcache,
538
                                (const mips_elf_fpregset_t *) &fpregset);
539
        }
540
      else if (core_reg_size == sizeof (fpregset64))
541
        {
542
          memcpy ((char *) &fpregset64, core_reg_sect,
543
                  sizeof (fpregset64));
544
          mips64_supply_fpregset (regcache,
545
                                  (const mips64_elf_fpregset_t *) &fpregset64);
546
        }
547
      else
548
        {
549
          warning (_("wrong size fpregset struct in core file"));
550
        }
551
    }
552
}
553
 
554
/* Register that we are able to handle ELF file formats using standard
555
   procfs "regset" structures.  */
556
 
557
static struct core_fns regset_core_fns =
558
{
559
  bfd_target_elf_flavour,               /* core_flavour */
560
  default_check_format,                 /* check_format */
561
  default_core_sniffer,                 /* core_sniffer */
562
  fetch_core_registers,                 /* core_read_registers */
563
  NULL                                  /* next */
564
};
565
 
566
static const struct target_desc *
567
mips_linux_core_read_description (struct gdbarch *gdbarch,
568
                                  struct target_ops *target,
569
                                  bfd *abfd)
570
{
571
  asection *section = bfd_get_section_by_name (abfd, ".reg");
572
  if (! section)
573
    return NULL;
574
 
575
  switch (bfd_section_size (abfd, section))
576
    {
577
    case sizeof (mips_elf_gregset_t):
578
      return mips_tdesc_gp32;
579
 
580
    case sizeof (mips64_elf_gregset_t):
581
      return mips_tdesc_gp64;
582
 
583
    default:
584
      return NULL;
585
    }
586
}
587
 
588
 
589
/* Check the code at PC for a dynamic linker lazy resolution stub.
590
   Because they aren't in the .plt section, we pattern-match on the
591
   code generated by GNU ld.  They look like this:
592
 
593
   lw t9,0x8010(gp)
594
   addu t7,ra
595
   jalr t9,ra
596
   addiu t8,zero,INDEX
597
 
598
   (with the appropriate doubleword instructions for N64).  Also
599
   return the dynamic symbol index used in the last instruction.  */
600
 
601
static int
602
mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
603
{
604
  unsigned char buf[28], *p;
605
  ULONGEST insn, insn1;
606
  int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
607
 
608
  read_memory (pc - 12, buf, 28);
609
 
610
  if (n64)
611
    {
612
      /* ld t9,0x8010(gp) */
613
      insn1 = 0xdf998010;
614
    }
615
  else
616
    {
617
      /* lw t9,0x8010(gp) */
618
      insn1 = 0x8f998010;
619
    }
620
 
621
  p = buf + 12;
622
  while (p >= buf)
623
    {
624
      insn = extract_unsigned_integer (p, 4);
625
      if (insn == insn1)
626
        break;
627
      p -= 4;
628
    }
629
  if (p < buf)
630
    return 0;
631
 
632
  insn = extract_unsigned_integer (p + 4, 4);
633
  if (n64)
634
    {
635
      /* daddu t7,ra */
636
      if (insn != 0x03e0782d)
637
        return 0;
638
    }
639
  else
640
    {
641
      /* addu t7,ra */
642
      if (insn != 0x03e07821)
643
        return 0;
644
    }
645
 
646
  insn = extract_unsigned_integer (p + 8, 4);
647
  /* jalr t9,ra */
648
  if (insn != 0x0320f809)
649
    return 0;
650
 
651
  insn = extract_unsigned_integer (p + 12, 4);
652
  if (n64)
653
    {
654
      /* daddiu t8,zero,0 */
655
      if ((insn & 0xffff0000) != 0x64180000)
656
        return 0;
657
    }
658
  else
659
    {
660
      /* addiu t8,zero,0 */
661
      if ((insn & 0xffff0000) != 0x24180000)
662
        return 0;
663
    }
664
 
665
  return (insn & 0xffff);
666
}
667
 
668
/* Return non-zero iff PC belongs to the dynamic linker resolution
669
   code or to a stub.  */
670
 
671
static int
672
mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
673
{
674
  /* Check whether PC is in the dynamic linker.  This also checks
675
     whether it is in the .plt section, which MIPS does not use.  */
676
  if (svr4_in_dynsym_resolve_code (pc))
677
    return 1;
678
 
679
  /* Pattern match for the stub.  It would be nice if there were a
680
     more efficient way to avoid this check.  */
681
  if (mips_linux_in_dynsym_stub (pc, NULL))
682
    return 1;
683
 
684
  return 0;
685
}
686
 
687
/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
688
   and glibc_skip_solib_resolver in glibc-tdep.c.  The normal glibc
689
   implementation of this triggers at "fixup" from the same objfile as
690
   "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
691
   "__dl_runtime_resolve" directly.  An unresolved PLT entry will
692
   point to _dl_runtime_resolve, which will first call
693
   __dl_runtime_resolve, and then pass control to the resolved
694
   function.  */
695
 
696
static CORE_ADDR
697
mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
698
{
699
  struct minimal_symbol *resolver;
700
 
701
  resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
702
 
703
  if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
704
    return frame_pc_unwind (get_current_frame ());
705
 
706
  return 0;
707
}
708
 
709
/* Signal trampoline support.  There are four supported layouts for a
710
   signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
711
   n64 rt_sigframe.  We handle them all independently; not the most
712
   efficient way, but simplest.  First, declare all the unwinders.  */
713
 
714
static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
715
                                          struct frame_info *next_frame,
716
                                          struct trad_frame_cache *this_cache,
717
                                          CORE_ADDR func);
718
 
719
static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
720
                                             struct frame_info *next_frame,
721
                                             struct trad_frame_cache *this_cache,
722
                                             CORE_ADDR func);
723
 
724
#define MIPS_NR_LINUX 4000
725
#define MIPS_NR_N64_LINUX 5000
726
#define MIPS_NR_N32_LINUX 6000
727
 
728
#define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
729
#define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
730
#define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
731
#define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
732
 
733
#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
734
#define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
735
#define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
736
#define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
737
#define MIPS_INST_SYSCALL 0x0000000c
738
 
739
static const struct tramp_frame mips_linux_o32_sigframe = {
740
  SIGTRAMP_FRAME,
741
  4,
742
  {
743
    { MIPS_INST_LI_V0_SIGRETURN, -1 },
744
    { MIPS_INST_SYSCALL, -1 },
745
    { TRAMP_SENTINEL_INSN, -1 }
746
  },
747
  mips_linux_o32_sigframe_init
748
};
749
 
750
static const struct tramp_frame mips_linux_o32_rt_sigframe = {
751
  SIGTRAMP_FRAME,
752
  4,
753
  {
754
    { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
755
    { MIPS_INST_SYSCALL, -1 },
756
    { TRAMP_SENTINEL_INSN, -1 } },
757
  mips_linux_o32_sigframe_init
758
};
759
 
760
static const struct tramp_frame mips_linux_n32_rt_sigframe = {
761
  SIGTRAMP_FRAME,
762
  4,
763
  {
764
    { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
765
    { MIPS_INST_SYSCALL, -1 },
766
    { TRAMP_SENTINEL_INSN, -1 }
767
  },
768
  mips_linux_n32n64_sigframe_init
769
};
770
 
771
static const struct tramp_frame mips_linux_n64_rt_sigframe = {
772
  SIGTRAMP_FRAME,
773
  4,
774
  {
775
    { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
776
    { MIPS_INST_SYSCALL, -1 },
777
    { TRAMP_SENTINEL_INSN, -1 }
778
  },
779
  mips_linux_n32n64_sigframe_init
780
};
781
 
782
/* *INDENT-OFF* */
783
/* The unwinder for o32 signal frames.  The legacy structures look
784
   like this:
785
 
786
   struct sigframe {
787
     u32 sf_ass[4];            [argument save space for o32]
788
     u32 sf_code[2];           [signal trampoline]
789
     struct sigcontext sf_sc;
790
     sigset_t sf_mask;
791
   };
792
 
793
   struct sigcontext {
794
        unsigned int       sc_regmask;          [Unused]
795
        unsigned int       sc_status;
796
        unsigned long long sc_pc;
797
        unsigned long long sc_regs[32];
798
        unsigned long long sc_fpregs[32];
799
        unsigned int       sc_ownedfp;
800
        unsigned int       sc_fpc_csr;
801
        unsigned int       sc_fpc_eir;          [Unused]
802
        unsigned int       sc_used_math;
803
        unsigned int       sc_ssflags;          [Unused]
804
        [Alignment hole of four bytes]
805
        unsigned long long sc_mdhi;
806
        unsigned long long sc_mdlo;
807
 
808
        unsigned int       sc_cause;            [Unused]
809
        unsigned int       sc_badvaddr;         [Unused]
810
 
811
        unsigned long      sc_sigset[4];        [kernel's sigset_t]
812
   };
813
 
814
   The RT signal frames look like this:
815
 
816
   struct rt_sigframe {
817
     u32 rs_ass[4];            [argument save space for o32]
818
     u32 rs_code[2]            [signal trampoline]
819
     struct siginfo rs_info;
820
     struct ucontext rs_uc;
821
   };
822
 
823
   struct ucontext {
824
     unsigned long     uc_flags;
825
     struct ucontext  *uc_link;
826
     stack_t           uc_stack;
827
     [Alignment hole of four bytes]
828
     struct sigcontext uc_mcontext;
829
     sigset_t          uc_sigmask;
830
   };  */
831
/* *INDENT-ON* */
832
 
833
#define SIGFRAME_CODE_OFFSET         (4 * 4)
834
#define SIGFRAME_SIGCONTEXT_OFFSET   (6 * 4)
835
 
836
#define RTSIGFRAME_SIGINFO_SIZE      128
837
#define STACK_T_SIZE                 (3 * 4)
838
#define UCONTEXT_SIGCONTEXT_OFFSET   (2 * 4 + STACK_T_SIZE + 4)
839
#define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
840
                                      + RTSIGFRAME_SIGINFO_SIZE \
841
                                      + UCONTEXT_SIGCONTEXT_OFFSET)
842
 
843
#define SIGCONTEXT_PC       (1 * 8)
844
#define SIGCONTEXT_REGS     (2 * 8)
845
#define SIGCONTEXT_FPREGS   (34 * 8)
846
#define SIGCONTEXT_FPCSR    (66 * 8 + 4)
847
#define SIGCONTEXT_HI       (69 * 8)
848
#define SIGCONTEXT_LO       (70 * 8)
849
#define SIGCONTEXT_CAUSE    (71 * 8 + 0)
850
#define SIGCONTEXT_BADVADDR (71 * 8 + 4)
851
 
852
#define SIGCONTEXT_REG_SIZE 8
853
 
854
static void
855
mips_linux_o32_sigframe_init (const struct tramp_frame *self,
856
                              struct frame_info *next_frame,
857
                              struct trad_frame_cache *this_cache,
858
                              CORE_ADDR func)
859
{
860
  struct gdbarch *gdbarch = get_frame_arch (next_frame);
861
  int ireg, reg_position;
862
  CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
863
  const struct mips_regnum *regs = mips_regnum (gdbarch);
864
  CORE_ADDR regs_base;
865
 
866
  if (self == &mips_linux_o32_sigframe)
867
    sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
868
  else
869
    sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
870
 
871
  /* I'm not proud of this hack.  Eventually we will have the
872
     infrastructure to indicate the size of saved registers on a
873
     per-frame basis, but right now we don't; the kernel saves eight
874
     bytes but we only want four.  Use regs_base to access any
875
     64-bit fields.  */
876
  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
877
    regs_base = sigcontext_base + 4;
878
  else
879
    regs_base = sigcontext_base;
880
 
881
  if (mips_linux_restart_reg_p (gdbarch))
882
    trad_frame_set_reg_addr (this_cache,
883
                             (MIPS_RESTART_REGNUM
884
                              + gdbarch_num_regs (gdbarch)),
885
                             regs_base + SIGCONTEXT_REGS);
886
 
887
  for (ireg = 1; ireg < 32; ireg++)
888
    trad_frame_set_reg_addr (this_cache,
889
                             ireg + MIPS_ZERO_REGNUM
890
                               + gdbarch_num_regs (gdbarch),
891
                             regs_base + SIGCONTEXT_REGS
892
                             + ireg * SIGCONTEXT_REG_SIZE);
893
 
894
  /* The way that floating point registers are saved, unfortunately,
895
     depends on the architecture the kernel is built for.  For the r3000 and
896
     tx39, four bytes of each register are at the beginning of each of the
897
     32 eight byte slots.  For everything else, the registers are saved
898
     using double precision; only the even-numbered slots are initialized,
899
     and the high bits are the odd-numbered register.  Assume the latter
900
     layout, since we can't tell, and it's much more common.  Which bits are
901
     the "high" bits depends on endianness.  */
902
  for (ireg = 0; ireg < 32; ireg++)
903
    if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
904
      trad_frame_set_reg_addr (this_cache,
905
                               ireg + regs->fp0 +
906
                                 gdbarch_num_regs (gdbarch),
907
                               sigcontext_base + SIGCONTEXT_FPREGS + 4
908
                               + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
909
    else
910
      trad_frame_set_reg_addr (this_cache,
911
                               ireg + regs->fp0
912
                                 + gdbarch_num_regs (gdbarch),
913
                               sigcontext_base + SIGCONTEXT_FPREGS
914
                               + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
915
 
916
  trad_frame_set_reg_addr (this_cache,
917
                           regs->pc + gdbarch_num_regs (gdbarch),
918
                           regs_base + SIGCONTEXT_PC);
919
 
920
  trad_frame_set_reg_addr (this_cache,
921
                           regs->fp_control_status
922
                           + gdbarch_num_regs (gdbarch),
923
                           sigcontext_base + SIGCONTEXT_FPCSR);
924
  trad_frame_set_reg_addr (this_cache,
925
                           regs->hi + gdbarch_num_regs (gdbarch),
926
                           regs_base + SIGCONTEXT_HI);
927
  trad_frame_set_reg_addr (this_cache,
928
                           regs->lo + gdbarch_num_regs (gdbarch),
929
                           regs_base + SIGCONTEXT_LO);
930
  trad_frame_set_reg_addr (this_cache,
931
                           regs->cause + gdbarch_num_regs (gdbarch),
932
                           sigcontext_base + SIGCONTEXT_CAUSE);
933
  trad_frame_set_reg_addr (this_cache,
934
                           regs->badvaddr + gdbarch_num_regs (gdbarch),
935
                           sigcontext_base + SIGCONTEXT_BADVADDR);
936
 
937
  /* Choice of the bottom of the sigframe is somewhat arbitrary.  */
938
  trad_frame_set_id (this_cache,
939
                     frame_id_build (func - SIGFRAME_CODE_OFFSET,
940
                                     func));
941
}
942
 
943
/* *INDENT-OFF* */
944
/* For N32/N64 things look different.  There is no non-rt signal frame.
945
 
946
  struct rt_sigframe_n32 {
947
    u32 rs_ass[4];                  [ argument save space for o32 ]
948
    u32 rs_code[2];                 [ signal trampoline ]
949
    struct siginfo rs_info;
950
    struct ucontextn32 rs_uc;
951
  };
952
 
953
  struct ucontextn32 {
954
    u32                 uc_flags;
955
    s32                 uc_link;
956
    stack32_t           uc_stack;
957
    struct sigcontext   uc_mcontext;
958
    sigset_t            uc_sigmask;   [ mask last for extensibility ]
959
  };
960
 
961
  struct rt_sigframe_n32 {
962
    u32 rs_ass[4];                  [ argument save space for o32 ]
963
    u32 rs_code[2];                 [ signal trampoline ]
964
    struct siginfo rs_info;
965
    struct ucontext rs_uc;
966
  };
967
 
968
  struct ucontext {
969
    unsigned long     uc_flags;
970
    struct ucontext  *uc_link;
971
    stack_t           uc_stack;
972
    struct sigcontext uc_mcontext;
973
    sigset_t          uc_sigmask;   [ mask last for extensibility ]
974
  };
975
 
976
  And the sigcontext is different (this is for both n32 and n64):
977
 
978
  struct sigcontext {
979
    unsigned long long sc_regs[32];
980
    unsigned long long sc_fpregs[32];
981
    unsigned long long sc_mdhi;
982
    unsigned long long sc_mdlo;
983
    unsigned long long sc_pc;
984
    unsigned int       sc_status;
985
    unsigned int       sc_fpc_csr;
986
    unsigned int       sc_fpc_eir;
987
    unsigned int       sc_used_math;
988
    unsigned int       sc_cause;
989
    unsigned int       sc_badvaddr;
990
  };  */
991
/* *INDENT-ON* */
992
 
993
#define N32_STACK_T_SIZE                STACK_T_SIZE
994
#define N64_STACK_T_SIZE                (2 * 8 + 4)
995
#define N32_UCONTEXT_SIGCONTEXT_OFFSET  (2 * 4 + N32_STACK_T_SIZE + 4)
996
#define N64_UCONTEXT_SIGCONTEXT_OFFSET  (2 * 8 + N64_STACK_T_SIZE + 4)
997
#define N32_SIGFRAME_SIGCONTEXT_OFFSET  (SIGFRAME_SIGCONTEXT_OFFSET \
998
                                         + RTSIGFRAME_SIGINFO_SIZE \
999
                                         + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1000
#define N64_SIGFRAME_SIGCONTEXT_OFFSET  (SIGFRAME_SIGCONTEXT_OFFSET \
1001
                                         + RTSIGFRAME_SIGINFO_SIZE \
1002
                                         + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1003
 
1004
#define N64_SIGCONTEXT_REGS     (0 * 8)
1005
#define N64_SIGCONTEXT_FPREGS   (32 * 8)
1006
#define N64_SIGCONTEXT_HI       (64 * 8)
1007
#define N64_SIGCONTEXT_LO       (65 * 8)
1008
#define N64_SIGCONTEXT_PC       (66 * 8)
1009
#define N64_SIGCONTEXT_FPCSR    (67 * 8 + 1 * 4)
1010
#define N64_SIGCONTEXT_FIR      (67 * 8 + 2 * 4)
1011
#define N64_SIGCONTEXT_CAUSE    (67 * 8 + 4 * 4)
1012
#define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
1013
 
1014
#define N64_SIGCONTEXT_REG_SIZE 8
1015
 
1016
static void
1017
mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1018
                                 struct frame_info *next_frame,
1019
                                 struct trad_frame_cache *this_cache,
1020
                                 CORE_ADDR func)
1021
{
1022
  struct gdbarch *gdbarch = get_frame_arch (next_frame);
1023
  int ireg, reg_position;
1024
  CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
1025
  const struct mips_regnum *regs = mips_regnum (gdbarch);
1026
 
1027
  if (self == &mips_linux_n32_rt_sigframe)
1028
    sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
1029
  else
1030
    sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
1031
 
1032
  if (mips_linux_restart_reg_p (gdbarch))
1033
    trad_frame_set_reg_addr (this_cache,
1034
                             (MIPS_RESTART_REGNUM
1035
                              + gdbarch_num_regs (gdbarch)),
1036
                             sigcontext_base + N64_SIGCONTEXT_REGS);
1037
 
1038
  for (ireg = 1; ireg < 32; ireg++)
1039
    trad_frame_set_reg_addr (this_cache,
1040
                             ireg + MIPS_ZERO_REGNUM
1041
                             + gdbarch_num_regs (gdbarch),
1042
                             sigcontext_base + N64_SIGCONTEXT_REGS
1043
                             + ireg * N64_SIGCONTEXT_REG_SIZE);
1044
 
1045
  for (ireg = 0; ireg < 32; ireg++)
1046
    trad_frame_set_reg_addr (this_cache,
1047
                             ireg + regs->fp0
1048
                             + gdbarch_num_regs (gdbarch),
1049
                             sigcontext_base + N64_SIGCONTEXT_FPREGS
1050
                             + ireg * N64_SIGCONTEXT_REG_SIZE);
1051
 
1052
  trad_frame_set_reg_addr (this_cache,
1053
                           regs->pc + gdbarch_num_regs (gdbarch),
1054
                           sigcontext_base + N64_SIGCONTEXT_PC);
1055
 
1056
  trad_frame_set_reg_addr (this_cache,
1057
                           regs->fp_control_status
1058
                           + gdbarch_num_regs (gdbarch),
1059
                           sigcontext_base + N64_SIGCONTEXT_FPCSR);
1060
  trad_frame_set_reg_addr (this_cache,
1061
                           regs->hi + gdbarch_num_regs (gdbarch),
1062
                           sigcontext_base + N64_SIGCONTEXT_HI);
1063
  trad_frame_set_reg_addr (this_cache,
1064
                           regs->lo + gdbarch_num_regs (gdbarch),
1065
                           sigcontext_base + N64_SIGCONTEXT_LO);
1066
  trad_frame_set_reg_addr (this_cache,
1067
                           regs->cause + gdbarch_num_regs (gdbarch),
1068
                           sigcontext_base + N64_SIGCONTEXT_CAUSE);
1069
  trad_frame_set_reg_addr (this_cache,
1070
                           regs->badvaddr + gdbarch_num_regs (gdbarch),
1071
                           sigcontext_base + N64_SIGCONTEXT_BADVADDR);
1072
 
1073
  /* Choice of the bottom of the sigframe is somewhat arbitrary.  */
1074
  trad_frame_set_id (this_cache,
1075
                     frame_id_build (func - SIGFRAME_CODE_OFFSET,
1076
                                     func));
1077
}
1078
 
1079
static void
1080
mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1081
{
1082
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
1083
  regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1084
 
1085
  /* Clear the syscall restart flag.  */
1086
  if (mips_linux_restart_reg_p (gdbarch))
1087
    regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1088
}
1089
 
1090
/* Return 1 if MIPS_RESTART_REGNUM is usable.  */
1091
 
1092
int
1093
mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1094
{
1095
  /* If we do not have a target description with registers, then
1096
     MIPS_RESTART_REGNUM will not be included in the register set.  */
1097
  if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1098
    return 0;
1099
 
1100
  /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1101
     either be GPR-sized or missing.  */
1102
  return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1103
}
1104
 
1105
/* Initialize one of the GNU/Linux OS ABIs.  */
1106
 
1107
static void
1108
mips_linux_init_abi (struct gdbarch_info info,
1109
                     struct gdbarch *gdbarch)
1110
{
1111
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1112
  enum mips_abi abi = mips_abi (gdbarch);
1113
  struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1114
 
1115
  switch (abi)
1116
    {
1117
      case MIPS_ABI_O32:
1118
        set_gdbarch_get_longjmp_target (gdbarch,
1119
                                        mips_linux_get_longjmp_target);
1120
        set_solib_svr4_fetch_link_map_offsets
1121
          (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1122
        tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1123
        tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1124
        break;
1125
      case MIPS_ABI_N32:
1126
        set_gdbarch_get_longjmp_target (gdbarch,
1127
                                        mips_linux_get_longjmp_target);
1128
        set_solib_svr4_fetch_link_map_offsets
1129
          (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1130
        set_gdbarch_long_double_bit (gdbarch, 128);
1131
        /* These floatformats should probably be renamed.  MIPS uses
1132
           the same 128-bit IEEE floating point format that IA-64 uses,
1133
           except that the quiet/signalling NaN bit is reversed (GDB
1134
           does not distinguish between quiet and signalling NaNs).  */
1135
        set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1136
        tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1137
        break;
1138
      case MIPS_ABI_N64:
1139
        set_gdbarch_get_longjmp_target (gdbarch,
1140
                                        mips64_linux_get_longjmp_target);
1141
        set_solib_svr4_fetch_link_map_offsets
1142
          (gdbarch, svr4_lp64_fetch_link_map_offsets);
1143
        set_gdbarch_long_double_bit (gdbarch, 128);
1144
        /* These floatformats should probably be renamed.  MIPS uses
1145
           the same 128-bit IEEE floating point format that IA-64 uses,
1146
           except that the quiet/signalling NaN bit is reversed (GDB
1147
           does not distinguish between quiet and signalling NaNs).  */
1148
        set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1149
        tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1150
        break;
1151
      default:
1152
        break;
1153
    }
1154
 
1155
  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1156
  set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1157
 
1158
  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1159
 
1160
  /* Enable TLS support.  */
1161
  set_gdbarch_fetch_tls_load_module_address (gdbarch,
1162
                                             svr4_fetch_objfile_link_map);
1163
 
1164
  /* Initialize this lazily, to avoid an initialization order
1165
     dependency on solib-svr4.c's _initialize routine.  */
1166
  if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1167
    {
1168
      mips_svr4_so_ops = svr4_so_ops;
1169
      mips_svr4_so_ops.in_dynsym_resolve_code
1170
        = mips_linux_in_dynsym_resolve_code;
1171
    }
1172
  set_solib_ops (gdbarch, &mips_svr4_so_ops);
1173
 
1174
  set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1175
 
1176
  set_gdbarch_core_read_description (gdbarch,
1177
                                     mips_linux_core_read_description);
1178
 
1179
  if (tdesc_data)
1180
    {
1181
      const struct tdesc_feature *feature;
1182
 
1183
      /* If we have target-described registers, then we can safely
1184
         reserve a number for MIPS_RESTART_REGNUM (whether it is
1185
         described or not).  */
1186
      gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1187
      set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1188
 
1189
      /* If it's present, then assign it to the reserved number.  */
1190
      feature = tdesc_find_feature (info.target_desc,
1191
                                    "org.gnu.gdb.mips.linux");
1192
      if (feature != NULL)
1193
        tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1194
                                 "restart");
1195
    }
1196
}
1197
 
1198
void
1199
_initialize_mips_linux_tdep (void)
1200
{
1201
  const struct bfd_arch_info *arch_info;
1202
 
1203
  for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1204
       arch_info != NULL;
1205
       arch_info = arch_info->next)
1206
    {
1207
      gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1208
                              GDB_OSABI_LINUX,
1209
                              mips_linux_init_abi);
1210
    }
1211
 
1212
  deprecated_add_core_fns (&regset_core_fns);
1213
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.