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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [mt-tdep.c] - Blame information for rev 258

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1 24 jeremybenn
/* Target-dependent code for Morpho mt processor, for GDB.
2
 
3
   Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
4
 
5
   This file is part of GDB.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
/* Contributed by Michael Snyder, msnyder@redhat.com.  */
21
 
22
#include "defs.h"
23
#include "frame.h"
24
#include "frame-unwind.h"
25
#include "frame-base.h"
26
#include "symtab.h"
27
#include "dis-asm.h"
28
#include "arch-utils.h"
29
#include "gdbtypes.h"
30
#include "gdb_string.h"
31
#include "regcache.h"
32
#include "reggroups.h"
33
#include "gdbcore.h"
34
#include "trad-frame.h"
35
#include "inferior.h"
36
#include "dwarf2-frame.h"
37
#include "infcall.h"
38
#include "gdb_assert.h"
39
 
40
enum mt_arch_constants
41
{
42
  MT_MAX_STRUCT_SIZE = 16
43
};
44
 
45
enum mt_gdb_regnums
46
{
47
  MT_R0_REGNUM,                 /* 32 bit regs.  */
48
  MT_R1_REGNUM,
49
  MT_1ST_ARGREG = MT_R1_REGNUM,
50
  MT_R2_REGNUM,
51
  MT_R3_REGNUM,
52
  MT_R4_REGNUM,
53
  MT_LAST_ARGREG = MT_R4_REGNUM,
54
  MT_R5_REGNUM,
55
  MT_R6_REGNUM,
56
  MT_R7_REGNUM,
57
  MT_R8_REGNUM,
58
  MT_R9_REGNUM,
59
  MT_R10_REGNUM,
60
  MT_R11_REGNUM,
61
  MT_R12_REGNUM,
62
  MT_FP_REGNUM = MT_R12_REGNUM,
63
  MT_R13_REGNUM,
64
  MT_SP_REGNUM = MT_R13_REGNUM,
65
  MT_R14_REGNUM,
66
  MT_RA_REGNUM = MT_R14_REGNUM,
67
  MT_R15_REGNUM,
68
  MT_IRA_REGNUM = MT_R15_REGNUM,
69
  MT_PC_REGNUM,
70
 
71
  /* Interrupt Enable pseudo-register, exported by SID.  */
72
  MT_INT_ENABLE_REGNUM,
73
  /* End of CPU regs.  */
74
 
75
  MT_NUM_CPU_REGS,
76
 
77
  /* Co-processor registers.  */
78
  MT_COPRO_REGNUM = MT_NUM_CPU_REGS,    /* 16 bit regs.  */
79
  MT_CPR0_REGNUM,
80
  MT_CPR1_REGNUM,
81
  MT_CPR2_REGNUM,
82
  MT_CPR3_REGNUM,
83
  MT_CPR4_REGNUM,
84
  MT_CPR5_REGNUM,
85
  MT_CPR6_REGNUM,
86
  MT_CPR7_REGNUM,
87
  MT_CPR8_REGNUM,
88
  MT_CPR9_REGNUM,
89
  MT_CPR10_REGNUM,
90
  MT_CPR11_REGNUM,
91
  MT_CPR12_REGNUM,
92
  MT_CPR13_REGNUM,
93
  MT_CPR14_REGNUM,
94
  MT_CPR15_REGNUM,
95
  MT_BYPA_REGNUM,               /* 32 bit regs.  */
96
  MT_BYPB_REGNUM,
97
  MT_BYPC_REGNUM,
98
  MT_FLAG_REGNUM,
99
  MT_CONTEXT_REGNUM,            /* 38 bits (treat as array of
100
                                   six bytes).  */
101
  MT_MAC_REGNUM,                        /* 32 bits.  */
102
  MT_Z1_REGNUM,                 /* 16 bits.  */
103
  MT_Z2_REGNUM,                 /* 16 bits.  */
104
  MT_ICHANNEL_REGNUM,           /* 32 bits.  */
105
  MT_ISCRAMB_REGNUM,            /* 32 bits.  */
106
  MT_QSCRAMB_REGNUM,            /* 32 bits.  */
107
  MT_OUT_REGNUM,                        /* 16 bits.  */
108
  MT_EXMAC_REGNUM,              /* 32 bits (8 used).  */
109
  MT_QCHANNEL_REGNUM,           /* 32 bits.  */
110
  MT_ZI2_REGNUM,                /* 16 bits.  */
111
  MT_ZQ2_REGNUM,                /* 16 bits.  */
112
  MT_CHANNEL2_REGNUM,           /* 32 bits.  */
113
  MT_ISCRAMB2_REGNUM,           /* 32 bits.  */
114
  MT_QSCRAMB2_REGNUM,           /* 32 bits.  */
115
  MT_QCHANNEL2_REGNUM,          /* 32 bits.  */
116
 
117
  /* Number of real registers.  */
118
  MT_NUM_REGS,
119
 
120
  /* Pseudo-registers.  */
121
  MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
122
  MT_MAC_PSEUDOREG_REGNUM,
123
  MT_COPRO_PSEUDOREG_ARRAY,
124
 
125
  MT_COPRO_PSEUDOREG_DIM_1 = 2,
126
  MT_COPRO_PSEUDOREG_DIM_2 = 8,
127
  /* The number of pseudo-registers for each coprocessor.  These
128
     include the real coprocessor registers, the pseudo-registe for
129
     the coprocessor number, and the pseudo-register for the MAC.  */
130
  MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2,
131
  /* The register number of the MAC, relative to a given coprocessor.  */
132
  MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1,
133
 
134
  /* Two pseudo-regs ('coprocessor' and 'mac').  */
135
  MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
136
                            * MT_COPRO_PSEUDOREG_DIM_1
137
                            * MT_COPRO_PSEUDOREG_DIM_2)
138
};
139
 
140
/* Return name of register number specified by REGNUM.  */
141
 
142
static const char *
143
mt_register_name (struct gdbarch *gdbarch, int regnum)
144
{
145
  static const char *const register_names[] = {
146
    /* CPU regs.  */
147
    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
148
    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
149
    "pc", "IE",
150
    /* Co-processor regs.  */
151
    "",                         /* copro register.  */
152
    "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
153
    "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
154
    "bypa", "bypb", "bypc", "flag", "context", "" /* mac.  */ , "z1", "z2",
155
    "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac.  */ , "Qchannel",
156
    "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
157
    /* Pseudo-registers.  */
158
    "coprocessor", "MAC"
159
  };
160
  static const char *array_names[MT_COPRO_PSEUDOREG_REGS
161
                                 * MT_COPRO_PSEUDOREG_DIM_1
162
                                 * MT_COPRO_PSEUDOREG_DIM_2];
163
 
164
  if (regnum < 0)
165
    return "";
166
  if (regnum < ARRAY_SIZE (register_names))
167
    return register_names[regnum];
168
  if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
169
    return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];
170
 
171
  {
172
    char *name;
173
    const char *stub;
174
    unsigned dim_1;
175
    unsigned dim_2;
176
    unsigned index;
177
 
178
    regnum -= MT_COPRO_PSEUDOREG_ARRAY;
179
    index = regnum % MT_COPRO_PSEUDOREG_REGS;
180
    dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
181
    dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
182
             %  MT_COPRO_PSEUDOREG_DIM_1);
183
 
184
    if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
185
      stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
186
    else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM)
187
      stub = "";
188
    else
189
      stub = register_names[index + MT_CPR0_REGNUM];
190
    if (!*stub)
191
      {
192
        array_names[regnum] = stub;
193
        return stub;
194
      }
195
    name = xmalloc (30);
196
    sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
197
    array_names[regnum] = name;
198
    return name;
199
  }
200
}
201
 
202
/* Return the type of a coprocessor register.  */
203
 
204
static struct type *
205
mt_copro_register_type (struct gdbarch *arch, int regnum)
206
{
207
  switch (regnum)
208
    {
209
    case MT_INT_ENABLE_REGNUM:
210
    case MT_ICHANNEL_REGNUM:
211
    case MT_QCHANNEL_REGNUM:
212
    case MT_ISCRAMB_REGNUM:
213
    case MT_QSCRAMB_REGNUM:
214
      return builtin_type_int32;
215
    case MT_BYPA_REGNUM:
216
    case MT_BYPB_REGNUM:
217
    case MT_BYPC_REGNUM:
218
    case MT_Z1_REGNUM:
219
    case MT_Z2_REGNUM:
220
    case MT_OUT_REGNUM:
221
    case MT_ZI2_REGNUM:
222
    case MT_ZQ2_REGNUM:
223
      return builtin_type_int16;
224
    case MT_EXMAC_REGNUM:
225
    case MT_MAC_REGNUM:
226
      return builtin_type_uint32;
227
    case MT_CONTEXT_REGNUM:
228
      return builtin_type_long_long;
229
    case MT_FLAG_REGNUM:
230
      return builtin_type_unsigned_char;
231
    default:
232
      if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
233
        return builtin_type_int16;
234
      else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM)
235
        {
236
          if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
237
              || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
238
            return builtin_type_uint64;
239
          else
240
            return builtin_type_uint32;
241
        }
242
      else
243
        return builtin_type_uint32;
244
    }
245
}
246
 
247
/* Given ARCH and a register number specified by REGNUM, return the
248
   type of that register.  */
249
 
250
static struct type *
251
mt_register_type (struct gdbarch *arch, int regnum)
252
{
253
  static struct type *void_func_ptr = NULL;
254
  static struct type *void_ptr = NULL;
255
  static struct type *copro_type;
256
 
257
  if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS)
258
    {
259
      if (void_func_ptr == NULL)
260
        {
261
          struct type *temp;
262
 
263
          void_ptr = lookup_pointer_type (builtin_type_void);
264
          void_func_ptr =
265
            lookup_pointer_type (lookup_function_type (builtin_type_void));
266
          temp = create_range_type (NULL, builtin_type_unsigned_int, 0, 1);
267
          copro_type = create_array_type (NULL, builtin_type_int16, temp);
268
        }
269
      switch (regnum)
270
        {
271
        case MT_PC_REGNUM:
272
        case MT_RA_REGNUM:
273
        case MT_IRA_REGNUM:
274
          return void_func_ptr;
275
        case MT_SP_REGNUM:
276
        case MT_FP_REGNUM:
277
          return void_ptr;
278
        case MT_COPRO_REGNUM:
279
        case MT_COPRO_PSEUDOREG_REGNUM:
280
          return copro_type;
281
        case MT_MAC_PSEUDOREG_REGNUM:
282
          return mt_copro_register_type (arch,
283
                                         MT_CPR0_REGNUM
284
                                         + MT_COPRO_PSEUDOREG_MAC_REGNUM);
285
        default:
286
          if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
287
            return builtin_type_int32;
288
          else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
289
            return mt_copro_register_type (arch, regnum);
290
          else
291
            {
292
              regnum -= MT_COPRO_PSEUDOREG_ARRAY;
293
              regnum %= MT_COPRO_PSEUDOREG_REGS;
294
              regnum += MT_CPR0_REGNUM;
295
              return mt_copro_register_type (arch, regnum);
296
            }
297
        }
298
    }
299
  internal_error (__FILE__, __LINE__,
300
                  _("mt_register_type: illegal register number %d"), regnum);
301
}
302
 
303
/* Return true if register REGNUM is a member of the register group
304
   specified by GROUP.  */
305
 
306
static int
307
mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
308
                         struct reggroup *group)
309
{
310
  /* Groups of registers that can be displayed via "info reg".  */
311
  if (group == all_reggroup)
312
    return (regnum >= 0
313
            && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
314
            && mt_register_name (gdbarch, regnum)[0] != '\0');
315
 
316
  if (group == general_reggroup)
317
    return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);
318
 
319
  if (group == float_reggroup)
320
    return 0;                    /* No float regs.  */
321
 
322
  if (group == vector_reggroup)
323
    return 0;                    /* No vector regs.  */
324
 
325
  /* For any that are not handled above.  */
326
  return default_register_reggroup_p (gdbarch, regnum, group);
327
}
328
 
329
/* Return the return value convention used for a given type TYPE.
330
   Optionally, fetch or set the return value via READBUF or
331
   WRITEBUF respectively using REGCACHE for the register
332
   values.  */
333
 
334
static enum return_value_convention
335
mt_return_value (struct gdbarch *gdbarch, struct type *type,
336
                  struct regcache *regcache, gdb_byte *readbuf,
337
                  const gdb_byte *writebuf)
338
{
339
  if (TYPE_LENGTH (type) > 4)
340
    {
341
      /* Return values > 4 bytes are returned in memory,
342
         pointed to by R11.  */
343
      if (readbuf)
344
        {
345
          ULONGEST addr;
346
 
347
          regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
348
          read_memory (addr, readbuf, TYPE_LENGTH (type));
349
        }
350
 
351
      if (writebuf)
352
        {
353
          ULONGEST addr;
354
 
355
          regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr);
356
          write_memory (addr, writebuf, TYPE_LENGTH (type));
357
        }
358
 
359
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
360
    }
361
  else
362
    {
363
      if (readbuf)
364
        {
365
          ULONGEST temp;
366
 
367
          /* Return values of <= 4 bytes are returned in R11.  */
368
          regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp);
369
          store_unsigned_integer (readbuf, TYPE_LENGTH (type), temp);
370
        }
371
 
372
      if (writebuf)
373
        {
374
          if (TYPE_LENGTH (type) < 4)
375
            {
376
              gdb_byte buf[4];
377
              /* Add leading zeros to the value.  */
378
              memset (buf, 0, sizeof (buf));
379
              memcpy (buf + sizeof (buf) - TYPE_LENGTH (type),
380
                      writebuf, TYPE_LENGTH (type));
381
              regcache_cooked_write (regcache, MT_R11_REGNUM, buf);
382
            }
383
          else                  /* (TYPE_LENGTH (type) == 4 */
384
            regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf);
385
        }
386
 
387
      return RETURN_VALUE_REGISTER_CONVENTION;
388
    }
389
}
390
 
391
/* If the input address, PC, is in a function prologue, return the
392
   address of the end of the prologue, otherwise return the input
393
   address.
394
 
395
   Note:  PC is likely to be the function start, since this function
396
   is mainly used for advancing a breakpoint to the first line, or
397
   stepping to the first line when we have stepped into a function
398
   call.  */
399
 
400
static CORE_ADDR
401
mt_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
402
{
403
  CORE_ADDR func_addr = 0, func_end = 0;
404
  char *func_name;
405
  unsigned long instr;
406
 
407
  if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
408
    {
409
      struct symtab_and_line sal;
410
      struct symbol *sym;
411
 
412
      /* Found a function.  */
413
      sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL, NULL);
414
      if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
415
        {
416
          /* Don't use this trick for assembly source files.  */
417
          sal = find_pc_line (func_addr, 0);
418
 
419
          if (sal.end && sal.end < func_end)
420
            {
421
              /* Found a line number, use it as end of prologue.  */
422
              return sal.end;
423
            }
424
        }
425
    }
426
 
427
  /* No function symbol, or no line symbol.  Use prologue scanning method.  */
428
  for (;; pc += 4)
429
    {
430
      instr = read_memory_unsigned_integer (pc, 4);
431
      if (instr == 0x12000000)  /* nop */
432
        continue;
433
      if (instr == 0x12ddc000)  /* copy sp into fp */
434
        continue;
435
      instr >>= 16;
436
      if (instr == 0x05dd)      /* subi sp, sp, imm */
437
        continue;
438
      if (instr >= 0x43c0 && instr <= 0x43df)   /* push */
439
        continue;
440
      /* Not an obvious prologue instruction.  */
441
      break;
442
    }
443
 
444
  return pc;
445
}
446
 
447
/* The breakpoint instruction must be the same size as the smallest
448
   instruction in the instruction set.
449
 
450
   The BP for ms1 is defined as 0x68000000 (BREAK).
451
   The BP for ms2 is defined as 0x69000000 (illegal)  */
452
 
453
static const gdb_byte *
454
mt_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
455
                       int *bp_size)
456
{
457
  static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
458
  static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
459
 
460
  *bp_size = 4;
461
  if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
462
    return ms2_breakpoint;
463
 
464
  return ms1_breakpoint;
465
}
466
 
467
/* Select the correct coprocessor register bank.  Return the pseudo
468
   regnum we really want to read.  */
469
 
470
static int
471
mt_select_coprocessor (struct gdbarch *gdbarch,
472
                        struct regcache *regcache, int regno)
473
{
474
  unsigned index, base;
475
  gdb_byte copro[4];
476
 
477
  /* Get the copro pseudo regnum. */
478
  regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
479
  base = (extract_signed_integer (&copro[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
480
          + extract_signed_integer (&copro[2], 2));
481
 
482
  regno -= MT_COPRO_PSEUDOREG_ARRAY;
483
  index = regno % MT_COPRO_PSEUDOREG_REGS;
484
  regno /= MT_COPRO_PSEUDOREG_REGS;
485
  if (base != regno)
486
    {
487
      /* Select the correct coprocessor register bank.  Invalidate the
488
         coprocessor register cache.  */
489
      unsigned ix;
490
 
491
      store_signed_integer (&copro[0], 2, regno / MT_COPRO_PSEUDOREG_DIM_2);
492
      store_signed_integer (&copro[2], 2, regno % MT_COPRO_PSEUDOREG_DIM_2);
493
      regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);
494
 
495
      /* We must flush the cache, as it is now invalid.  */
496
      for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
497
        regcache_invalidate (regcache, ix);
498
    }
499
 
500
  return index;
501
}
502
 
503
/* Fetch the pseudo registers:
504
 
505
   There are two regular pseudo-registers:
506
   1) The 'coprocessor' pseudo-register (which mirrors the
507
   "real" coprocessor register sent by the target), and
508
   2) The 'MAC' pseudo-register (which represents the union
509
   of the original 32 bit target MAC register and the new
510
   8-bit extended-MAC register).
511
 
512
   Additionally there is an array of coprocessor registers which track
513
   the coprocessor registers for each coprocessor.  */
514
 
515
static void
516
mt_pseudo_register_read (struct gdbarch *gdbarch,
517
                          struct regcache *regcache, int regno, gdb_byte *buf)
518
{
519
  switch (regno)
520
    {
521
    case MT_COPRO_REGNUM:
522
    case MT_COPRO_PSEUDOREG_REGNUM:
523
      regcache_raw_read (regcache, MT_COPRO_REGNUM, buf);
524
      break;
525
    case MT_MAC_REGNUM:
526
    case MT_MAC_PSEUDOREG_REGNUM:
527
      if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
528
          || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
529
        {
530
          ULONGEST oldmac = 0, ext_mac = 0;
531
          ULONGEST newmac;
532
 
533
          regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac);
534
          regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac);
535
          newmac =
536
            (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32);
537
          store_signed_integer (buf, 8, newmac);
538
        }
539
      else
540
        regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
541
      break;
542
    default:
543
      {
544
        unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
545
 
546
        if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
547
          mt_pseudo_register_read (gdbarch, regcache,
548
                                   MT_MAC_PSEUDOREG_REGNUM, buf);
549
        else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
550
          regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
551
      }
552
      break;
553
    }
554
}
555
 
556
/* Write the pseudo registers:
557
 
558
   Mt pseudo-registers are stored directly to the target.  The
559
   'coprocessor' register is special, because when it is modified, all
560
   the other coprocessor regs must be flushed from the reg cache.  */
561
 
562
static void
563
mt_pseudo_register_write (struct gdbarch *gdbarch,
564
                           struct regcache *regcache,
565
                           int regno, const gdb_byte *buf)
566
{
567
  int i;
568
 
569
  switch (regno)
570
    {
571
    case MT_COPRO_REGNUM:
572
    case MT_COPRO_PSEUDOREG_REGNUM:
573
      regcache_raw_write (regcache, MT_COPRO_REGNUM, buf);
574
      for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++)
575
        regcache_invalidate (regcache, i);
576
      break;
577
    case MT_MAC_REGNUM:
578
    case MT_MAC_PSEUDOREG_REGNUM:
579
      if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
580
          || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
581
        {
582
          /* The 8-byte MAC pseudo-register must be broken down into two
583
             32-byte registers.  */
584
          unsigned int oldmac, ext_mac;
585
          ULONGEST newmac;
586
 
587
          newmac = extract_unsigned_integer (buf, 8);
588
          oldmac = newmac & 0xffffffff;
589
          ext_mac = (newmac >> 32) & 0xff;
590
          regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac);
591
          regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac);
592
        }
593
      else
594
        regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
595
      break;
596
    default:
597
      {
598
        unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
599
 
600
        if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM)
601
          mt_pseudo_register_write (gdbarch, regcache,
602
                                    MT_MAC_PSEUDOREG_REGNUM, buf);
603
        else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
604
          regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
605
      }
606
      break;
607
    }
608
}
609
 
610
static CORE_ADDR
611
mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
612
{
613
  /* Register size is 4 bytes.  */
614
  return align_down (sp, 4);
615
}
616
 
617
/* Implements the "info registers" command.   When ``all'' is non-zero,
618
   the coprocessor registers will be printed in addition to the rest
619
   of the registers.  */
620
 
621
static void
622
mt_registers_info (struct gdbarch *gdbarch,
623
                   struct ui_file *file,
624
                   struct frame_info *frame, int regnum, int all)
625
{
626
  if (regnum == -1)
627
    {
628
      int lim;
629
 
630
      lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS;
631
 
632
      for (regnum = 0; regnum < lim; regnum++)
633
        {
634
          /* Don't display the Qchannel register since it will be displayed
635
             along with Ichannel.  (See below.)  */
636
          if (regnum == MT_QCHANNEL_REGNUM)
637
            continue;
638
 
639
          mt_registers_info (gdbarch, file, frame, regnum, all);
640
 
641
          /* Display the Qchannel register immediately after Ichannel.  */
642
          if (regnum == MT_ICHANNEL_REGNUM)
643
            mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all);
644
        }
645
    }
646
  else
647
    {
648
      if (regnum == MT_EXMAC_REGNUM)
649
        return;
650
      else if (regnum == MT_CONTEXT_REGNUM)
651
        {
652
          /* Special output handling for 38-bit context register.  */
653
          unsigned char *buff;
654
          unsigned int *bytes, i, regsize;
655
 
656
          regsize = register_size (gdbarch, regnum);
657
 
658
          buff = alloca (regsize);
659
          bytes = alloca (regsize * sizeof (*bytes));
660
 
661
          frame_register_read (frame, regnum, buff);
662
 
663
          fputs_filtered (gdbarch_register_name
664
                          (gdbarch, regnum), file);
665
          print_spaces_filtered (15 - strlen (gdbarch_register_name
666
                                                (gdbarch, regnum)),
667
                                 file);
668
          fputs_filtered ("0x", file);
669
 
670
          for (i = 0; i < regsize; i++)
671
            fprintf_filtered (file, "%02x", (unsigned int)
672
                              extract_unsigned_integer (buff + i, 1));
673
          fputs_filtered ("\t", file);
674
          print_longest (file, 'd', 0,
675
                         extract_unsigned_integer (buff, regsize));
676
          fputs_filtered ("\n", file);
677
        }
678
      else if (regnum == MT_COPRO_REGNUM
679
               || regnum == MT_COPRO_PSEUDOREG_REGNUM)
680
        {
681
          /* Special output handling for the 'coprocessor' register.  */
682
          gdb_byte *buf;
683
 
684
          buf = alloca (register_size (gdbarch, MT_COPRO_REGNUM));
685
          frame_register_read (frame, MT_COPRO_REGNUM, buf);
686
          /* And print.  */
687
          regnum = MT_COPRO_PSEUDOREG_REGNUM;
688
          fputs_filtered (gdbarch_register_name (gdbarch, regnum),
689
                          file);
690
          print_spaces_filtered (15 - strlen (gdbarch_register_name
691
                                                (gdbarch, regnum)),
692
                                 file);
693
          val_print (register_type (gdbarch, regnum), buf,
694
                     0, 0, file, 0, 1, 0, Val_no_prettyprint);
695
          fputs_filtered ("\n", file);
696
        }
697
      else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM)
698
        {
699
          ULONGEST oldmac, ext_mac, newmac;
700
          gdb_byte buf[3 * sizeof (LONGEST)];
701
 
702
          /* Get the two "real" mac registers.  */
703
          frame_register_read (frame, MT_MAC_REGNUM, buf);
704
          oldmac = extract_unsigned_integer
705
            (buf, register_size (gdbarch, MT_MAC_REGNUM));
706
          if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
707
              || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
708
            {
709
              frame_register_read (frame, MT_EXMAC_REGNUM, buf);
710
              ext_mac = extract_unsigned_integer
711
                (buf, register_size (gdbarch, MT_EXMAC_REGNUM));
712
            }
713
          else
714
            ext_mac = 0;
715
 
716
          /* Add them together.  */
717
          newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32);
718
 
719
          /* And print.  */
720
          regnum = MT_MAC_PSEUDOREG_REGNUM;
721
          fputs_filtered (gdbarch_register_name (gdbarch, regnum),
722
                          file);
723
          print_spaces_filtered (15 - strlen (gdbarch_register_name
724
                                              (gdbarch, regnum)),
725
                                 file);
726
          fputs_filtered ("0x", file);
727
          print_longest (file, 'x', 0, newmac);
728
          fputs_filtered ("\t", file);
729
          print_longest (file, 'u', 0, newmac);
730
          fputs_filtered ("\n", file);
731
        }
732
      else
733
        default_print_registers_info (gdbarch, file, frame, regnum, all);
734
    }
735
}
736
 
737
/* Set up the callee's arguments for an inferior function call.  The
738
   arguments are pushed on the stack or are placed in registers as
739
   appropriate.  It also sets up the return address (which points to
740
   the call dummy breakpoint).
741
 
742
   Returns the updated (and aligned) stack pointer.  */
743
 
744
static CORE_ADDR
745
mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
746
                     struct regcache *regcache, CORE_ADDR bp_addr,
747
                     int nargs, struct value **args, CORE_ADDR sp,
748
                     int struct_return, CORE_ADDR struct_addr)
749
{
750
#define wordsize 4
751
  gdb_byte buf[MT_MAX_STRUCT_SIZE];
752
  int argreg = MT_1ST_ARGREG;
753
  int split_param_len = 0;
754
  int stack_dest = sp;
755
  int slacklen;
756
  int typelen;
757
  int i, j;
758
 
759
  /* First handle however many args we can fit into MT_1ST_ARGREG thru
760
     MT_LAST_ARGREG.  */
761
  for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++)
762
    {
763
      const gdb_byte *val;
764
      typelen = TYPE_LENGTH (value_type (args[i]));
765
      switch (typelen)
766
        {
767
        case 1:
768
        case 2:
769
        case 3:
770
        case 4:
771
          regcache_cooked_write_unsigned (regcache, argreg++,
772
                                          extract_unsigned_integer
773
                                          (value_contents (args[i]),
774
                                           wordsize));
775
          break;
776
        case 8:
777
        case 12:
778
        case 16:
779
          val = value_contents (args[i]);
780
          while (typelen > 0)
781
            {
782
              if (argreg <= MT_LAST_ARGREG)
783
                {
784
                  /* This word of the argument is passed in a register.  */
785
                  regcache_cooked_write_unsigned (regcache, argreg++,
786
                                                  extract_unsigned_integer
787
                                                  (val, wordsize));
788
                  typelen -= wordsize;
789
                  val += wordsize;
790
                }
791
              else
792
                {
793
                  /* Remainder of this arg must be passed on the stack
794
                     (deferred to do later).  */
795
                  split_param_len = typelen;
796
                  memcpy (buf, val, typelen);
797
                  break;        /* No more args can be handled in regs.  */
798
                }
799
            }
800
          break;
801
        default:
802
          /* By reverse engineering of gcc output, args bigger than
803
             16 bytes go on the stack, and their address is passed
804
             in the argreg.  */
805
          stack_dest -= typelen;
806
          write_memory (stack_dest, value_contents (args[i]), typelen);
807
          regcache_cooked_write_unsigned (regcache, argreg++, stack_dest);
808
          break;
809
        }
810
    }
811
 
812
  /* Next, the rest of the arguments go onto the stack, in reverse order.  */
813
  for (j = nargs - 1; j >= i; j--)
814
    {
815
      gdb_byte *val;
816
 
817
      /* Right-justify the value in an aligned-length buffer.  */
818
      typelen = TYPE_LENGTH (value_type (args[j]));
819
      slacklen = (wordsize - (typelen % wordsize)) % wordsize;
820
      val = alloca (typelen + slacklen);
821
      memcpy (val, value_contents (args[j]), typelen);
822
      memset (val + typelen, 0, slacklen);
823
      /* Now write this data to the stack.  */
824
      stack_dest -= typelen + slacklen;
825
      write_memory (stack_dest, val, typelen + slacklen);
826
    }
827
 
828
  /* Finally, if a param needs to be split between registers and stack,
829
     write the second half to the stack now.  */
830
  if (split_param_len != 0)
831
    {
832
      stack_dest -= split_param_len;
833
      write_memory (stack_dest, buf, split_param_len);
834
    }
835
 
836
  /* Set up return address (provided to us as bp_addr).  */
837
  regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr);
838
 
839
  /* Store struct return address, if given.  */
840
  if (struct_return && struct_addr != 0)
841
    regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr);
842
 
843
  /* Set aside 16 bytes for the callee to save regs 1-4.  */
844
  stack_dest -= 16;
845
 
846
  /* Update the stack pointer.  */
847
  regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest);
848
 
849
  /* And that should do it.  Return the new stack pointer.  */
850
  return stack_dest;
851
}
852
 
853
 
854
/* The 'unwind_cache' data structure.  */
855
 
856
struct mt_unwind_cache
857
{
858
  /* The previous frame's inner most stack address.
859
     Used as this frame ID's stack_addr.  */
860
  CORE_ADDR prev_sp;
861
  CORE_ADDR frame_base;
862
  int framesize;
863
  int frameless_p;
864
 
865
  /* Table indicating the location of each and every register.  */
866
  struct trad_frame_saved_reg *saved_regs;
867
};
868
 
869
/* Initialize an unwind_cache.  Build up the saved_regs table etc. for
870
   the frame.  */
871
 
872
static struct mt_unwind_cache *
873
mt_frame_unwind_cache (struct frame_info *next_frame,
874
                        void **this_prologue_cache)
875
{
876
  struct gdbarch *gdbarch;
877
  struct mt_unwind_cache *info;
878
  CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr;
879
  unsigned long instr, upper_half, delayed_store = 0;
880
  int regnum, offset;
881
  ULONGEST sp, fp;
882
 
883
  if ((*this_prologue_cache))
884
    return (*this_prologue_cache);
885
 
886
  gdbarch = get_frame_arch (next_frame);
887
  info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache);
888
  (*this_prologue_cache) = info;
889
 
890
  info->prev_sp = 0;
891
  info->framesize = 0;
892
  info->frame_base = 0;
893
  info->frameless_p = 1;
894
  info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
895
 
896
  /* Grab the frame-relative values of SP and FP, needed below.
897
     The frame_saved_register function will find them on the
898
     stack or in the registers as appropriate.  */
899
  sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
900
  fp = frame_unwind_register_unsigned (next_frame, MT_FP_REGNUM);
901
 
902
  start_addr = frame_func_unwind (next_frame, NORMAL_FRAME);
903
 
904
  /* Return early if GDB couldn't find the function.  */
905
  if (start_addr == 0)
906
    return info;
907
 
908
  end_addr = frame_pc_unwind (next_frame);
909
  prologue_end_addr = skip_prologue_using_sal (start_addr);
910
  if (end_addr == 0)
911
  for (next_addr = start_addr; next_addr < end_addr; next_addr += 4)
912
    {
913
      instr = get_frame_memory_unsigned (next_frame, next_addr, 4);
914
      if (delayed_store)        /* previous instr was a push */
915
        {
916
          upper_half = delayed_store >> 16;
917
          regnum = upper_half & 0xf;
918
          offset = delayed_store & 0xffff;
919
          switch (upper_half & 0xfff0)
920
            {
921
            case 0x43c0:        /* push using frame pointer */
922
              info->saved_regs[regnum].addr = offset;
923
              break;
924
            case 0x43d0:        /* push using stack pointer */
925
              info->saved_regs[regnum].addr = offset;
926
              break;
927
            default:            /* lint */
928
              break;
929
            }
930
          delayed_store = 0;
931
        }
932
 
933
      switch (instr)
934
        {
935
        case 0x12000000:        /* NO-OP */
936
          continue;
937
        case 0x12ddc000:        /* copy sp into fp */
938
          info->frameless_p = 0; /* Record that the frame pointer is in use.  */
939
          continue;
940
        default:
941
          upper_half = instr >> 16;
942
          if (upper_half == 0x05dd ||   /* subi  sp, sp, imm */
943
              upper_half == 0x07dd)     /* subui sp, sp, imm */
944
            {
945
              /* Record the frame size.  */
946
              info->framesize = instr & 0xffff;
947
              continue;
948
            }
949
          if ((upper_half & 0xfff0) == 0x43c0 ||        /* frame push */
950
              (upper_half & 0xfff0) == 0x43d0)  /* stack push */
951
            {
952
              /* Save this instruction, but don't record the
953
                 pushed register as 'saved' until we see the
954
                 next instruction.  That's because of deferred stores
955
                 on this target -- GDB won't be able to read the register
956
                 from the stack until one instruction later.  */
957
              delayed_store = instr;
958
              continue;
959
            }
960
          /* Not a prologue instruction.  Is this the end of the prologue?
961
             This is the most difficult decision; when to stop scanning.
962
 
963
             If we have no line symbol, then the best thing we can do
964
             is to stop scanning when we encounter an instruction that
965
             is not likely to be a part of the prologue.
966
 
967
             But if we do have a line symbol, then we should
968
             keep scanning until we reach it (or we reach end_addr).  */
969
 
970
          if (prologue_end_addr && (prologue_end_addr > (next_addr + 4)))
971
            continue;           /* Keep scanning, recording saved_regs etc.  */
972
          else
973
            break;              /* Quit scanning: breakpoint can be set here.  */
974
        }
975
    }
976
 
977
  /* Special handling for the "saved" address of the SP:
978
     The SP is of course never saved on the stack at all, so
979
     by convention what we put here is simply the previous
980
     _value_ of the SP (as opposed to an address where the
981
     previous value would have been pushed).  This will also
982
     give us the frame base address.  */
983
 
984
  if (info->frameless_p)
985
    {
986
      info->frame_base = sp + info->framesize;
987
      info->prev_sp = sp + info->framesize;
988
    }
989
  else
990
    {
991
      info->frame_base = fp + info->framesize;
992
      info->prev_sp = fp + info->framesize;
993
    }
994
  /* Save prev_sp in saved_regs as a value, not as an address.  */
995
  trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp);
996
 
997
  /* Now convert frame offsets to actual addresses (not offsets).  */
998
  for (regnum = 0; regnum < MT_NUM_REGS; regnum++)
999
    if (trad_frame_addr_p (info->saved_regs, regnum))
1000
      info->saved_regs[regnum].addr += info->frame_base - info->framesize;
1001
 
1002
  /* The call instruction moves the caller's PC in the callee's RA reg.
1003
     Since this is an unwind, do the reverse.  Copy the location of RA
1004
     into PC (the address / regnum) so that a request for PC will be
1005
     converted into a request for the RA.  */
1006
  info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM];
1007
 
1008
  return info;
1009
}
1010
 
1011
static CORE_ADDR
1012
mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1013
{
1014
  ULONGEST pc;
1015
 
1016
  pc = frame_unwind_register_unsigned (next_frame, MT_PC_REGNUM);
1017
  return pc;
1018
}
1019
 
1020
static CORE_ADDR
1021
mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1022
{
1023
  ULONGEST sp;
1024
 
1025
  sp = frame_unwind_register_unsigned (next_frame, MT_SP_REGNUM);
1026
  return sp;
1027
}
1028
 
1029
/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1030
   dummy frame.  The frame ID's base needs to match the TOS value
1031
   saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1032
   breakpoint.  */
1033
 
1034
static struct frame_id
1035
mt_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1036
{
1037
  return frame_id_build (mt_unwind_sp (gdbarch, next_frame),
1038
                         frame_pc_unwind (next_frame));
1039
}
1040
 
1041
/* Given a GDB frame, determine the address of the calling function's
1042
   frame.  This will be used to create a new GDB frame struct.  */
1043
 
1044
static void
1045
mt_frame_this_id (struct frame_info *next_frame,
1046
                   void **this_prologue_cache, struct frame_id *this_id)
1047
{
1048
  struct mt_unwind_cache *info =
1049
    mt_frame_unwind_cache (next_frame, this_prologue_cache);
1050
 
1051
  if (!(info == NULL || info->prev_sp == 0))
1052
    (*this_id) = frame_id_build (info->prev_sp,
1053
                                 frame_func_unwind (next_frame, NORMAL_FRAME));
1054
 
1055
  return;
1056
}
1057
 
1058
static void
1059
mt_frame_prev_register (struct frame_info *next_frame,
1060
                         void **this_prologue_cache,
1061
                         int regnum, int *optimizedp,
1062
                         enum lval_type *lvalp, CORE_ADDR *addrp,
1063
                         int *realnump, gdb_byte *bufferp)
1064
{
1065
  struct mt_unwind_cache *info =
1066
    mt_frame_unwind_cache (next_frame, this_prologue_cache);
1067
 
1068
  trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1069
                                optimizedp, lvalp, addrp, realnump, bufferp);
1070
}
1071
 
1072
static CORE_ADDR
1073
mt_frame_base_address (struct frame_info *next_frame,
1074
                        void **this_prologue_cache)
1075
{
1076
  struct mt_unwind_cache *info =
1077
    mt_frame_unwind_cache (next_frame, this_prologue_cache);
1078
 
1079
  return info->frame_base;
1080
}
1081
 
1082
/* This is a shared interface:  the 'frame_unwind' object is what's
1083
   returned by the 'sniffer' function, and in turn specifies how to
1084
   get a frame's ID and prev_regs.
1085
 
1086
   This exports the 'prev_register' and 'this_id' methods.  */
1087
 
1088
static const struct frame_unwind mt_frame_unwind = {
1089
  NORMAL_FRAME,
1090
  mt_frame_this_id,
1091
  mt_frame_prev_register
1092
};
1093
 
1094
/* The sniffer is a registered function that identifies our family of
1095
   frame unwind functions (this_id and prev_register).  */
1096
 
1097
static const struct frame_unwind *
1098
mt_frame_sniffer (struct frame_info *next_frame)
1099
{
1100
  return &mt_frame_unwind;
1101
}
1102
 
1103
/* Another shared interface:  the 'frame_base' object specifies how to
1104
   unwind a frame and secure the base addresses for frame objects
1105
   (locals, args).  */
1106
 
1107
static struct frame_base mt_frame_base = {
1108
  &mt_frame_unwind,
1109
  mt_frame_base_address,
1110
  mt_frame_base_address,
1111
  mt_frame_base_address
1112
};
1113
 
1114
static struct gdbarch *
1115
mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1116
{
1117
  struct gdbarch *gdbarch;
1118
 
1119
  /* Find a candidate among the list of pre-declared architectures.  */
1120
  arches = gdbarch_list_lookup_by_info (arches, &info);
1121
  if (arches != NULL)
1122
    return arches->gdbarch;
1123
 
1124
  /* None found, create a new architecture from the information
1125
     provided.  */
1126
  gdbarch = gdbarch_alloc (&info, NULL);
1127
 
1128
  set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1129
  set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1130
  set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1131
 
1132
  set_gdbarch_register_name (gdbarch, mt_register_name);
1133
  set_gdbarch_num_regs (gdbarch, MT_NUM_REGS);
1134
  set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS);
1135
  set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM);
1136
  set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1137
  set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read);
1138
  set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write);
1139
  set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue);
1140
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1141
  set_gdbarch_breakpoint_from_pc (gdbarch, mt_breakpoint_from_pc);
1142
  set_gdbarch_decr_pc_after_break (gdbarch, 0);
1143
  set_gdbarch_frame_args_skip (gdbarch, 0);
1144
  set_gdbarch_print_insn (gdbarch, print_insn_mt);
1145
  set_gdbarch_register_type (gdbarch, mt_register_type);
1146
  set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);
1147
 
1148
  set_gdbarch_return_value (gdbarch, mt_return_value);
1149
  set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM);
1150
 
1151
  set_gdbarch_frame_align (gdbarch, mt_frame_align);
1152
 
1153
  set_gdbarch_print_registers_info (gdbarch, mt_registers_info);
1154
 
1155
  set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call);
1156
 
1157
  /* Target builtin data types.  */
1158
  set_gdbarch_short_bit (gdbarch, 16);
1159
  set_gdbarch_int_bit (gdbarch, 32);
1160
  set_gdbarch_long_bit (gdbarch, 32);
1161
  set_gdbarch_long_long_bit (gdbarch, 64);
1162
  set_gdbarch_float_bit (gdbarch, 32);
1163
  set_gdbarch_double_bit (gdbarch, 64);
1164
  set_gdbarch_long_double_bit (gdbarch, 64);
1165
  set_gdbarch_ptr_bit (gdbarch, 32);
1166
 
1167
  /* Register the DWARF 2 sniffer first, and then the traditional prologue
1168
     based sniffer.  */
1169
  frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1170
  frame_unwind_append_sniffer (gdbarch, mt_frame_sniffer);
1171
  frame_base_set_default (gdbarch, &mt_frame_base);
1172
 
1173
  /* Register the 'unwind_pc' method.  */
1174
  set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc);
1175
  set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp);
1176
 
1177
  /* Methods for saving / extracting a dummy frame's ID.
1178
     The ID's stack address must match the SP value returned by
1179
     PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos.  */
1180
  set_gdbarch_unwind_dummy_id (gdbarch, mt_unwind_dummy_id);
1181
 
1182
  return gdbarch;
1183
}
1184
 
1185
void
1186
_initialize_mt_tdep (void)
1187
{
1188
  register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init);
1189
}

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