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jeremybenn |
/* Remote debugging interface for OpenRISC 1000 JTAG debugging protocol.
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Copyright (C) 2001 Chris Ziomkowski, chris@asics.ws
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Copyright 2008 Embecosm Limited
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Areas noted by (CZ) were modified by Chris Ziomkowski <chris@asics.ws>
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*!---------------------------------------------------------------------------
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Updated for GDB 6.8 by Jeremy Bennett. All code converted to ANSI C style
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and in general to GDB format. All global OpenRISC specific functions and
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variables should now have a prefix of or1k_ or OR1K_.
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JTAG connects to or1k target ops. See or1k-tdep.c. This header is also used
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by Or1ksim, the OpenRISC 1000 architectural simulator.
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--------------------------------------------------------------------------*/
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#ifndef OR1K_JTAG__H
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#define OR1K_JTAG__H
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#include <sys/types.h>
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#include <inttypes.h>
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/*! JTAG instruction size. See JTAG documentation about these. */
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#define OR1K_JI_SIZE (4)
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/*! JTAG instructions. See JTAG documentation about these. */
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enum or1k_jtag_instr {
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OR1K_JI_CHAIN_SELECT = 3,
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OR1K_JI_DEBUG = 8
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};
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/*! Scan chain size in bits. */
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#define OR1K_SC_SIZE (4)
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/*! All JTAG chains. */
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enum or1k_jtag_chains {
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OR1K_SC_UNDEF = -1, /* Scan chain not defined */
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OR1K_SC_RISC_DEBUG = 1, /* 1 RISC Debug Interface chain (for SPRs) */
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OR1K_SC_REGISTER = 4, /* 4 JTAG Register Chain */
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OR1K_SC_WISHBONE = 5, /* 5 Wisbone Chain (for memory access) */
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};
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/*! Version of the debug interface. This affects the address on the control
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(SC_REGISTER) scan chain. */
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enum or1k_dbg_if_version_enum {
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OR1K_DBG_IF_ORPSOC, /* Version with ORPSoC */
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OR1K_DBG_IF_MOHOR /* Igor Mohor's debug interface */
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};
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/*! JTAG registers (for use with ORK1_SC_REGISTER scan chain). There are two
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flavours of this, depending which version of the debug interface you are
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using. */
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#define OR1K_JTAG_RISCOP (OR1K_DBG_IF_ORPSOC == or1k_dbg_if_version ? 0x04 : \
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0x00 )
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/* JTAG register fields */
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#define OR1K_JTAG_RISCOP_STALL 0x00000001
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#define OR1K_JTAG_RISCOP_RESET 0x00000002
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/*! The OR1K JTAG proxy protocol commands. */
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enum or1k_jtag_proxy_protocol_commands {
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OR1K_JTAG_COMMAND_READ = 1,
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OR1K_JTAG_COMMAND_WRITE = 2,
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OR1K_JTAG_COMMAND_READ_BLOCK = 3,
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OR1K_JTAG_COMMAND_WRITE_BLOCK = 4,
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OR1K_JTAG_COMMAND_CHAIN = 5,
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};
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/*! Maximum size of write block sent in one go */
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#define OR1K_MAX_JTAG_WRITE 1024
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/* Each transmit structure must begin with an integer which specifies the type
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* of command. Information after this is variable. Make sure to have all
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* information aligned properly. If we stick with 32 bit integers, it should
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* be portable onto every platform. These structures will be transmitted
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* across the network in network byte order.
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*/
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struct jtr_read_message {
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uint32_t command;
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uint32_t length;
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uint32_t address;
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};
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struct jtr_write_message {
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uint32_t command;
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uint32_t length;
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uint32_t address;
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uint32_t data_h;
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uint32_t data_l;
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};
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struct jtr_read_block_message {
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uint32_t command;
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uint32_t length;
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uint32_t address;
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int32_t num_regs;
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};
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struct jtr_write_block_message {
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uint32_t command;
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uint32_t length;
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uint32_t address;
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int32_t num_regs;
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uint32_t data[1];
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};
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struct jtr_chain_message {
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uint32_t command;
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uint32_t length;
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uint32_t chain;
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};
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/* The responses are messages specific, however convention states the first
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* word should be an error code. Again, sticking with 32 bit integers should
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* provide maximum portability. */
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struct jtr_failure_response {
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int32_t status;
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};
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struct jtr_read_response {
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int32_t status;
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uint32_t data_h;
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uint32_t data_l;
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};
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struct jtr_write_response {
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int32_t status;
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};
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struct jtr_read_block_response {
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int32_t status;
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int32_t num_regs;
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};
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struct jtr_write_block_response {
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int32_t status;
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};
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struct jtr_chain_response {
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int32_t status;
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};
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/*! Error codes for the OpenRISC 1000 JTAG debugging protocol */
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enum or1k_jtag_errors /* modified <chris@asics.ws> CZ 24/05/01 */
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{
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/* Codes > 0 are for system errors */
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OR1K_JTAG_ERR_NONE = 0,
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OR1K_JTAG_ERR_CRC = -1,
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OR1K_JTAG_ERR_MEM = -2,
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OR1K_JTAG_ERR_INVALID_COMMAND = -3,
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OR1K_JTAG_ERR_SERVER_TERMINATED = -4,
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OR1K_JTAG_ERR_NO_CONNECTION = -5,
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OR1K_JTAG_ERR_PROTOCOL_ERROR = -6,
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OR1K_JTAG_ERR_COMMAND_NOT_IMPLEMENTED = -7,
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OR1K_JTAG_ERR_INVALID_CHAIN = -8,
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OR1K_JTAG_ERR_INVALID_ADDRESS = -9,
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OR1K_JTAG_ERR_ACCESS_EXCEPTION = -10, /* Write to ROM */
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OR1K_JTAG_ERR_INVALID_LENGTH = -11,
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OR1K_JTAG_ERR_OUT_OF_MEMORY = -12,
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};
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/* Global variable identifying the debug interface version */
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extern enum or1k_dbg_if_version_enum or1k_dbg_if_version;
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/* Global OR1K JTAG functions */
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extern void or1k_jtag_init (char *args);
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extern void or1k_jtag_close ();
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extern ULONGEST or1k_jtag_read_spr (unsigned int sprnum);
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extern void or1k_jtag_write_spr (unsigned int sprnum,
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ULONGEST data);
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extern int or1k_jtag_read_mem (CORE_ADDR addr,
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gdb_byte *bdata,
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int len);
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extern int or1k_jtag_write_mem (CORE_ADDR addr,
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const gdb_byte *bdata,
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int len);
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extern void or1k_jtag_stall ();
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extern void or1k_jtag_unstall ();
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extern void or1k_jtag_wait (int fast);
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#endif /* OR1K_JTAG__H */
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