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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [or1k-tdep.c] - Blame information for rev 225

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1 24 jeremybenn
/* Target-dependent code for the or1k architecture, for GDB, the GNU Debugger.
2
 
3
   Copyright 1988-2008, Free Software Foundation, Inc.
4 178 jeremybenn
   Copyright (C) 2008, 2010 Embecosm Limited
5 24 jeremybenn
 
6
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
7
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
9
 
10
   This file is part of GDB.
11
 
12
   This program is free software; you can redistribute it and/or modify it
13
   under the terms of the GNU General Public License as published by the Free
14
   Software Foundation; either version 3 of the License, or (at your option)
15
   any later version.
16
 
17
   This program is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
20
   more details.
21
 
22
   You should have received a copy of the GNU General Public License along
23
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
24
 
25
/*-----------------------------------------------------------------------------
26
   This version for the OpenRISC 1000 architecture is a rewrite by Jeremy
27
   Bennett of the old GDB 5.3 interface to make use of gdbarch for GDB 6.8.
28
 
29
   The code tries to follow the GDB coding style.
30
 
31
   Commenting is Doxygen compatible.
32
 
33
   Much has been stripped out in the interests of getting a basic working
34
   system. This is described as the OpenRISC 1000 target architecture, so
35
   should work with 16, 32 and 64 bit versions of that architecture and should
36
   work whether or not they have floating point and/or vector registers.
37
 
38
   There was never a capability to run simulator commands (no remote target
39
   implemented the required function), so that has been removed.
40
 
41
   The info trace command has been removed. The meaning of this is not clear -
42
   it relies on a value in register 255 of the debug group, which is
43
   undocumented.
44
 
45
   All the hardware trace has been removed for the time being. The new debug
46
   interface does not support hardware trace, so there is no plan to reinstate
47
   this functionality.
48
 
49
   Support for multiple contexts (which was rudimentary, and not working) has
50
   been removed. */
51
/*---------------------------------------------------------------------------*/
52
 
53
#include "demangle.h"
54
#include "defs.h"
55
#include "gdb_string.h"
56
#include "frame.h"
57
#include "inferior.h"
58
#include "symtab.h"
59
#include "value.h"
60
#include "gdbcmd.h"
61
#include "language.h"
62
#include "gdbcore.h"
63
#include "symfile.h"
64
#include "objfiles.h"
65
#include "gdbtypes.h"
66
#include "target.h"
67
#include "regcache.h"
68
 
69
#include "opcode/or32.h"
70
#include "or1k-tdep.h"
71
 
72
#include "safe-ctype.h"
73
#include "block.h"
74
#include "reggroups.h"
75
#include "arch-utils.h"
76
#include "frame.h"
77
#include "frame-unwind.h"
78
#include "frame-base.h"
79
#include "dwarf2-frame.h"
80
#include "trad-frame.h"
81
 
82
#include <inttypes.h>
83
 
84
 
85
 
86
 
87
/* Support functions for the architecture definition */
88
 
89
 
90
/*----------------------------------------------------------------------------*/
91
/*!Get an instruction from a frame
92
 
93
   This reads from memory, but if the instruction has been substituted by a
94
   software breakpoint, returns the instruction that has been replaced, NOT
95
   the break point instruction
96
 
97
   Depending on whether this has a frame available we use a frame based memory
98
   access or independent memory access. Underneath they are both the same, but
99
   annoyingly save_frame_unwind_memory inverts the status returned!
100
 
101
   @param[in] next_frame  Information about the next frame.
102
   @param[in] addr        Address from which to get the instruction
103
 
104
   @return  The instruction */
105
/*---------------------------------------------------------------------------*/
106
 
107
static unsigned long int
108
or1k_fetch_instruction (struct frame_info *next_frame,
109
                        CORE_ADDR          addr)
110
{
111
  char  buf[OR1K_INSTLEN];
112
  int   status;
113
 
114
  struct frame_info *this_frame = get_prev_frame (next_frame);
115 146 jeremybenn
 
116
  if (NULL == this_frame)
117 24 jeremybenn
    {
118 146 jeremybenn
      status = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
119 24 jeremybenn
    }
120
  else
121
    {
122 146 jeremybenn
      status = !(safe_frame_unwind_memory (this_frame, addr, buf,
123
                                           OR1K_INSTLEN));
124 24 jeremybenn
    }
125
 
126
  if (0 != status)
127
    {
128
      memory_error (status, addr);
129
    }
130
 
131
  return  (unsigned long int)(extract_unsigned_integer (buf, OR1K_INSTLEN));
132
 
133
}       /* or1k_fetch_instruction() */
134
 
135
 
136
/*----------------------------------------------------------------------------*/
137
/*!Store an instruction in a frame
138
 
139
   This writes to memory. Unlike its counterpart to fetch the instruction it
140
   does nothing about breakpoints
141
 
142
   Depending on whether this has a frame available we use a frame based memory
143
   access or independent memory access.
144
 
145
   @param[in] next_frame  Information about the next frame. Here for
146
                          compatibility with the fetch function, but ignored.
147
   @param[in] addr        Address to which to put the instruction
148
   @param[in] insn        The instruction to be written */
149
/*---------------------------------------------------------------------------*/
150
 
151
static void
152
or1k_store_instruction (struct frame_info *next_frame,
153
                        CORE_ADDR          addr,
154
                        unsigned long int  insn)
155
{
156
  write_memory_unsigned_integer( addr, sizeof( insn ), insn );
157
 
158
}       /* or1k_store_instruction() */
159
 
160
 
161
/*---------------------------------------------------------------------------*/
162 146 jeremybenn
/*!Generic function to read bits from an instruction
163 24 jeremybenn
 
164 146 jeremybenn
   printf style. Basic syntax
165 24 jeremybenn
 
166 146 jeremybenn
      or1k_analyse_inst (inst, format, &arg1, &arg2 ...)
167 24 jeremybenn
 
168 146 jeremybenn
   Format string can contain the following characters:
169 24 jeremybenn
 
170 146 jeremybenn
   - SPACE:  Ignored, just for layout
171
   - 0:      Match with a zero bit
172
   - 1:      Match with a one bit
173
   - %<n>b:  Match <n> bits to the next argument (n decimal)
174 24 jeremybenn
 
175 146 jeremybenn
   If the arg corresponding to a bit field is non-null, the value will be
176
   assigned to that argument (using NULL allows fields to be skipped).
177 24 jeremybenn
 
178 146 jeremybenn
   Any bad string will cause a fatal error. These are constant strings, so
179
   should be correct.
180 24 jeremybenn
 
181 146 jeremybenn
   The bit field must be 32 bits long. A failure here will cause a fatal error
182
   for the same reason.
183 24 jeremybenn
 
184 146 jeremybenn
   @note The format string is presented MS field to LS field, left to
185
         right. This means that it is read lowest numbered char first.
186 24 jeremybenn
 
187 146 jeremybenn
   @note Some of the arg fields may be populated, even if recognition
188
         ultimately fails.
189 24 jeremybenn
 
190 146 jeremybenn
   @param[in]  inst    The instruction to analyse
191
   @param[in]  format  The format string
192
   @param[out] ...     Argument fields
193 24 jeremybenn
 
194 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
195
/*---------------------------------------------------------------------------*/
196 24 jeremybenn
static int
197 146 jeremybenn
or1k_analyse_inst (uint32_t    inst,
198
                   const char *format,
199
                   ...)
200 24 jeremybenn
{
201 146 jeremybenn
  /* Break out each field in turn, validating as we go. */
202
  va_list     ap;
203 24 jeremybenn
 
204 146 jeremybenn
  int         i;
205
  int         iptr = 0;                  /* Instruction pointer */
206 24 jeremybenn
 
207 146 jeremybenn
  va_start (ap, format);
208 24 jeremybenn
 
209 146 jeremybenn
  for (i = 0; 0 != format[i];)
210 24 jeremybenn
    {
211 146 jeremybenn
      const char *start_ptr;
212
      char       *end_ptr;
213 24 jeremybenn
 
214 146 jeremybenn
      uint32_t    bits;                 /* Bit substring of interest */
215
      uint32_t    width;                /* Substring width */
216
      uint32_t   *arg_ptr;
217 24 jeremybenn
 
218 146 jeremybenn
      switch (format[i])
219
        {
220
        case ' ': i++; break;   /* Formatting: ignored */
221
 
222
        case '0': case '1':     /* Constant bit field */
223
          bits = (inst >> (OR1K_INSTBITLEN - iptr - 1)) & 0x1;
224
 
225
          if ((format[i] - '0') != bits)
226
            {
227
              return  0;
228
            }
229 24 jeremybenn
 
230 146 jeremybenn
          iptr++;
231
          i++;
232
          break;
233 24 jeremybenn
 
234 146 jeremybenn
        case '%':               /* Bit field */
235
          i++;
236
          start_ptr = &(format[i]);
237
          width     = strtoul (start_ptr, &end_ptr, 10);
238 24 jeremybenn
 
239 146 jeremybenn
          /* Check we got something, and if so skip on */
240
          if (start_ptr == end_ptr)
241
            {
242
              fatal ("bitstring \"%s\" at offset %d has no length field.\n",
243
                     format, i);
244
            }
245 24 jeremybenn
 
246 146 jeremybenn
          i += end_ptr - start_ptr;
247 24 jeremybenn
 
248 146 jeremybenn
          /* Look for and skip the terminating 'b'. If it's not there, we
249
             still give a fatal error, because these are fixed strings that
250
             just should not be wrong. */
251
          if ('b' != format[i++])
252
            {
253
              fatal ("bitstring \"%s\" at offset %d has no terminating 'b'.\n",
254
                     format, i);
255
            }
256 24 jeremybenn
 
257 146 jeremybenn
          /* Break out the field. There is a special case with a bit width of
258
             32. */
259
          if (32 == width)
260
            {
261
              bits = inst;
262
            }
263
          else
264
            {
265
              bits = (inst >> (OR1K_INSTBITLEN - iptr - width)) & ((1 << width) - 1);
266
            }
267 24 jeremybenn
 
268 146 jeremybenn
          arg_ptr   = va_arg (ap, uint32_t *);
269
          *arg_ptr  = bits;
270
          iptr     += width;
271
          break;
272 24 jeremybenn
 
273 146 jeremybenn
        default:
274
          fatal ("invalid character in bitstring \"%s\" at offset %d.\n",
275
                 format, i);
276
          break;
277
        }
278 24 jeremybenn
    }
279
 
280 146 jeremybenn
  /* Is the length OK? */
281
  gdb_assert (OR1K_INSTBITLEN == iptr);
282 24 jeremybenn
 
283 146 jeremybenn
  return  1;                            /* We succeeded */
284 24 jeremybenn
 
285 146 jeremybenn
}       /* or1k_analyse_inst () */
286 24 jeremybenn
 
287
 
288
/*---------------------------------------------------------------------------*/
289 146 jeremybenn
/*!Analyse a l.addi instruction
290 24 jeremybenn
 
291 146 jeremybenn
   General form is:
292 24 jeremybenn
 
293 146 jeremybenn
     l.addi  rD,rA,I
294 24 jeremybenn
 
295 146 jeremybenn
   Makes use of the generic analysis function (@see or1k_analyse_inst ()).
296 24 jeremybenn
 
297 146 jeremybenn
   @param[in]  inst      The instruction to analyse.
298
   @param[out] rd_ptr    Pointer to the rD value.
299
   @param[out] ra_ptr    Pointer to the rA value.
300
   @param[out] simm_ptr  Pointer to the signed immediate value.
301 24 jeremybenn
 
302 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
303 24 jeremybenn
/*---------------------------------------------------------------------------*/
304
static int
305 146 jeremybenn
or1k_analyse_l_addi (uint32_t      inst,
306
                     unsigned int *rd_ptr,
307
                     unsigned int *ra_ptr,
308
                     int          *simm_ptr)
309 24 jeremybenn
{
310 146 jeremybenn
  /* Instruction fields */
311
  uint32_t  rd, ra, i;
312 24 jeremybenn
 
313 146 jeremybenn
  if (or1k_analyse_inst (inst, "10 0111 %5b %5b %16b", &rd, &ra, &i))
314 24 jeremybenn
    {
315 146 jeremybenn
      /* Found it. Construct the result fields */
316
      *rd_ptr   = (unsigned int) rd;
317
      *ra_ptr   = (unsigned int) ra;
318
      *simm_ptr = (int) (((i & 0x8000) == 0x8000) ? 0xffff0000 | i : i);
319 24 jeremybenn
 
320 146 jeremybenn
      return  1;                /* Success */
321 24 jeremybenn
    }
322 146 jeremybenn
  else
323 24 jeremybenn
    {
324 146 jeremybenn
      return  0;         /* Failure */
325 24 jeremybenn
    }
326 146 jeremybenn
}       /* or1k_analyse_l_addi () */
327 24 jeremybenn
 
328
 
329 146 jeremybenn
/*---------------------------------------------------------------------------*/
330
/*!Analyse a l.sw instruction
331 24 jeremybenn
 
332 146 jeremybenn
   General form is:
333 24 jeremybenn
 
334 146 jeremybenn
     l.sw  I(rA),rB
335 24 jeremybenn
 
336 146 jeremybenn
   Makes use of the generic analysis function (@see or1k_analyse_inst ()).
337 24 jeremybenn
 
338 146 jeremybenn
   @param[in]  inst      The instruction to analyse.
339
   @param[out] simm_ptr  Pointer to the signed immediate value.
340
   @param[out] ra_ptr    Pointer to the rA value.
341
   @param[out] rb_ptr    Pointer to the rB value.
342 24 jeremybenn
 
343 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
344 24 jeremybenn
/*---------------------------------------------------------------------------*/
345 146 jeremybenn
static int
346
or1k_analyse_l_sw (uint32_t      inst,
347
                   int          *simm_ptr,
348
                   unsigned int *ra_ptr,
349
                   unsigned int *rb_ptr)
350 24 jeremybenn
{
351 146 jeremybenn
  /* Instruction fields */
352
  uint32_t  ihi, ilo, ra, rb;
353 24 jeremybenn
 
354 146 jeremybenn
  if (or1k_analyse_inst (inst, "11 0101 %5b %5b %5b %11b", &ihi, &ra, &rb,
355
                         &ilo))
356 24 jeremybenn
 
357
    {
358 146 jeremybenn
      /* Found it. Construct the result fields */
359
      *simm_ptr  = (int) ((ihi << 11) | ilo);
360
      *simm_ptr |= ((ihi & 0x10) == 0x10) ? 0xffff0000 : 0;
361 24 jeremybenn
 
362 146 jeremybenn
      *ra_ptr    = (unsigned int) ra;
363
      *rb_ptr    = (unsigned int) rb;
364 24 jeremybenn
 
365 146 jeremybenn
      return  1;                /* Success */
366 24 jeremybenn
    }
367
  else
368
    {
369 146 jeremybenn
      return  0;         /* Failure */
370 24 jeremybenn
    }
371 146 jeremybenn
}       /* or1k_analyse_l_sw () */
372 24 jeremybenn
 
373
 
374
 
375
 
376
/* Functions defining the architecture */
377
 
378
 
379
/*----------------------------------------------------------------------------*/
380
/*!Determine the return convention used for a given type
381
 
382
   Optionally, fetch or set the return value via "readbuf" or "writebuf"
383
   respectively using "regcache" for the register values.
384
 
385
   The OpenRISC 1000 returns scalar values via R11 and (for 64 bit values on
386
   32 bit architectures) R12. Structs and unions are returned by reference,
387
   with the address in R11
388
 
389
   Throughout use read_memory(), not target_read_memory(), since the address
390
   may be invalid and we want an error reported (read_memory() is
391
   target_read_memory() with error reporting).
392
 
393
   @todo This implementation is labelled OR1K, but in fact is just for the 32
394
         bit version, OR32. This should be made explicit
395
 
396
   @param[in]  gdbarch   The GDB architecture being used
397
   @param[in]  type      The type of the entity to be returned
398
   @param[in]  regcache  The register cache
399
   @param[in]  readbuf   Buffer into which the return value should be written
400
   @param[out] writebuf  Buffer from which the return value should be written
401
 
402
   @return  The type of return value */
403
/*---------------------------------------------------------------------------*/
404
 
405
static enum return_value_convention
406
or1k_return_value (struct gdbarch  *gdbarch,
407
                   struct type     *type,
408
                   struct regcache *regcache,
409
                   gdb_byte        *readbuf,
410
                   const gdb_byte  *writebuf)
411
{
412
  enum type_code  rv_type = TYPE_CODE (type);
413
  unsigned int    rv_size = TYPE_LENGTH (type);
414
  ULONGEST        tmp;
415
 
416
  /* Deal with struct/union and large scalars first. Large (> 4 byte) scalars
417
     are returned via a pointer (despite what is says in the architecture
418
     document). Result pointed to by R11 */
419
 
420
  if((TYPE_CODE_STRUCT == rv_type) ||
421
     (TYPE_CODE_UNION  == rv_type) ||
422
     (rv_size          >  4))
423
    {
424
      if (readbuf)
425
        {
426
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
427
          read_memory (tmp, readbuf, rv_size);
428
        }
429
      if (writebuf)
430
        {
431
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
432
          write_memory (tmp, writebuf, rv_size);
433
        }
434
 
435
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
436
    }
437
 
438
  /* 1-4 byte scalars are returned in R11 */
439
 
440
  if (readbuf)
441
    {
442
      regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
443
      store_unsigned_integer (readbuf, rv_size, tmp);
444
    }
445
  if (writebuf)
446
    {
447
      gdb_byte buf[4];
448
      memset (buf, 0, sizeof (buf));     /* Pad with zeros if < 4 bytes */
449
 
450
      if (BFD_ENDIAN_BIG == gdbarch_byte_order (gdbarch))
451
        {
452
          memcpy (buf + sizeof (buf) - rv_size, writebuf, rv_size);
453
        }
454
      else
455
        {
456
          memcpy (buf,                          writebuf, rv_size);
457
        }
458
 
459
      regcache_cooked_write (regcache, OR1K_RV_REGNUM, buf);
460
    }
461
 
462
  return RETURN_VALUE_REGISTER_CONVENTION;
463
 
464
}       /* or1k_return_value() */
465
 
466
 
467
/*----------------------------------------------------------------------------*/
468
/*!Determine the instruction to use for a breakpoint.
469
 
470
   Given the address at which to insert a breakpoint (bp_addr), what will
471
   that breakpoint be?
472
 
473
   For or1k, we have a breakpoint instruction. Since all or1k instructions
474
   are 32 bits, this is all we need, regardless of address.
475
 
476
   @param[in]  gdbarch  The GDB architecture being used
477
   @param[in]  bp_addr  The breakpoint address in question
478
   @param[out] bp_size  The size of instruction selected
479
 
480
   @return  The chosen breakpoint instruction */
481
/*---------------------------------------------------------------------------*/
482
 
483
static const gdb_byte *
484
or1k_breakpoint_from_pc (struct gdbarch *gdbarch,
485
                         CORE_ADDR      *bp_addr,
486
                         int            *bp_size)
487
{
488
  static const gdb_byte breakpoint[] = OR1K_BRK_INSTR_STRUCT;
489
 
490
  *bp_size = OR1K_INSTLEN;
491
  return breakpoint;
492
 
493
}       /* or1k_breakpoint_from_pc() */
494
 
495
 
496
/*----------------------------------------------------------------------------*/
497
/*!Determine if we are executing a delay slot
498
 
499
   Looks at the instruction at the previous instruction to see if it was one
500 225 jeremybenn
   with a delay slot. But it also has to be the address prior to NPC, because
501
   we may have just taken an exception.
502 24 jeremybenn
 
503
   @param[in] gdbarch     The GDB architecture being used
504
   @param[in] this_frame  Information about THIS frame
505
 
506
   @return  1 (true) if this instruction is executing a delay slot, 0 (false)
507
   otherwise. */
508
/*--------------------------------------------------------------------------*/
509
 
510
static int
511
or1k_single_step_through_delay( struct gdbarch    *gdbarch,
512
                                struct frame_info *this_frame )
513
{
514
  struct regcache   *regcache = get_current_regcache ();
515
  ULONGEST           val;
516
  CORE_ADDR          ppc;
517 225 jeremybenn
  CORE_ADDR          npc;
518 24 jeremybenn
  int                index;
519
 
520 225 jeremybenn
  /* Get and the previous and current instruction addresses. If they are not
521
     adjacent, we cannot be in a delay slot. */
522 24 jeremybenn
  regcache_cooked_read_unsigned (regcache, OR1K_PPC_REGNUM, &val);
523 225 jeremybenn
  ppc        = (CORE_ADDR) val;
524
  regcache_cooked_read_unsigned (regcache, OR1K_NPC_REGNUM, &val);
525
  npc        = (CORE_ADDR) val;
526 24 jeremybenn
 
527 225 jeremybenn
  if (0x4 != (npc - ppc))
528
    {
529
      return  0;
530
    }
531 24 jeremybenn
 
532 225 jeremybenn
  /* Decode the previous instruction to see if it was a branch or a jump, and
533
     hence we are in a delay slot. */
534
  index = insn_decode (or1k_fetch_instruction (this_frame, ppc));
535
  return  or32_opcodes[index].flags & OR32_IF_DELAY;
536
 
537 24 jeremybenn
}       /* or1k_single_step_through_delay() */
538
 
539
 
540
/*----------------------------------------------------------------------------*/
541
/*!Read a pseudo register
542
 
543
   Since we have no pseudo registers this is a null function for now.
544
 
545
   @todo The floating point and vector registers ought to be done as
546
         pseudo-registers.
547
 
548
   @param[in]  gdbarch   The GDB architecture to consider
549
   @param[in]  regcache  The cached register values as an array
550
   @param[in]  regnum    The register to read
551
   @param[out] buf       A buffer to put the result in */
552
/*---------------------------------------------------------------------------*/
553
 
554
static void
555
or1k_pseudo_register_read (struct gdbarch  *gdbarch,
556
                           struct regcache *regcache,
557
                           int              regnum,
558
                           gdb_byte        *buf)
559
{
560
  return;
561
 
562
}       /* or1k_pseudo_register_read() */
563
 
564
 
565
/*----------------------------------------------------------------------------*/
566
/*!Write a pseudo register
567
 
568
   Since we have no pseudo registers this is a null function for now.
569
 
570
   @todo The floating point and vector registers ought to be done as
571
         pseudo-registers.
572
 
573
   @param[in] gdbarch   The GDB architecture to consider
574
   @param[in] regcache  The cached register values as an array
575
   @param[in] regnum    The register to read
576
   @param[in] buf       A buffer with the value to write */
577
/*---------------------------------------------------------------------------*/
578
 
579
static void
580
or1k_pseudo_register_write (struct gdbarch  *gdbarch,
581
                            struct regcache *regcache,
582
                            int              regnum,
583
                            const gdb_byte  *buf)
584
{
585
  return;
586
 
587
}       /* or1k_pseudo_register_write() */
588
 
589
 
590
/*----------------------------------------------------------------------------*/
591
/*!Return the register name for the OpenRISC 1000 architecture
592
 
593
   This version converted to ANSI C, made static and incorporates the static
594
   table of register names (this is the only place it is referenced).
595
 
596
   @todo The floating point and vector registers ought to be done as
597
         pseudo-registers.
598
 
599
   @param[in] gdbarch  The GDB architecture being used
600
   @param[in] regnum    The register number
601
 
602
   @return  The textual name of the register */
603
/*---------------------------------------------------------------------------*/
604
 
605
static const char *
606
or1k_register_name (struct gdbarch *gdbarch,
607
                    int             regnum)
608
{
609
  static char *or1k_gdb_reg_names[OR1K_TOTAL_NUM_REGS] =
610
    {
611
      /* general purpose registers */
612
      "gpr0",  "gpr1",  "gpr2",  "gpr3",  "gpr4",  "gpr5",  "gpr6",  "gpr7",
613
      "gpr8",  "gpr9",  "gpr10", "gpr11", "gpr12", "gpr13", "gpr14", "gpr15",
614
      "gpr16", "gpr17", "gpr18", "gpr19", "gpr20", "gpr21", "gpr22", "gpr23",
615
      "gpr24", "gpr25", "gpr26", "gpr27", "gpr28", "gpr29", "gpr30", "gpr31",
616
 
617
      /* previous program counter, next program counter and status register */
618
      "ppc",   "npc",   "sr"
619
 
620
      /* Floating point and vector registers may appear as pseudo registers in
621
         the future. */
622
    };
623
 
624
  return or1k_gdb_reg_names[regnum];
625
 
626
}       /* or1k_register_name() */
627
 
628
 
629
/*----------------------------------------------------------------------------*/
630
/*!Identify the type of a register
631
 
632
   @todo I don't fully understand exactly what this does, but I think this
633
         makes sense!
634
 
635
   @param[in] arch     The GDB architecture to consider
636
   @param[in] regnum   The register to identify
637
 
638
   @return  The type of the register */
639
/*---------------------------------------------------------------------------*/
640
 
641
static struct type *
642
or1k_register_type (struct gdbarch *arch,
643
                    int             regnum)
644
{
645
  static struct type *void_func_ptr = NULL;
646
  static struct type *void_ptr      = NULL;
647
 
648
  /* Set up the static pointers once, the first time*/
649
  if (NULL == void_func_ptr)
650
    {
651
      void_ptr = lookup_pointer_type (builtin_type_void);
652
      void_func_ptr =
653
        lookup_pointer_type (lookup_function_type (builtin_type_void));
654
    }
655
 
656
  if((regnum >= 0) && (regnum < OR1K_TOTAL_NUM_REGS))
657
    {
658
      switch (regnum)
659
        {
660
        case OR1K_PPC_REGNUM:
661
        case OR1K_NPC_REGNUM:
662
          return void_func_ptr;         /* Pointer to code */
663
 
664
        case OR1K_SP_REGNUM:
665
        case OR1K_FP_REGNUM:
666
          return void_ptr;                      /* Pointer to data */
667
 
668
        default:
669
          return builtin_type_int32;    /* Data */
670
        }
671
    }
672
 
673
  internal_error (__FILE__, __LINE__,
674
                  _("or1k_register_type: illegal register number %d"), regnum);
675
 
676
}       /* or1k_register_type() */
677
 
678
 
679
/*----------------------------------------------------------------------------*/
680
/*!Handle the "info register" command
681
 
682
   Print the identified register, unless it is -1, in which case print all
683
   the registers. If all is 1 means all registers, otherwise only the core
684
   GPRs.
685
 
686
   @todo At present all registers are printed with the default method. Should
687
         there be something special for FP registers?
688
 
689
   @param[in] gdbarch  The GDB architecture being used
690
   @param[in] file     File handle for use with any custom I/O
691
   @param[in] frame    Frame info for use with custom output
692
   @param[in] regnum   Register of interest, or -1 if all registers
693
   @param[in] all      1 if all means all, 0 if all means just GPRs
694
 
695
   @return  The aligned stack frame address */
696
/*---------------------------------------------------------------------------*/
697
 
698
static void
699
or1k_registers_info (struct gdbarch    *gdbarch,
700
                     struct ui_file    *file,
701
                     struct frame_info *frame,
702
                     int                regnum,
703
                     int                all)
704
{
705
  if (-1 == regnum)
706
    {
707
      /* Do all (valid) registers */
708
      unsigned int  lim = all ? OR1K_NUM_REGS : OR1K_MAX_GPR_REGS;
709
 
710
      for (regnum = 0; regnum < lim; regnum++) {
711
        if ('\0' != *(or1k_register_name (gdbarch, regnum)))
712
          {
713
            or1k_registers_info (gdbarch, file, frame, regnum, all);
714
          }
715
      }
716
    }
717
  else
718
    {
719
      /* Do one specified register - if it is part of this architecture */
720
      if ('\0' == *(or1k_register_name (gdbarch, regnum)))
721
        {
722
          error ("Not a valid register for the current processor type");
723
        }
724
      else
725
        {
726
          default_print_registers_info (gdbarch, file, frame, regnum, all);
727
        }
728
    }
729
}       /* or1k_registers_info() */
730
 
731
 
732
/*----------------------------------------------------------------------------*/
733
/*!Identify if a register belongs to a specified group
734
 
735
   Return true if the specified register is a member of the specified
736
   register group.
737
 
738
   These are the groups of registers that can be displayed via "info reg".
739
 
740
   @todo The Vector and Floating Point registers ought to be displayed as
741
         pseudo-registers.
742
 
743
   @param[in] gdbarch  The GDB architecture to consider
744
   @param[in] regnum   The register to consider
745
   @param[in] group    The group to consider
746
 
747
   @return  True (1) if regnum is a member of group */
748
/*---------------------------------------------------------------------------*/
749
 
750
static int
751
or1k_register_reggroup_p (struct gdbarch  *gdbarch,
752
                          int              regnum,
753
                          struct reggroup *group)
754
{
755
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
756
 
757
  /* All register group */
758
  if (group == all_reggroup)
759
    {
760
      return ((regnum >= 0) &&
761
              (regnum < OR1K_TOTAL_NUM_REGS) &&
762
              (or1k_register_name (gdbarch, regnum)[0] != '\0'));
763
    }
764
 
765
  /* For now everything except the PC */
766
  if (group == general_reggroup)
767
    {
768
      return ((regnum >= OR1K_ZERO_REGNUM) &&
769
              (regnum <  tdep->num_gpr_regs) &&
770
              (regnum != OR1K_PPC_REGNUM) &&
771
              (regnum != OR1K_NPC_REGNUM));
772
    }
773
 
774
  if (group == float_reggroup)
775
    {
776
      return 0;                  /* No float regs.  */
777
    }
778
 
779
  if (group == vector_reggroup)
780
    {
781
      return 0;                  /* No vector regs.  */
782
    }
783
 
784
  /* For any that are not handled above.  */
785
  return default_register_reggroup_p (gdbarch, regnum, group);
786
 
787
}       /* or1k_register_reggroup_p() */
788
 
789
 
790
/*----------------------------------------------------------------------------*/
791
/*!Skip a function prolog
792
 
793
   If the input address, PC, is in a function prologue, return the address of
794
   the end of the prologue, otherwise return the input  address.
795
 
796
   @see For details of the stack frame, see the function
797
   or1k_frame_unwind_cache().
798
 
799
   This function reuses the helper functions from or1k_frame_unwind_cache() to
800 146 jeremybenn
   locate the various parts of the prolog, any or all of which may be missing.
801 24 jeremybenn
 
802
   @param[in] gdbarch  The GDB architecture being used
803
   @param[in] pc       Current program counter
804
 
805
   @return  The address of the end of the prolog if the PC is in a function
806 146 jeremybenn
            prologue, otherwise the input  address.                           */
807
/*----------------------------------------------------------------------------*/
808 24 jeremybenn
 
809
static CORE_ADDR
810
or1k_skip_prologue (struct gdbarch *gdbarch,
811
                    CORE_ADDR       pc)
812
{
813 146 jeremybenn
  CORE_ADDR     addr;
814
  uint32_t      inst;
815 24 jeremybenn
 
816 146 jeremybenn
  unsigned int  ra, rb, rd;             /* For instruction analysis */
817
  int           simm;
818
 
819
  int           frame_size = 0;
820 24 jeremybenn
 
821 146 jeremybenn
  /* Try using SAL first if we have symbolic information available. */
822
  if (find_pc_partial_function (pc, NULL, NULL, NULL))
823 24 jeremybenn
    {
824
      CORE_ADDR  prologue_end = skip_prologue_using_sal( pc );
825
 
826 146 jeremybenn
      return  (prologue_end > pc) ? prologue_end : pc;
827 24 jeremybenn
    }
828
 
829 146 jeremybenn
  /* Look to see if we can find any of the standard prologue sequence. All
830
     quite difficult, since any or all of it may be missing. So this is just a
831
     best guess! */
832
  addr = pc;                            /* Where we have got to */
833
  inst = or1k_fetch_instruction (NULL, addr);
834 24 jeremybenn
 
835 146 jeremybenn
  /* Look for the new stack pointer being set up. */
836
  if (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
837
      (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
838
      (simm < 0) && (0 == (simm % 4)))
839 24 jeremybenn
    {
840 146 jeremybenn
      frame_size  = -simm;
841
      addr       += OR1K_INSTLEN;
842
      inst        = or1k_fetch_instruction (NULL, addr);
843 24 jeremybenn
    }
844
 
845 146 jeremybenn
  /* Look for the frame pointer being manipulated. */
846
  if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
847
      (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb) &&
848
      (simm >= 0) && (0 == (simm % 4)))
849
    {
850
      addr += OR1K_INSTLEN;
851
      inst  = or1k_fetch_instruction (NULL, addr);
852 24 jeremybenn
 
853 146 jeremybenn
      gdb_assert (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
854
                  (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
855
                  (simm == frame_size));
856 24 jeremybenn
 
857 146 jeremybenn
      addr += OR1K_INSTLEN;
858
      inst  = or1k_fetch_instruction (NULL, addr);
859
    }
860 24 jeremybenn
 
861 146 jeremybenn
  /* Look for the link register being saved */
862
  if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
863
      (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb) &&
864
      (simm >= 0) && (0 == (simm % 4)))
865
    {
866
      addr += OR1K_INSTLEN;
867
      inst  = or1k_fetch_instruction (NULL, addr);
868 24 jeremybenn
    }
869
 
870 146 jeremybenn
  /* Look for callee-saved register being saved. The register must be one
871
     of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
872
     r24, r26, r28, r30).*/
873
  while (1)
874
    {
875
      if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
876
          (OR1K_SP_REGNUM == ra) && (rb >= OR1K_FIRST_SAVED_REGNUM) &&
877
          (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
878 24 jeremybenn
        {
879
          addr += OR1K_INSTLEN;
880 146 jeremybenn
          inst  = or1k_fetch_instruction (NULL, addr);
881 24 jeremybenn
        }
882
      else
883
        {
884 146 jeremybenn
          /* Nothing else to look for. We have found the end of the prologue. */
885
          return  addr;
886 24 jeremybenn
        }
887
    }
888
}       /* or1k_skip_prologue() */
889
 
890
 
891
/*----------------------------------------------------------------------------*/
892
/*!Align the stack frame
893
 
894
   OpenRISC 1000 uses a falling stack frame, so this aligns down to the
895
   nearest 8 bytes. Useful when we'be building a dummy frame.
896
 
897
   @param[in] gdbarch  The GDB architecture being used
898
   @param[in] sp       Current stack pointer
899
 
900
   @return  The aligned stack frame address */
901
/*---------------------------------------------------------------------------*/
902
 
903
static CORE_ADDR
904
or1k_frame_align (struct gdbarch *gdbarch,
905
                  CORE_ADDR       sp)
906
{
907
  return align_down (sp, OR1K_STACK_ALIGN);
908
 
909
}       /* or1k_frame_align() */
910
 
911
 
912
/*----------------------------------------------------------------------------*/
913
/*!Unwind the program counter from a stack frame
914
 
915
   This just uses the built in frame unwinder
916
 
917
   @param[in] gdbarch     The GDB architecture being used
918
   @param[in] next_frame  Frame info for the NEXT frame
919
 
920
   @return  The program counter for THIS frame */
921
/*---------------------------------------------------------------------------*/
922
 
923
static CORE_ADDR
924
or1k_unwind_pc (struct gdbarch    *gdbarch,
925
                struct frame_info *next_frame)
926
{
927 146 jeremybenn
  CORE_ADDR pc = frame_unwind_register_unsigned (next_frame, OR1K_NPC_REGNUM);
928 24 jeremybenn
 
929 146 jeremybenn
  return pc;
930
 
931 24 jeremybenn
}       /* or1k_unwind_pc() */
932
 
933
 
934
/*----------------------------------------------------------------------------*/
935
/*!Unwind the stack pointer from a stack frame
936
 
937
   This just uses the built in frame unwinder
938
 
939
   @param[in] gdbarch     The GDB architecture being used
940
   @param[in] next_frame  Frame info for the NEXT frame
941
 
942
   @return  The stack pointer for THIS frame */
943
/*---------------------------------------------------------------------------*/
944
 
945
static CORE_ADDR
946
or1k_unwind_sp (struct gdbarch    *gdbarch,
947
                struct frame_info *next_frame)
948
{
949 146 jeremybenn
  CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
950 24 jeremybenn
 
951 146 jeremybenn
  return sp;
952
 
953 24 jeremybenn
}       /* or1k_unwind_sp() */
954
 
955
 
956
/*----------------------------------------------------------------------------*/
957
/*!Create a dummy stack frame
958
 
959
   The arguments are placed in registers and/or pushed on the stack as per the
960
   OR1K ABI.
961
 
962
   @param[in] gdbarch        The architecture to use
963
   @param[in] function       Pointer to the function that will be called
964
   @param[in] regcache       The register cache to use
965
   @param[in] bp_addr        Breakpoint address
966
   @param[in] nargs          Number of ags to push
967
   @param[in] args           The arguments
968
   @param[in] sp             The stack pointer
969
   @param[in] struct_return  True (1) if this returns a structure
970
   @param[in] struct_addr    Address for returning structures
971
 
972
   @return  The updated stack pointer */
973
/*---------------------------------------------------------------------------*/
974
 
975
static CORE_ADDR
976
or1k_push_dummy_call (struct gdbarch  *gdbarch,
977
                      struct value    *function,
978
                      struct regcache *regcache,
979
                      CORE_ADDR        bp_addr,
980
                      int              nargs,
981
                      struct value   **args,
982
                      CORE_ADDR        sp,
983
                      int              struct_return,
984
                      CORE_ADDR        struct_addr)
985
{
986
  int           argreg;
987
  int           argnum;
988
  int           first_stack_arg;
989
  int           stack_offset = 0;
990
 
991
  unsigned int  bpa = (gdbarch_tdep (gdbarch))->bytes_per_address;
992
  unsigned int  bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
993
 
994
  /* Return address */
995
  regcache_cooked_write_unsigned (regcache, OR1K_LR_REGNUM, bp_addr);
996
 
997
  /* Register for the next argument */
998
  argreg = OR1K_FIRST_ARG_REGNUM;
999
 
1000
  /* Location for a returned structure. This is passed as a silent first
1001
     argument. */
1002
 
1003
  if (struct_return)
1004
    {
1005
      regcache_cooked_write_unsigned (regcache, OR1K_FIRST_ARG_REGNUM,
1006
                                      struct_addr);
1007
      argreg++;
1008
    }
1009
 
1010
  /* Put as many args as possible in registers */
1011
  for (argnum = 0; argnum < nargs; argnum++)
1012
    {
1013
      char           *val;
1014
      char            valbuf[sizeof (ULONGEST) ];
1015
 
1016
      struct value   *arg      = args[argnum];
1017
      struct type    *arg_type = check_typedef (value_type (arg));
1018
      int             len      = arg_type->length;
1019
      enum type_code  typecode = arg_type->main_type->code;
1020
 
1021
      /* The EABI passes structures that do not fit in a register by
1022
         reference. In all other cases, pass the structure by value.  */
1023
      if((len > bpw) &&
1024
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1025
        {
1026
 
1027
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1028
          len      = bpa;
1029
          val      = valbuf;
1030
        }
1031
      else
1032
        {
1033
          val = (char *)value_contents (arg);
1034
        }
1035
 
1036
      if((len > bpw) && (argreg <= (OR1K_LAST_ARG_REGNUM - 1)))
1037
        {
1038
 
1039
          /* Big scalars use two registers, must be pair aligned. This code
1040
             breaks if we can have quad-word scalars (e.g. long double). */
1041
          ULONGEST regval = extract_unsigned_integer (val, len);
1042
 
1043
          gdb_assert (len <= (bpw * 2));
1044
 
1045
          argreg = 1 == (argreg & 1) ? argreg + 1 : argreg;
1046
          regcache_cooked_write_unsigned (regcache, argreg, regval >> bpw);
1047
          regcache_cooked_write_unsigned (regcache, argreg + 1,
1048
                                          regval && ((ULONGEST)(1 << bpw) - 1));
1049
          argreg += 2;
1050
        }
1051
      else if (argreg <= OR1K_LAST_ARG_REGNUM)
1052
        {
1053
          regcache_cooked_write_unsigned (regcache, argreg,
1054
                                          extract_unsigned_integer (val, len));
1055
          argreg++;
1056
        }
1057
      else
1058
        {
1059
          /* Run out of regs */
1060
          break;
1061
        }
1062
    }
1063
 
1064
  first_stack_arg = argnum;
1065
 
1066
  /* If we get here with argnum < nargs, then arguments remain to be placed on
1067
     the stack. This is tricky, since they must be pushed in reverse order and
1068
     the stack in the end must be aligned. The only solution is to do it in
1069
     two stages, the first to compute the stack size, the second to save the
1070
     args. */
1071
 
1072
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1073
    {
1074
      struct value   *arg      = args[argnum];
1075
      struct type    *arg_type = check_typedef (value_type (arg));
1076
      int             len      = arg_type->length;
1077
      enum type_code  typecode = arg_type->main_type->code;
1078
 
1079
      if((len > bpw) &&
1080
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1081
        {
1082
          /* Large structures are passed as addresses */
1083
          sp -= bpa;
1084
        }
1085
      else
1086
        {
1087
        /* Big scalars use more than one word. Code here allows for future
1088
         quad-word entities (e.g. long double) */
1089
          sp -= ((len + bpw - 1) / bpw) * bpw;
1090
        }
1091
    }
1092
 
1093
  sp           = gdbarch_frame_align (gdbarch, sp);
1094
  stack_offset = 0;
1095
 
1096
  /* Push the remaining args on the stack */
1097
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1098
    {
1099
      char           *val;
1100
      char            valbuf[sizeof (ULONGEST) ];
1101
 
1102
      struct value   *arg      = args[argnum];
1103
      struct type    *arg_type = check_typedef (value_type (arg));
1104
      int             len      = arg_type->length;
1105
      enum type_code  typecode = arg_type->main_type->code;
1106
 
1107
      /* The EABI passes structures that do not fit in a register by
1108
         reference. In all other cases, pass the structure by value.  */
1109
      if((len > bpw) &&
1110
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1111
        {
1112
 
1113
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1114
          len      = bpa;
1115
          val      = valbuf;
1116
        }
1117
      else
1118
        {
1119
          val = (char *)value_contents (arg);
1120
        }
1121
 
1122
      gdb_assert (len <= (bpw * 2));
1123
 
1124
      write_memory (sp + stack_offset, val, len);
1125
      stack_offset += ((len + bpw - 1) / bpw) * bpw;
1126
    }
1127
 
1128
  /* Save the updated stack pointer */
1129
  regcache_cooked_write_unsigned (regcache, OR1K_SP_REGNUM, sp);
1130
 
1131
  return sp;
1132
 
1133
}       /* or1k_push_dummy_call() */
1134
 
1135
 
1136
/*----------------------------------------------------------------------------*/
1137
/*!Unwind a dummy stack frame
1138
 
1139
   Tear down a dummy frame created by or1k_push_dummy_call(). This data has to
1140
   be constructed manually from the data in our hand. The frame_id info in
1141
   next_frame is not complete, and a call to unwind it will just recurse to us
1142
   (we think).
1143
 
1144
   The stack pointer and program counter can be unwound. From the program
1145
   counter, the start of the function can be determined.
1146
 
1147
   @param[in] gdbarch     The architecture to use
1148
   @param[in] next_frame  Information about the next frame
1149
 
1150
   @return  Frame ID of the preceding frame */
1151
/*---------------------------------------------------------------------------*/
1152
 
1153
static struct frame_id
1154
or1k_unwind_dummy_id (struct gdbarch    *gdbarch,
1155
                      struct frame_info *next_frame)
1156
{
1157
  CORE_ADDR  this_sp = gdbarch_unwind_sp (gdbarch, next_frame);
1158
  CORE_ADDR  this_pc = gdbarch_unwind_pc (gdbarch, next_frame);
1159
 
1160
  CORE_ADDR  start_addr;
1161
  CORE_ADDR  end_addr;
1162
 
1163
  /* Try using SAL to find the true function start. Otherwise the PC will
1164
     have to be a proxy for the start of the function. */
1165
  if (find_pc_partial_function (this_pc, NULL, &start_addr, &end_addr))
1166
    {
1167
      return  frame_id_build (this_sp, start_addr);
1168
    }
1169
  else
1170
    {
1171
      return  frame_id_build (this_sp, this_pc);
1172
    }
1173
 
1174
}       /* or1k_unwind_dummy_id() */
1175
 
1176
 
1177 146 jeremybenn
 
1178
 
1179
 
1180
/* Support functions for frame handling */
1181
 
1182
 
1183 24 jeremybenn
/*----------------------------------------------------------------------------*/
1184 146 jeremybenn
/*!Initialize a prologue (unwind) cache
1185
 
1186
   Build up the information (saved registers etc) for the given frame if it
1187
   does not already exist.
1188
 
1189
   STACK FORMAT
1190
   ============
1191
 
1192
   The OR1K has a falling stack frame and a simple prolog. The Stack pointer
1193
   is R1 and the frame pointer R2. The frame base is therefore the address
1194
   held in R2 and the stack pointer (R1) is the frame base of the NEXT frame.
1195
 
1196
   @verbatim
1197
   l.addi  r1,r1,-frame_size    # SP now points to end of new stack frame
1198
   @endverbatim
1199
 
1200
   The stack pointer may not be set up in a frameless function (e.g. a simple
1201
   leaf function).
1202
 
1203
   @verbatim
1204
   l.sw    fp_loc(r1),r2        # old FP saved in new stack frame
1205
   l.addi  r2,r1,frame_size     # FP now points to base of new stack frame
1206
   @endverbatim
1207
 
1208
   The frame pointer is not necessarily saved right at the end of the stack
1209
   frame - OR1K saves enough space for any args to called functions right at
1210
   the end (this is a difference from the Architecture Manual).
1211
 
1212
   @verbatim
1213
   l.sw    lr_loc(r1),r9        # Link (return) address
1214
   @endverbatim
1215
 
1216
   The link register is usally saved at fp_loc - 4. It may not be saved at all
1217
   in a leaf function.
1218
 
1219
   @verbatim
1220
   l.sw    reg_loc(r1),ry       # Save any callee saved regs
1221
   @endverbatim
1222
 
1223
   The offsets x for the callee saved registers generally (always?) rise in
1224
   increments of 4, starting at fp_loc + 4. If the frame pointer is omitted
1225
   (an option to GCC), then it may not be saved at all. There may be no callee
1226
   saved registers.
1227
 
1228
   So in summary none of this may be present. However what is present seems
1229
   always to follow this fixed order, and occur before any substantive code
1230
   (it is possible for GCC to have more flexible scheduling of the prologue,
1231
   but this does not seem to occur for OR1K).
1232
 
1233
   ANALYSIS
1234
   ========
1235
 
1236
   This prolog is used, even for -O3 with GCC.
1237
 
1238
   All this analysis must allow for the possibility that the PC is in the
1239
   middle of the prologue. Data should only be set up insofar as it has been
1240
   computed.
1241
 
1242
   A suite of "helper" routines are used, allowing reuse for
1243
   or1k_skip_prologue().
1244
 
1245
   Reportedly, this is only valid for frames less than 0x7fff in size.
1246
 
1247
   @param[in]     next_frame           The NEXT frame (i.e. inner from here,
1248
                                       the one THIS frame called)
1249
   @param[in,out] this_prologue_cache  The prologue cache. If not supplied, we
1250
                                       build it.
1251
 
1252
   @return  The prolog cache (duplicates the return through the argument) */
1253
/*---------------------------------------------------------------------------*/
1254
 
1255
static struct trad_frame_cache *
1256
or1k_frame_unwind_cache (struct frame_info  *next_frame,
1257
                         void              **this_prologue_cache)
1258
{
1259
  struct gdbarch          *gdbarch;
1260
  struct trad_frame_cache *info;
1261
 
1262
  CORE_ADDR                this_pc;
1263
  CORE_ADDR                this_sp;
1264
  int                      frame_size = 0;
1265
 
1266
  CORE_ADDR                start_addr;
1267
  CORE_ADDR                end_addr;
1268
 
1269
  /* Nothing to do if we already have this info */
1270
  if (NULL != *this_prologue_cache)
1271
    {
1272
      return *this_prologue_cache;
1273
    }
1274
 
1275
  /* Get a new prologue cache and populate it with default values */
1276
  info                 = trad_frame_cache_zalloc (next_frame);
1277
  *this_prologue_cache = info;
1278
 
1279
  /* Find the start address of THIS function (which is a NORMAL frame, even if
1280
     the NEXT frame is the sentinel frame) and the end of its prologue.  */
1281
  start_addr = frame_func_unwind (next_frame, NORMAL_FRAME);
1282
 
1283
  /* Return early if GDB couldn't find the function.  */
1284
  if (start_addr == 0)
1285
    {
1286
      return  info;
1287
    }
1288
 
1289
  /* Unwind key registers for THIS frame. */
1290
  gdbarch = get_frame_arch (next_frame);
1291
  this_pc = or1k_unwind_pc (gdbarch, next_frame);
1292
  this_sp = or1k_unwind_sp (gdbarch, next_frame);
1293
 
1294
  /* The frame base of THIS frame is its stack pointer. This is the same
1295
     whether we are frameless or not. */
1296
  trad_frame_set_this_base (info, this_sp);
1297
 
1298
  /* The default is to find the PC of the PREVIOUS frame in the link register
1299
     of this frame. This may be changed if we find the link register was saved
1300
     on the stack. */
1301
  trad_frame_set_reg_realreg (info, OR1K_NPC_REGNUM, OR1K_LR_REGNUM);
1302
 
1303
  /* We should only examine code that is in the prologue and which has been
1304
     executed. This is all code up to (but not including) end_addr or the PC,
1305
     whichever is first. */
1306
  end_addr = or1k_skip_prologue (gdbarch, start_addr);
1307
  end_addr = (this_pc > end_addr) ? end_addr : this_pc;
1308
 
1309
  /* All the following analysis only occurs if we are in the prologue and have
1310
     executed the code. Check we have a sane prologue size, and if zero we
1311
     are frameless and can give up here. */
1312
  if (end_addr < start_addr)
1313
    {
1314
      fatal ("end addr 0x%08x is less than start addr 0x%08x\n",
1315
             (unsigned int) end_addr, (unsigned int) start_addr);
1316
    }
1317
 
1318
  if (end_addr == start_addr)
1319
    {
1320
      frame_size = 0;
1321
    }
1322
  else
1323
    {
1324
      /* have a frame. Look for the various components */
1325
      CORE_ADDR  addr = start_addr;     /* Where we have got to */
1326
      uint32_t   inst = or1k_fetch_instruction (next_frame, addr);
1327
 
1328
      unsigned int  ra, rb, rd;         /* For instruction analysis */
1329
      int           simm;
1330
 
1331
      /* Look for the new stack pointer being set up. */
1332
      if (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
1333
          (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
1334
          (simm < 0) && (0 == (simm % 4)))
1335
        {
1336
          frame_size  = -simm;
1337
          addr       += OR1K_INSTLEN;
1338
          inst        = or1k_fetch_instruction (next_frame, addr);
1339
 
1340
          /* The stack pointer of the PREVIOUS frame is frame_size greater
1341
             than the stack pointer of THIS frame. */
1342
          trad_frame_set_reg_value (info, OR1K_SP_REGNUM,
1343
                                    this_sp + frame_size);
1344
        }
1345
 
1346
      /* Look for the frame pointer being manipulated. */
1347
      if ((addr < end_addr) &&
1348
          or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1349
          (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb) &&
1350
          (simm >= 0) && (0 == (simm % 4)))
1351
        {
1352
          addr += OR1K_INSTLEN;
1353
          inst  = or1k_fetch_instruction (next_frame, addr);
1354
 
1355
          /* At this stage, we can find the frame pointer of the PREVIOUS
1356
             frame on the stack of the current frame. */
1357
          trad_frame_set_reg_addr (info, OR1K_FP_REGNUM, this_sp + simm);
1358
 
1359
          /* Look for the new frame pointer being set up */
1360
          if (addr < end_addr)
1361
            {
1362
              gdb_assert (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
1363
                          (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
1364
                          (simm == frame_size));
1365
 
1366
              addr += OR1K_INSTLEN;
1367
              inst  = or1k_fetch_instruction (next_frame, addr);
1368
 
1369
              /* If we have got this far, the stack pointer of the PREVIOUS
1370
                 frame is the frame pointer of THIS frame. */
1371
              trad_frame_set_reg_realreg (info, OR1K_SP_REGNUM, OR1K_FP_REGNUM);
1372
            }
1373
        }
1374
 
1375
      /* Look for the link register being saved */
1376
      if ((addr < end_addr) &&
1377
          or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1378
          (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb) &&
1379
          (simm >= 0) && (0 == (simm % 4)))
1380
        {
1381
          addr += OR1K_INSTLEN;
1382
          inst  = or1k_fetch_instruction (next_frame, addr);
1383
 
1384
          /* If the link register is saved in the THIS frame, it holds the
1385
             value of the PC in the PREVIOUS frame. This overwrites the
1386
             previous information about finding the PC in the link
1387
             register. */
1388
          trad_frame_set_reg_addr (info, OR1K_NPC_REGNUM, this_sp + simm);
1389
        }
1390
 
1391
      /* Look for callee-saved register being save. The register must be one
1392
         of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
1393
         r24, r26, r28, r30).*/
1394
      while (addr < end_addr)
1395
        {
1396
          if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1397
              (OR1K_SP_REGNUM == ra) && (rb >= OR1K_FIRST_SAVED_REGNUM) &&
1398
              (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
1399
            {
1400
              addr += OR1K_INSTLEN;
1401
              inst  = or1k_fetch_instruction (next_frame, addr);
1402
 
1403
              /* The register in the PREVIOUS frame can be found at this
1404
                 location in THIS frame */
1405
              trad_frame_set_reg_addr (info, rb, this_sp + simm);
1406
            }
1407
          else
1408
            {
1409
              break;                    /* Not a register save instruction */
1410
            }
1411
        }
1412
    }
1413
 
1414
  /* Build the frame ID */
1415
  trad_frame_set_id (info, frame_id_build (this_sp, start_addr));
1416
 
1417
  return info;
1418
 
1419
}       /* or1k_frame_unwind_cache() */
1420
 
1421
 
1422
/*----------------------------------------------------------------------------*/
1423
/*!Find the frame ID of this frame
1424
 
1425
   Given a GDB frame (called by THIS frame), determine the address of oru
1426
   frame and from this create a new GDB frame struct. The info required is
1427
   obtained from the prologue cache for THIS frame.
1428
 
1429
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1430
                                    one THIS frame called)
1431
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
1432
   @param[out] this_id              Frame ID of our own frame.
1433
 
1434
   @return  Frame ID for THIS frame */
1435
/*---------------------------------------------------------------------------*/
1436
 
1437
static void
1438
or1k_frame_this_id (struct frame_info  *next_frame,
1439
                    void              **this_prologue_cache,
1440
                    struct frame_id    *this_id)
1441
{
1442
  struct trad_frame_cache *info =
1443
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
1444
 
1445
  trad_frame_get_id (info, this_id);
1446
 
1447
}       /* or1k_frame_this_id() */
1448
 
1449
 
1450
/*----------------------------------------------------------------------------*/
1451
/*!Get a register from THIS frame
1452
 
1453
   Given a pointer to the NEXT frame, return the details of a register in the
1454
   PREVIOUS frame.
1455
 
1456
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1457
                                    one THIS frame called)
1458
   @param[in]  this_prologue_cache  Any cached prologue associated with THIS
1459
                                    frame, which may therefore tell us about
1460
                                    registers in the PREVIOUS frame.
1461
   @param[in]  regnum               The register of interest in the PREVIOUS
1462
                                    frame
1463
   @param[out] optimizedp           True (1) if the register has been
1464
                                    optimized out.
1465
   @param[out] lvalp                What sort of l-value (if any) does the
1466
                                    register represent
1467
   @param[out] addrp                Address in THIS frame where the register's
1468
                                    value may be found (-1 if not available)
1469
   @param[out] realregp             Register in this frame where the
1470
                                    register's value may be found (-1 if not
1471
                                    available)
1472
   @param[out] bufferp              If non-NULL, buffer where the value held
1473
   in the register may be put */
1474
/*--------------------------------------------------------------------------*/
1475
 
1476
static void
1477
or1k_frame_prev_register (struct frame_info  *next_frame,
1478
                          void              **this_prologue_cache,
1479
                          int                 regnum,
1480
                          int                *optimizedp,
1481
                          enum lval_type     *lvalp,
1482
                          CORE_ADDR          *addrp,
1483
                          int                *realregp,
1484
                          gdb_byte           *bufferp)
1485
{
1486
  struct trad_frame_cache *info =
1487
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
1488
 
1489
  trad_frame_get_register (info, next_frame, regnum, optimizedp, lvalp, addrp,
1490
                           realregp, bufferp);
1491
 
1492
}       /* or1k_frame_prev_register() */
1493
 
1494
 
1495
/*----------------------------------------------------------------------------*/
1496
/*!Return the base address of the frame
1497
 
1498
   The commenting in the GDB source code could mean our stack pointer or our
1499
   frame pointer, since we have a falling stack, but index within the frame
1500
   using negative offsets from the FP.
1501
 
1502
   This seems to be the function used to determine the value of $fp, but the
1503
   value required seems to be the stack pointer, so we return that, even if
1504
   the value of $fp will be wrong.
1505
 
1506
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1507
                                    one THIS frame called)
1508
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
1509
 
1510
   @return  The frame base address */
1511
/*---------------------------------------------------------------------------*/
1512
 
1513
static CORE_ADDR
1514
or1k_frame_base_address (struct frame_info  *next_frame,
1515
                         void              **this_prologue_cache)
1516
{
1517
  return  frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
1518
 
1519
}       /* or1k_frame_base_address() */
1520
 
1521
 
1522
/*----------------------------------------------------------------------------*/
1523 24 jeremybenn
/*!The OpenRISC 1000 registered frame sniffer
1524
 
1525
   This function just identifies our family of frame sniffing functions.
1526
 
1527
   @param[in] next_frame  The "next" (i.e. inner, newer from here, the one
1528
                          THIS frame called) frame.
1529
 
1530
                          @return  A pointer to a struct identifying the sniffing functions */
1531
/*---------------------------------------------------------------------------*/
1532
 
1533
static const struct frame_unwind *
1534
or1k_frame_sniffer (struct frame_info *next_frame)
1535
{
1536
  static const struct frame_unwind or1k_frame_unwind = {
1537
    .type          = NORMAL_FRAME,
1538
    .this_id       = or1k_frame_this_id,
1539
    .prev_register = or1k_frame_prev_register,
1540
    .unwind_data   = NULL,
1541
    .sniffer       = NULL,
1542
    .prev_pc       = NULL,
1543
    .dealloc_cache = NULL
1544
  };
1545
 
1546
  return  &or1k_frame_unwind;
1547
 
1548
}       /* or1k_frame_sniffer() */
1549
 
1550
 
1551
/*----------------------------------------------------------------------------*/
1552
/*!Architecture initialization for OpenRISC 1000
1553
 
1554
   Looks for a candidate architecture in the list of architectures supplied
1555
   using the info supplied. If none match, create a new architecture.
1556
 
1557
   @param[in] info    Information about the target architecture
1558
   @param[in] arches  The list of currently know architectures
1559
 
1560
   @return  A structure describing the target architecture */
1561
/*---------------------------------------------------------------------------*/
1562
 
1563
static struct gdbarch *
1564
or1k_gdbarch_init (struct gdbarch_info  info,
1565
                   struct gdbarch_list *arches)
1566
{
1567
  static struct frame_base     or1k_frame_base;
1568
  struct        gdbarch       *gdbarch;
1569
  struct        gdbarch_tdep  *tdep;
1570
  const struct  bfd_arch_info *binfo;
1571
 
1572
  /* Find a candidate among the list of pre-declared architectures.  */
1573
  arches = gdbarch_list_lookup_by_info (arches, &info);
1574
  if (NULL != arches)
1575
    {
1576
      return arches->gdbarch;
1577
    }
1578
 
1579
  /* None found, create a new architecture from the information
1580
     provided. Can't initialize all the target dependencies until we actually
1581
     know which target we are talking to, but put in some defaults for now. */
1582
 
1583
  binfo                   = info.bfd_arch_info;
1584
  tdep                    = xmalloc (sizeof *tdep);
1585
  tdep->num_matchpoints   = OR1K_MAX_MATCHPOINTS;
1586
  tdep->num_gpr_regs      = OR1K_MAX_GPR_REGS;
1587
  tdep->bytes_per_word    = binfo->bits_per_word    / binfo->bits_per_byte;
1588
  tdep->bytes_per_address = binfo->bits_per_address / binfo->bits_per_byte;
1589
  gdbarch                 = gdbarch_alloc (&info, tdep);
1590
 
1591
  /* Target data types.  */
1592
  set_gdbarch_short_bit             (gdbarch, 16);
1593
  set_gdbarch_int_bit               (gdbarch, 32);
1594
  set_gdbarch_long_bit              (gdbarch, 32);
1595
  set_gdbarch_long_long_bit         (gdbarch, 64);
1596
  set_gdbarch_float_bit             (gdbarch, 32);
1597
  set_gdbarch_float_format          (gdbarch, floatformats_ieee_single);
1598
  set_gdbarch_double_bit            (gdbarch, 64);
1599
  set_gdbarch_double_format         (gdbarch, floatformats_ieee_double);
1600
  set_gdbarch_long_double_bit       (gdbarch, 64);
1601
  set_gdbarch_long_double_format    (gdbarch, floatformats_ieee_double);
1602
  set_gdbarch_ptr_bit               (gdbarch, binfo->bits_per_address);
1603
  set_gdbarch_addr_bit              (gdbarch, binfo->bits_per_address);
1604
  set_gdbarch_char_signed           (gdbarch, 1);
1605
 
1606
  /* Information about the target architecture */
1607
  set_gdbarch_return_value          (gdbarch, or1k_return_value);
1608
  set_gdbarch_breakpoint_from_pc    (gdbarch, or1k_breakpoint_from_pc);
1609
  set_gdbarch_single_step_through_delay
1610
                                    (gdbarch, or1k_single_step_through_delay);
1611
  set_gdbarch_have_nonsteppable_watchpoint
1612
                                    (gdbarch, 1);
1613
  switch (gdbarch_byte_order (gdbarch))
1614
    {
1615
    case BFD_ENDIAN_BIG:
1616
      set_gdbarch_print_insn        (gdbarch, print_insn_big_or32);
1617
      break;
1618
 
1619
    case BFD_ENDIAN_LITTLE:
1620
      set_gdbarch_print_insn        (gdbarch, print_insn_little_or32);
1621
      break;
1622
 
1623
    case BFD_ENDIAN_UNKNOWN:
1624
      error ("or1k_gdbarch_init: Unknown endianism");
1625
      break;
1626
    }
1627
 
1628
  /* Register architecture */
1629
  set_gdbarch_pseudo_register_read  (gdbarch, or1k_pseudo_register_read);
1630
  set_gdbarch_pseudo_register_write (gdbarch, or1k_pseudo_register_write);
1631
  set_gdbarch_num_regs              (gdbarch, OR1K_NUM_REGS);
1632
  set_gdbarch_num_pseudo_regs       (gdbarch, OR1K_NUM_PSEUDO_REGS);
1633
  set_gdbarch_sp_regnum             (gdbarch, OR1K_SP_REGNUM);
1634
  set_gdbarch_pc_regnum             (gdbarch, OR1K_NPC_REGNUM);
1635
  set_gdbarch_ps_regnum             (gdbarch, OR1K_SR_REGNUM);
1636
  set_gdbarch_deprecated_fp_regnum  (gdbarch, OR1K_FP_REGNUM);
1637
 
1638
  /* Functions to supply register information */
1639
  set_gdbarch_register_name         (gdbarch, or1k_register_name);
1640
  set_gdbarch_register_type         (gdbarch, or1k_register_type);
1641
  set_gdbarch_print_registers_info  (gdbarch, or1k_registers_info);
1642
  set_gdbarch_register_reggroup_p   (gdbarch, or1k_register_reggroup_p);
1643
 
1644
  /* Functions to analyse frames */
1645
  set_gdbarch_skip_prologue         (gdbarch, or1k_skip_prologue);
1646
  set_gdbarch_inner_than            (gdbarch, core_addr_lessthan);
1647
  set_gdbarch_frame_align           (gdbarch, or1k_frame_align);
1648
  set_gdbarch_frame_red_zone_size   (gdbarch, OR1K_FRAME_RED_ZONE_SIZE);
1649
 
1650
  /* Functions to access frame data */
1651
  set_gdbarch_unwind_pc             (gdbarch, or1k_unwind_pc);
1652
  set_gdbarch_unwind_sp             (gdbarch, or1k_unwind_sp);
1653
 
1654
  /* Functions handling dummy frames */
1655
  set_gdbarch_push_dummy_call       (gdbarch, or1k_push_dummy_call);
1656
  set_gdbarch_unwind_dummy_id       (gdbarch, or1k_unwind_dummy_id);
1657
 
1658
  /* High level frame base sniffer */
1659
  or1k_frame_base.unwind      = or1k_frame_sniffer (NULL);
1660
  or1k_frame_base.this_base   = or1k_frame_base_address;
1661
  or1k_frame_base.this_locals = or1k_frame_base_address;
1662
  or1k_frame_base.this_args   = or1k_frame_base_address;
1663
  frame_base_set_default            (gdbarch, &or1k_frame_base);
1664
 
1665
  /* Low level frame sniffers */
1666
  frame_unwind_append_sniffer       (gdbarch, dwarf2_frame_sniffer);
1667
  frame_unwind_append_sniffer       (gdbarch, or1k_frame_sniffer);
1668
 
1669
 
1670
  return gdbarch;
1671
 
1672
}       /* or1k_gdbarch_init() */
1673
 
1674
 
1675
/*----------------------------------------------------------------------------*/
1676
/*!Dump the target specific data for this architecture
1677
 
1678
   @param[in] gdbarch  The architecture of interest
1679
   @param[in] file     Where to dump the data */
1680
/*---------------------------------------------------------------------------*/
1681
 
1682
static void
1683
or1k_dump_tdep (struct gdbarch *gdbarch,
1684
                struct ui_file *file)
1685
{
1686
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1687
 
1688
  if (NULL == tdep)
1689
    {
1690
      return;                   /* Nothing to report */
1691
    }
1692
 
1693
  fprintf_unfiltered (file, "or1k_dump_tdep: %d matchpoints available\n",
1694
                      tdep->num_matchpoints);
1695
  fprintf_unfiltered (file, "or1k_dump_tdep: %d general purpose registers\n",
1696
                      tdep->num_gpr_regs);
1697
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per word\n",
1698
                      tdep->bytes_per_word);
1699
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per address\n",
1700
                      tdep->bytes_per_address);
1701
 
1702
}       /* or1k_dump_tdep() */
1703
 
1704
 
1705
 
1706
/* Functions to add extra commands to GDB */
1707
 
1708
 
1709
/*----------------------------------------------------------------------------*/
1710
/*!Returns a special purpose register group name
1711
 
1712
   @param[in]  group  The SPR group number
1713
 
1714
   @return  The SPR name (pointer to the name argument) */
1715
/*---------------------------------------------------------------------------*/
1716
 
1717
static const char *
1718
or1k_spr_group_name (int  group)
1719
{
1720
  static const char *or1k_group_names[OR1K_NUM_SPGS] =
1721
    {
1722
      "SYS",
1723
      "DMMU",
1724
      "IMMU",
1725
      "DCACHE",
1726
      "ICACHE",
1727
      "MAC",
1728
      "DEBUG",
1729
      "PERF",
1730
      "POWER",
1731
      "PIC",
1732
      "TIMER",
1733
      "FPU"
1734
    };
1735
 
1736
  if ((0 <= group) && (group < OR1K_NUM_SPGS))
1737
    {
1738
      return or1k_group_names[group];
1739
    }
1740
  else
1741
    {
1742
      return "";
1743
    }
1744
}       /* or1k_spr_group_name() */
1745
 
1746
 
1747
/*----------------------------------------------------------------------------*/
1748
/*!Returns a special purpose register name
1749
 
1750
   @param[in]  group  The SPR group
1751
   @param[in]  index  The index within the SPR group
1752
   @param[out] name   Array to put the name in
1753
 
1754
   @return  The SPR name (pointer to the name argument) */
1755
/*---------------------------------------------------------------------------*/
1756
 
1757
static char *
1758
or1k_spr_register_name (int   group,
1759
                        int   index,
1760
                        char *name)
1761
{
1762
  char di;
1763
 
1764
  switch (group)
1765
    {
1766
 
1767
    case OR1K_SPG_SYS:
1768
      /* 1:1 names */
1769
      switch (index)
1770
        {
1771
        case OR1K_SPG_SYS_VR:       sprintf (name, "VR"      ); return  name;
1772
        case OR1K_SPG_SYS_UPR:      sprintf (name, "UPR"     ); return  name;
1773
        case OR1K_SPG_SYS_CPUCFGR:  sprintf (name, "CPUCFGR" ); return  name;
1774
        case OR1K_SPG_SYS_DMMUCFGR: sprintf (name, "DMMUCFGR"); return  name;
1775
        case OR1K_SPG_SYS_IMMUCFGR: sprintf (name, "IMMUCFGR"); return  name;
1776
        case OR1K_SPG_SYS_DCCFGR:   sprintf (name, "DCCFGR"  ); return  name;
1777
        case OR1K_SPG_SYS_ICCFGR:   sprintf (name, "ICCFGR"  ); return  name;
1778
        case OR1K_SPG_SYS_DCFGR:    sprintf (name, "DCFGR"   ); return  name;
1779
        case OR1K_SPG_SYS_PCCFGR:   sprintf (name, "PCCFGR"  ); return  name;
1780
        case OR1K_SPG_SYS_NPC:      sprintf (name, "NPC"     ); return  name;
1781
        case OR1K_SPG_SYS_SR:       sprintf (name, "SR"      ); return  name;
1782
        case OR1K_SPG_SYS_PPC:      sprintf (name, "PPC"     ); return  name;
1783
        case OR1K_SPG_SYS_FPCSR:    sprintf (name, "FPCSR"   ); return  name;
1784
        }
1785
 
1786
      /* Exception PC regs */
1787
      if((OR1K_SPG_SYS_EPCR <= index) &&
1788
         (index             <= OR1K_SPG_SYS_EPCR_END))
1789
        {
1790
          sprintf (name, "EPCR%d", index - OR1K_SPG_SYS_EPCR);
1791
          return  name;
1792
        }
1793
 
1794
      /* Exception EA regs */
1795
      if((OR1K_SPG_SYS_EEAR <= index) &&
1796
         (index             <= OR1K_SPG_SYS_EEAR_END))
1797
        {
1798
          sprintf (name, "EEAR%d", index - OR1K_SPG_SYS_EEAR);
1799
          return  name;
1800
        }
1801
 
1802
      /* Exception SR regs */
1803
      if((OR1K_SPG_SYS_ESR <= index) &&
1804
         (index            <= OR1K_SPG_SYS_ESR_END))
1805
        {
1806
          sprintf (name, "ESR%d", index - OR1K_SPG_SYS_ESR);
1807
          return  name;
1808
        }
1809
 
1810
      /* GPRs */
1811
      if((OR1K_SPG_SYS_GPR <= index) &&
1812
         (index            <= OR1K_SPG_SYS_GPR_END))
1813
        {
1814
          sprintf (name, "GPR%d", index - OR1K_SPG_SYS_GPR);
1815
          return  name;
1816
        }
1817
 
1818
      break;
1819
 
1820
    case OR1K_SPG_DMMU:
1821
    case OR1K_SPG_IMMU:
1822
      /* MMU registers. Use DMMU constants throughout, but these are identical
1823
         to the corresponding IMMU constants */
1824
      di = OR1K_SPG_DMMU == group ? 'D' : 'I';
1825
 
1826
      /* 1:1 names */
1827
      switch (index)
1828
        {
1829
        case OR1K_SPG_DMMU_DMMUCR:
1830
          sprintf (name, "%cMMUCR",  di); return  name;
1831
        case OR1K_SPG_DMMU_DMMUPR:
1832
          sprintf (name, "%cMMUPR",  di); return  name;
1833
        case OR1K_SPG_DMMU_DTLBEIR:
1834
          sprintf (name, "%cTLBEIR", di); return  name;
1835
        }
1836
 
1837
      /* ATB Match registers */
1838
      if((OR1K_SPG_DMMU_DATBMR <= index) &&
1839
         (index                <= OR1K_SPG_DMMU_DATBMR_END))
1840
        {
1841
          sprintf (name, "%cATBMR%d", di, index - OR1K_SPG_DMMU_DATBMR);
1842
          return  name;
1843
        }
1844
 
1845
      /* ATB Translate registers */
1846
      if((OR1K_SPG_DMMU_DATBTR <= index) &&
1847
         (index                <= OR1K_SPG_DMMU_DATBTR_END))
1848
        {
1849
          sprintf (name, "%cATBTR%d", di, index - OR1K_SPG_DMMU_DATBTR);
1850
          return  name;
1851
        }
1852
 
1853
      /* TLB Way 1 Match registers */
1854
      if((OR1K_SPG_DMMU_DTLBW1MR <= index) &&
1855
         (index                <= OR1K_SPG_DMMU_DTLBW1MR_END))
1856
        {
1857
          sprintf (name, "%cTLBW1MR%d", di, index - OR1K_SPG_DMMU_DTLBW1MR);
1858
          return  name;
1859
        }
1860
 
1861
      /* TLB Way 1 Translate registers */
1862
      if((OR1K_SPG_DMMU_DTLBW1TR <= index) &&
1863
         (index                <= OR1K_SPG_DMMU_DTLBW1TR_END))
1864
        {
1865
          sprintf (name, "%cTLBW1TR%d", di, index - OR1K_SPG_DMMU_DTLBW1TR);
1866
          return  name;
1867
        }
1868
 
1869
      /* TLB Way 2 Match registers */
1870
      if((OR1K_SPG_DMMU_DTLBW2MR <= index) &&
1871
         (index                <= OR1K_SPG_DMMU_DTLBW2MR_END))
1872
        {
1873
          sprintf (name, "%cTLBW2MR%d", di, index - OR1K_SPG_DMMU_DTLBW2MR);
1874
          return  name;
1875
        }
1876
 
1877
      /* TLB Way 2 Translate registers */
1878
      if((OR1K_SPG_DMMU_DTLBW2TR <= index) &&
1879
         (index                <= OR1K_SPG_DMMU_DTLBW2TR_END))
1880
        {
1881
          sprintf (name, "%cTLBW2TR%d", di, index - OR1K_SPG_DMMU_DTLBW2TR);
1882
          return  name;
1883
        }
1884
 
1885
      /* TLB Way 3 Match registers */
1886
      if((OR1K_SPG_DMMU_DTLBW3MR <= index) &&
1887
         (index                <= OR1K_SPG_DMMU_DTLBW3MR_END))
1888
        {
1889
          sprintf (name, "%cTLBW3MR%d", di, index - OR1K_SPG_DMMU_DTLBW3MR);
1890
          return  name;
1891
        }
1892
 
1893
      /* TLB Way 3 Translate registers */
1894
      if((OR1K_SPG_DMMU_DTLBW3TR <= index) &&
1895
         (index                <= OR1K_SPG_DMMU_DTLBW3TR_END))
1896
        {
1897
          sprintf (name, "%cTLBW3TR%d", di, index - OR1K_SPG_DMMU_DTLBW3TR);
1898
          return  name;
1899
        }
1900
 
1901
      break;
1902
 
1903
    case OR1K_SPG_DC:
1904
      /* Data cache registers. These do not have an exact correspondence with
1905
         their instruction cache counterparts, so must be done separately. */
1906
 
1907
      /* 1:1 names */
1908
      switch (index)
1909
        {
1910
        case OR1K_SPG_DC_DCCR:  sprintf (name, "DCCR" ); return  name;
1911
        case OR1K_SPG_DC_DCBPR: sprintf (name, "DCBPR"); return  name;
1912
        case OR1K_SPG_DC_DCBFR: sprintf (name, "DCBFR"); return  name;
1913
        case OR1K_SPG_DC_DCBIR: sprintf (name, "DCBIR"); return  name;
1914
        case OR1K_SPG_DC_DCBWR: sprintf (name, "DCBWR"); return  name;
1915
        case OR1K_SPG_DC_DCBLR: sprintf (name, "DCBLR"); return  name;
1916
        }
1917
 
1918
      break;
1919
 
1920
    case OR1K_SPG_IC:
1921
      /* Instruction cache registers */
1922
 
1923
      /* 1:1 names */
1924
      switch (index)
1925
        {
1926
        case OR1K_SPG_IC_ICCR:  sprintf (name, "ICCR" ); return  name;
1927
        case OR1K_SPG_IC_ICBPR: sprintf (name, "ICBPR"); return  name;
1928
        case OR1K_SPG_IC_ICBIR: sprintf (name, "ICBIR"); return  name;
1929
        case OR1K_SPG_IC_ICBLR: sprintf (name, "ICBLR"); return  name;
1930
        }
1931
 
1932
      break;
1933
 
1934
    case OR1K_SPG_MAC:
1935
      /* MAC registers */
1936
 
1937
      /* 1:1 names */
1938
      switch (index)
1939
        {
1940
        case OR1K_SPG_MAC_MACLO: sprintf (name, "MACLO"); return  name;
1941
        case OR1K_SPG_MAC_MACHI: sprintf (name, "MACHI"); return  name;
1942
        }
1943
 
1944
      break;
1945
 
1946
    case OR1K_SPG_DEBUG:
1947
      /* Debug registers */
1948
 
1949
      /* Debug Value registers */
1950
      if((OR1K_SPG_DEBUG_DVR <= index) &&
1951
         (index                <= OR1K_SPG_DEBUG_DVR_END))
1952
        {
1953
          sprintf (name, "DVR%d", index - OR1K_SPG_DEBUG_DVR);
1954
          return  name;
1955
        }
1956
 
1957
      /* Debug Control registers */
1958
      if((OR1K_SPG_DEBUG_DCR <= index) &&
1959
         (index                <= OR1K_SPG_DEBUG_DCR_END))
1960
        {
1961
          sprintf (name, "DCR%d", index - OR1K_SPG_DEBUG_DCR);
1962
          return  name;
1963
        }
1964
 
1965
      /* 1:1 names */
1966
      switch (index)
1967
        {
1968
        case OR1K_SPG_DEBUG_DMR1:  sprintf (name, "DMR1" ); return  name;
1969
        case OR1K_SPG_DEBUG_DMR2:  sprintf (name, "DMR2" ); return  name;
1970
        case OR1K_SPG_DEBUG_DCWR0: sprintf (name, "DCWR0"); return  name;
1971
        case OR1K_SPG_DEBUG_DCWR1: sprintf (name, "DCWR1"); return  name;
1972
        case OR1K_SPG_DEBUG_DSR:   sprintf (name, "DSR"  ); return  name;
1973
        case OR1K_SPG_DEBUG_DRR:   sprintf (name, "DRR"  ); return  name;
1974
        }
1975
 
1976
      break;
1977
 
1978
    case OR1K_SPG_PC:
1979
      /* Performance Counter registers */
1980
 
1981
      /* Performance Counters Count registers */
1982
      if((OR1K_SPG_PC_PCCR <= index) &&
1983
         (index                <= OR1K_SPG_PC_PCCR_END))
1984
        {
1985
          sprintf (name, "PCCR%d", index - OR1K_SPG_PC_PCCR);
1986
          return  name;
1987
        }
1988
 
1989
      /* Performance Counters Mode registers */
1990
      if((OR1K_SPG_PC_PCMR <= index) &&
1991
         (index                <= OR1K_SPG_PC_PCMR_END))
1992
        {
1993
          sprintf (name, "PCMR%d", index - OR1K_SPG_PC_PCMR);
1994
          return  name;
1995
        }
1996
 
1997
      break;
1998
 
1999
    case OR1K_SPG_PM:
2000
      /* Power Management registers */
2001
 
2002
      /* 1:1 names */
2003
      switch (index)
2004
        {
2005
        case OR1K_SPG_PM_PMR:  sprintf (name, "PMR"); return  name;
2006
        }
2007
 
2008
      break;
2009
 
2010
    case OR1K_SPG_PIC:
2011
      /* Programmable Interrupt Controller registers */
2012
 
2013
      /* 1:1 names */
2014
      switch (index)
2015
        {
2016
        case OR1K_SPG_PIC_PICMR:  sprintf (name, "PICMR"); return  name;
2017
        case OR1K_SPG_PIC_PICSR:  sprintf (name, "PICSR"); return  name;
2018
        }
2019
 
2020
      break;
2021
 
2022
    case OR1K_SPG_TT:
2023
      /* Tick Timer registers */
2024
 
2025
      /* 1:1 names */
2026
      switch (index)
2027
        {
2028
        case OR1K_SPG_TT_TTMR:  sprintf (name, "TTMR"); return  name;
2029
        case OR1K_SPG_TT_TTCR:  sprintf (name, "TTCR"); return  name;
2030
        }
2031
 
2032
      break;
2033
 
2034
    case OR1K_SPG_FPU:
2035
 
2036
      break;
2037
    }
2038
 
2039
  /* Not a recognized register */
2040
  strcpy (name, "");
2041
  return  name;
2042
 
2043
}       /* or1k_spr_register_name() */
2044
 
2045
 
2046
/*----------------------------------------------------------------------------*/
2047
/*!Get SPR group number from a name
2048
 
2049
   @param[in] group_name  SPR register group
2050
 
2051
   @return  The index, or negative if no match. */
2052
/*----------------------------------------------------------------------------*/
2053
 
2054
static int
2055
or1k_groupnum_from_name (char *group_name)
2056
{
2057
  int  group;
2058
 
2059
  for (group = 0; group < OR1K_NUM_SPGS; group++)
2060
    {
2061
      if (0 == strcasecmp (group_name, or1k_spr_group_name (group)))
2062
        {
2063
          return group;
2064
        }
2065
    }
2066
 
2067
  return -1;
2068
 
2069
}       /* or1k_groupnum_from_name() */
2070
 
2071
 
2072
/*----------------------------------------------------------------------------*/
2073
/*!Get register index in special purpose register group from name
2074
 
2075
   The name may either be SPR<group_num>_<index> or a known unique name. In
2076
   either case the group number must match the supplied group number.
2077
 
2078
   @param[in] group  SPR register group
2079
   @param[in] name   Register name
2080
 
2081
   @return  The index, or negative if no match. */
2082
/*----------------------------------------------------------------------------*/
2083
 
2084
static int
2085
or1k_regnum_from_name (int   group,
2086
                       char *name)
2087
{
2088
  /* Last valid register in each group. */
2089
  static const int  or1k_spr_group_last[OR1K_NUM_SPGS] =
2090
    {
2091
      OR1K_SPG_SYS_LAST,
2092
      OR1K_SPG_DMMU_LAST,
2093
      OR1K_SPG_IMMU_LAST,
2094
      OR1K_SPG_DC_LAST,
2095
      OR1K_SPG_IC_LAST,
2096
      OR1K_SPG_MAC_LAST,
2097
      OR1K_SPG_DEBUG_LAST,
2098
      OR1K_SPG_PC_LAST,
2099
      OR1K_SPG_PM_LAST,
2100
      OR1K_SPG_PIC_LAST,
2101
      OR1K_SPG_TT_LAST,
2102
      OR1K_SPG_FPU_LAST
2103
    };
2104
 
2105
  int  i;
2106
  char  spr_name[32];
2107
 
2108
  if (0 == strcasecmp (name, "SPR"))
2109
    {
2110
      char *ptr_c;
2111
 
2112
      /* Skip SPR */
2113
      name += 3;
2114
 
2115
      /* Get group number */
2116
      i = (int) strtoul (name, &ptr_c, 10);
2117
      if (*ptr_c != '_' || i != group)
2118
        {
2119
          return -1;
2120
        }
2121
 
2122
      /* Get index */
2123
      ptr_c++;
2124
      i = (int) strtoul (name, &ptr_c, 10);
2125
      if (*ptr_c)
2126
        {
2127
          return -1;
2128
        }
2129
      else
2130
        {
2131
          return  i;
2132
        }
2133
    }
2134
 
2135
  /* Look for a "known" name in this group */
2136
  for (i = 0; i <= or1k_spr_group_last[group]; i++)
2137
    {
2138
      char *s = or1k_spr_register_name (group, i, spr_name);
2139
 
2140
      if (0 == strcasecmp (name, s))
2141
        {
2142
          return i;
2143
        }
2144
    }
2145
 
2146
  /* Failure */
2147
  return -1;
2148
 
2149
}       /* or1k_regnum_from_name() */
2150
 
2151
 
2152
/*----------------------------------------------------------------------------*/
2153
/*!Get the next token from a string
2154
 
2155
   I can't believe there isn't a library argument for this, but strtok is
2156
   deprecated.
2157
 
2158
   Take a string and find the start of the next token and its length. A token
2159
   is anything containing non-blank characters.
2160
 
2161
   @param[in]  str  The string to look at (may be NULL).
2162
   @param[out] tok  Pointer to the start of the token within str. May be NULL
2163
                    if this result is not wanted (e.g. just the length is
2164
                    wanted. If no token is found will be the NULL char at the
2165
                    end of the string, if the original str was NULL, this will
2166
                    be NULL.
2167
 
2168
                    @return  The length of the token found */
2169
/*----------------------------------------------------------------------------*/
2170
 
2171
static int
2172
or1k_tokenize (char  *str,
2173
               char **tok)
2174
{
2175
  char *ptr;
2176
  int   len;
2177
 
2178
  /* Deal with NULL argument */
2179
  if (NULL == str)
2180
    {
2181
      if (NULL != tok)
2182
        {
2183
          *tok = NULL;
2184
        }
2185
      return 0;
2186
    }
2187
 
2188
  /* Find the start */
2189
  for (ptr = str; ISBLANK (*ptr) ; ptr++)
2190
    {
2191
      continue;
2192
    }
2193
 
2194
  /* Return the start pointer if requested */
2195
  if (NULL != tok)
2196
    {
2197
      *tok = ptr;
2198
    }
2199
 
2200
  /* Find the end and put in EOS */
2201
  for (len = 0;  ('\0' != ptr[len]) && (!ISBLANK (ptr[len])); len++)
2202
    {
2203
      continue;
2204
    }
2205
 
2206
  return len;
2207
 
2208
}       /* or1k_tokenize() */
2209
 
2210
 
2211
/*----------------------------------------------------------------------------*/
2212
/*!Parses args for spr commands
2213
 
2214
   Determines the special purpose register (SPR) name and puts result into
2215
   group and index
2216
 
2217
   Syntax is:
2218
 
2219
   @verbatim
2220
   <spr_args>    -> <group_ref> | <reg_name>
2221
   <group_ref>   -> <group_id> <index>
2222
   <group_id>    -> <group_num> | <group_name>
2223
   @endverbatim
2224
 
2225
   Where the indices/names have to be valid.
2226
 
2227
   So to parse, we look for 1 or 2 args. If 1 it must be a unique register
2228
   name. If 2, the first must be a group number or name and the second an
2229
   index within that group.
2230
 
2231
   Also responsible for providing diagnostics if the arguments do not match.
2232
 
2233
   Rewritten for GDB 6.8 to use the new UI calls and remove assorted
2234
   bugs. Syntax also slightly restricted to be more comprehensible.
2235
 
2236
   @param[in]  arg_str  The argument string
2237
   @param[out] group    The group this SPR belongs in, or -1 to indicate
2238
                        failure
2239
   @param[out] index    Index of the register within the group, or -1 to
2240
                        indicate the whole group
2241
   @param[in]  is_set   1 (true) if we are called from the "spr" command (so
2242
                        there is an extra arg) rather than the "info spr"
2243
                        command. Needed to distinguish between the case where
2244
                        info is sought from a register specified as group and
2245
                        index and setting a uniquely identified register to a
2246
                        value.
2247
 
2248
                        @return  A pointer to any remaining args */
2249
/*---------------------------------------------------------------------------*/
2250
 
2251
static char *
2252
or1k_parse_spr_params (char *arg_str,
2253
                       int  *group,
2254
                       int  *index,
2255
                       int   is_set)
2256
{
2257
  struct {
2258
    char              *str;
2259
    int                len;
2260
    unsigned long int  val;
2261
    int                is_num;
2262
  } arg[3] = {
2263
    {
2264
      .str    = NULL,
2265
      .len    = 0,
2266
      .val    = 0,
2267
      .is_num = 0,
2268
    },
2269
   {
2270
      .str    = NULL,
2271
      .len    = 0,
2272
      .val    = 0,
2273
      .is_num = 0,
2274
    },
2275
   {
2276
      .str    = NULL,
2277
      .len    = 0,
2278
      .val    = 0,
2279
      .is_num = 0,
2280
    }
2281
  };
2282
 
2283
  int   num_args;
2284
  char *trailer  = arg_str;
2285
  char *tmp_str;
2286
  int   i;
2287
 
2288
  char  spr_name[32];
2289
 
2290
  /* Break out the arguments. Note that the strings are NOT null terminated
2291
     (we don't want to change arg_str), so we must rely on len. The stroul
2292
     call will still work, since there is always a non-digit char (possibly EOS)
2293
     after the last digit. */
2294
  if (NULL == arg_str)
2295
    {
2296
      num_args = 0;
2297
    }
2298
  else
2299
    {
2300
      for (num_args = 0; num_args < 3; num_args++)
2301
        {
2302
          arg[num_args].len = or1k_tokenize (trailer, &(arg[num_args].str));
2303
          trailer           = arg[num_args].str + arg[num_args].len;
2304
 
2305
          if (0 == arg[num_args].len)
2306
            {
2307
              break;
2308
            }
2309
        }
2310
    }
2311
 
2312
  /* Patch nulls into the arg strings and see about values. Couldn't do this
2313
     earlier, since we needed the next char clean to check later args. This
2314
     means advancing trailer, UNLESS it was already at EOS */
2315
 
2316
  if((NULL != arg_str) && ('\0' != *trailer))
2317
    {
2318
      trailer++;
2319
    }
2320
 
2321
  for (i = 0; i < num_args; i++)
2322
    {
2323
      (arg[i].str)[arg[i].len] = '\0';
2324
      errno                    = 0;
2325
      arg[i].val               = strtoul (arg[i].str, &tmp_str, 0);
2326
      arg[i].is_num            = (0 == errno) && ('\0' == *tmp_str);
2327
    }
2328
 
2329
  /* Deal with the case where we are setting a register, so the final argument
2330
     should be disregarded (it is the trailer). Do this anyway if we get a
2331
     third argument */
2332
  if ((is_set & (num_args > 0)) || (num_args > 2))
2333
    {
2334
      trailer = arg[num_args - 1].str;
2335
      num_args--;
2336
    }
2337
 
2338
  /* Deal with different numbers of args */
2339
 
2340
  switch (num_args)
2341
    {
2342
 
2343
    case 0:
2344
      ui_out_message (uiout, 0,
2345
                      "Usage: <command> <register>      |\n"
2346
                      "       <command> <group>         |\n"
2347
                      "       <command> <group> <index>\n"
2348
                      "Valid groups are:\n");
2349
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2350
        {
2351
          ui_out_field_string (uiout, NULL, or1k_spr_group_name  (i));
2352
          ui_out_spaces (uiout, 1);
2353
          ui_out_wrap_hint (uiout, NULL);
2354
        }
2355
      ui_out_field_string (uiout, NULL, "\n");
2356
 
2357
      *index = -1;
2358
      return  trailer;
2359
 
2360
    case 1:
2361
      /* See if it is a numeric group */
2362
      if (arg[0].is_num)
2363
        {
2364
          if (arg[0].val < OR1K_NUM_SPGS)
2365
            {
2366
              *group = arg[0].val;
2367
              *index = -1;
2368
              return trailer;
2369
            }
2370
          else
2371
            {
2372
              ui_out_message (uiout, 0,
2373
                              "Group index should be in the range 0 - %d\n",
2374
                              OR1K_NUM_SPGS);
2375
              *group = -1;
2376
              *index = -1;
2377
              return trailer;
2378
            }
2379
        }
2380
 
2381
      /* Is is it a group name? */
2382
      *group = or1k_groupnum_from_name (arg[0].str);
2383
      if (*group >= 0)
2384
        {
2385
          *index = -1;
2386
          return trailer;
2387
        }
2388
 
2389
      /* See if it is a valid register name in any group */
2390
      for (*group = 0; *group < OR1K_NUM_SPGS; (*group)++)
2391
        {
2392
          *index = or1k_regnum_from_name (*group, arg[0].str);
2393
 
2394
          if (*index >= 0)
2395
            {
2396
              return  trailer;
2397
            }
2398
        }
2399
 
2400
      /* Couldn't find it - print out a rude message */
2401
      ui_out_message (uiout, 0,
2402
                      "Group or register name not recognized.\n"
2403
                      "Valid groups are:\n");
2404
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2405
        {
2406
          ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2407
          ui_out_spaces (uiout, 1);
2408
          ui_out_wrap_hint (uiout, NULL);
2409
        }
2410
      ui_out_field_string (uiout, NULL, "\n");
2411
 
2412
      *group = -1;
2413
      *index = -1;
2414
      return  trailer;
2415
 
2416
    case 2:
2417
      /* See if first arg is a numeric group */
2418
      if (arg[0].is_num)
2419
        {
2420
          if (arg[0].val < OR1K_NUM_SPGS)
2421
            {
2422
              *group = arg[0].val;
2423
              *index = -1;
2424
            }
2425
          else
2426
            {
2427
              ui_out_message (uiout, 0,
2428
                              "Group index should be in the range 0 - %d\n",
2429
                              OR1K_NUM_SPGS - 1);
2430
              *group = -1;
2431
              *index = -1;
2432
              return trailer;
2433
            }
2434
        }
2435
      else
2436
        {
2437
          /* Is is it a group name? */
2438
          *group = or1k_groupnum_from_name (arg[0].str);
2439
          if (*group >= 0)
2440
            {
2441
              *index = -1;
2442
            }
2443
          else
2444
            {
2445
              ui_out_message (uiout, 0,
2446
                              "Group name not recognized.\n"
2447
                              "Valid groups are:\n");
2448
              for (i = 0; i < OR1K_NUM_SPGS; i++)
2449
                {
2450
                  ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2451
                  ui_out_spaces (uiout, 1);
2452
                  ui_out_wrap_hint (uiout, NULL);
2453
                }
2454
              ui_out_field_string (uiout, NULL, "\n");
2455
 
2456
              *group = -1;
2457
              *index = -1;
2458
              return  trailer;
2459
            }
2460
        }
2461
 
2462
      /* Is second arg an index or name? */
2463
      if (arg[1].is_num)
2464
        {
2465
          if (arg[1].val < OR1K_SPG_SIZE)
2466
            {
2467
              /* Check this really is a register */
2468
              if (0 != strlen (or1k_spr_register_name (*group, arg[1].val,
2469
                                                       spr_name)))
2470
                {
2471
                  *index = arg[1].val;
2472
                  return trailer;
2473
                }
2474
              else
2475
                {
2476
                  ui_out_message (uiout, 0,
2477
                                  "No valid register at that index in group\n");
2478
                  *group = -1;
2479
                  *index = -1;
2480
                  return  trailer;
2481
                }
2482
            }
2483
          else
2484
            {
2485
              ui_out_message (uiout, 0,
2486
                              "Register index should be in the range 0 - %d\n",
2487
                              OR1K_SPG_SIZE - 1);
2488
              *group = -1;
2489
              *index = -1;
2490
              return  trailer;
2491
            }
2492
        }
2493
 
2494
      /* Must be a name */
2495
      *index = or1k_regnum_from_name (*group, arg[1].str);
2496
 
2497
      if (*index >= 0)
2498
        {
2499
          return trailer;
2500
        }
2501
 
2502
      /* Couldn't find it - print out a rude message */
2503
      ui_out_message (uiout, 0, "Register name not recognized in group.\n");
2504
      *group = -1;
2505
      *index = -1;
2506
      return  trailer;
2507
 
2508
    default:
2509
      /* Anything else is an error */
2510
      ui_out_message (uiout, 0, "Unable to parse arguments\n");
2511
      *group = -1;
2512
      *index = -1;
2513
      return  trailer;
2514
    }
2515
}       /* or1k_parse_spr_params() */
2516
 
2517
 
2518
/*---------------------------------------------------------------------------*/
2519
/*!Read a special purpose register from the target
2520
 
2521
   This has to be done using the target remote command "readspr"
2522
 
2523
   @param[in] regnum  The register to read
2524
 
2525
   @return  The value read */
2526
/*---------------------------------------------------------------------------*/
2527
 
2528
static ULONGEST
2529
or1k_read_spr (unsigned int  regnum)
2530
{
2531
  struct ui_file    *uibuf = mem_fileopen ();
2532
  char               cmd[sizeof ("readspr ffff")];
2533
  unsigned long int  data;
2534
  char              *res;
2535
  long int           len;
2536
 
2537
  /* Create the command string and pass it to target remote command function */
2538
  sprintf (cmd, "readspr %4x", regnum);
2539
  target_rcmd (cmd, uibuf);
2540
 
2541
  /* Get the output for the UI file as a string */
2542
  res = ui_file_xstrdup (uibuf, &len);
2543
  sscanf (res, "%lx", &data);
2544
 
2545
  /* Tidy up */
2546
  xfree (res);
2547
  ui_file_delete (uibuf);
2548
 
2549
  return  (ULONGEST)data;
2550
 
2551
}       /* or1k_read_spr() */
2552
 
2553
 
2554
/*---------------------------------------------------------------------------*/
2555
/*!Write a special purpose register on the target
2556
 
2557
   This has to be done using the target remote command "writespr"
2558
 
2559
   Since the SPRs may map to GPR's or the other GDB register (PPC, NPC, SR),
2560
   any register cache is flushed.
2561
 
2562
   @param[in] regnum  The register to write
2563
   @param[in] data  The value to write */
2564
/*---------------------------------------------------------------------------*/
2565
 
2566
static void
2567
or1k_write_spr (unsigned int  regnum,
2568
                ULONGEST      data)
2569
{
2570
  struct ui_file    *uibuf = mem_fileopen ();
2571
  char               cmd[sizeof ("writespr ffff ffffffff")];
2572
  char              *res;
2573
  long int           len;
2574
 
2575
  /* Create the command string and pass it to target remote command function */
2576
  sprintf (cmd, "writespr %4x %8llx", regnum, (long long unsigned int)data);
2577
  target_rcmd (cmd, uibuf);
2578
 
2579
  /* Flush the register cache */
2580
  registers_changed ();
2581
 
2582
  /* We ignore the result - Rcmd can put out its own error messages. Just
2583
     tidy up */
2584
  ui_file_delete (uibuf);
2585
 
2586
}       /* or1k_write_spr() */
2587
 
2588
 
2589
/*----------------------------------------------------------------------------*/
2590
/*!Show the value of a special purpose register or group
2591
 
2592
   This is a custom extension to the GDB info command.
2593
 
2594
   @param[in] args
2595
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2596
   otherwise. */
2597
/*---------------------------------------------------------------------------*/
2598
 
2599
static void
2600
or1k_info_spr_command (char *args,
2601
                       int   from_tty)
2602
{
2603
  int  group;
2604
  int  index;
2605
 
2606
  char  spr_name[32];
2607
 
2608
  or1k_parse_spr_params (args, &group, &index, 0);
2609
 
2610
  if (group < 0)
2611
    {
2612
      return;                   /* Couldn't parse the args */
2613
    }
2614
 
2615
  if (index >= 0)
2616
    {
2617
      ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2618
 
2619
      ui_out_field_fmt (uiout, NULL, "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2620
                        or1k_spr_group_name (group),
2621
                        or1k_spr_register_name (group, index, spr_name), group,
2622
                        index, (long long unsigned int)value, (long long unsigned int)value);
2623
    }
2624
  else
2625
    {
2626
      /* Print all valid registers in the group */
2627
      for (index = 0; index < OR1K_SPG_SIZE; index++)
2628
        {
2629
          if (0 != strlen (or1k_spr_register_name (group, index, spr_name)))
2630
            {
2631
              ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2632
 
2633
              ui_out_field_fmt (uiout, NULL,
2634
                                "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2635
                                or1k_spr_group_name (group),
2636
                                or1k_spr_register_name (group, index, spr_name),
2637
                                group, index, (long long unsigned int)value, (long long unsigned int)value);
2638
            }
2639
        }
2640
    }
2641
}       /* or1k_info_spr_command() */
2642
 
2643
 
2644
/*----------------------------------------------------------------------------*/
2645
/*!Set a special purpose register
2646
 
2647
   This is a custom command added to GDB.
2648
 
2649
   @param[in] args
2650
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2651
   otherwise. */
2652
/*---------------------------------------------------------------------------*/
2653
 
2654
static void
2655
or1k_spr_command (char *args,
2656
                  int   from_tty)
2657
{
2658
  int   group;
2659
  int   index;
2660
  char *tmp_str;
2661
  char *nargs = or1k_parse_spr_params (args, &group, &index, 1);
2662
 
2663
  ULONGEST  old_val;
2664
  ULONGEST  new_val;
2665
 
2666
  char  spr_name[32];
2667
 
2668
  /* Do we have a valid register spec? */
2669
  if (index < 0)
2670
    {
2671
      return;           /* Parser will have printed the error message */
2672
    }
2673
 
2674
  /* Do we have a value to set? */
2675
 
2676
  errno = 0;
2677
  new_val = (ULONGEST)strtoul (nargs, &tmp_str, 0);
2678
 
2679
  if((0 != errno) || ('\0' != *tmp_str))
2680
    {
2681
      ui_out_message (uiout, 0, "Invalid value - register not changed\n");
2682
      return;
2683
    }
2684
 
2685
  old_val = or1k_read_spr (OR1K_SPR (group, index));
2686
 
2687
  or1k_write_spr (OR1K_SPR (group, index) , new_val);
2688
 
2689
  ui_out_field_fmt (uiout, NULL,
2690
                    "%s.%s (SPR%i_%i) set to %llu (0x%llx), "
2691
                    "was: %llu (0x%llx)\n",
2692
                    or1k_spr_group_name (group),
2693
                    or1k_spr_register_name (group, index, spr_name) , group,
2694
                    index, (long long unsigned int)new_val, (long long unsigned int)new_val, (long long unsigned int)old_val, (long long unsigned int)old_val);
2695
 
2696
}       /* or1k_spr_command() */
2697
 
2698
 
2699
/*----------------------------------------------------------------------------*/
2700
/*!Main entry point for target architecture initialization
2701
 
2702
   In this version initializes the architecture via
2703
   registers_gdbarch_init(). Add a command to set and show special purpose
2704
   registers. */
2705
/*---------------------------------------------------------------------------*/
2706
 
2707
void
2708
_initialize_or1k_tdep (void)
2709
{
2710
  /* Register this architecture. We should do this for or16 and or64 when
2711
     they have their BFD defined. */
2712
  gdbarch_register (bfd_arch_or32, or1k_gdbarch_init, or1k_dump_tdep);
2713
 
2714
  /* Initialize the automata for the assembler */
2715
  build_automata();
2716
 
2717
  /* Commands to show and set special purpose registers */
2718
  add_info ("spr", or1k_info_spr_command,
2719
            "Show the value of a special purpose register");
2720
  add_com ("spr", class_support, or1k_spr_command,
2721
           "Set a special purpose register");
2722
 
2723
}       /* _initialize_or1k_tdep() */

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