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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [or1k-tdep.c] - Blame information for rev 157

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1 24 jeremybenn
/* Target-dependent code for the or1k architecture, for GDB, the GNU Debugger.
2
 
3
   Copyright 1988-2008, Free Software Foundation, Inc.
4
   Copyright (C) 2008 Embecosm Limited
5
 
6
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
7
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
9
 
10
   This file is part of GDB.
11
 
12
   This program is free software; you can redistribute it and/or modify it
13
   under the terms of the GNU General Public License as published by the Free
14
   Software Foundation; either version 3 of the License, or (at your option)
15
   any later version.
16
 
17
   This program is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
20
   more details.
21
 
22
   You should have received a copy of the GNU General Public License along
23
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
24
 
25
/*-----------------------------------------------------------------------------
26
   This version for the OpenRISC 1000 architecture is a rewrite by Jeremy
27
   Bennett of the old GDB 5.3 interface to make use of gdbarch for GDB 6.8.
28
 
29
   The code tries to follow the GDB coding style.
30
 
31
   Commenting is Doxygen compatible.
32
 
33
   Much has been stripped out in the interests of getting a basic working
34
   system. This is described as the OpenRISC 1000 target architecture, so
35
   should work with 16, 32 and 64 bit versions of that architecture and should
36
   work whether or not they have floating point and/or vector registers.
37
 
38
   There was never a capability to run simulator commands (no remote target
39
   implemented the required function), so that has been removed.
40
 
41
   The info trace command has been removed. The meaning of this is not clear -
42
   it relies on a value in register 255 of the debug group, which is
43
   undocumented.
44
 
45
   All the hardware trace has been removed for the time being. The new debug
46
   interface does not support hardware trace, so there is no plan to reinstate
47
   this functionality.
48
 
49
   Support for multiple contexts (which was rudimentary, and not working) has
50
   been removed. */
51
/*---------------------------------------------------------------------------*/
52
 
53
#include "demangle.h"
54
#include "defs.h"
55
#include "gdb_string.h"
56
#include "frame.h"
57
#include "inferior.h"
58
#include "symtab.h"
59
#include "value.h"
60
#include "gdbcmd.h"
61
#include "language.h"
62
#include "gdbcore.h"
63
#include "symfile.h"
64
#include "objfiles.h"
65
#include "gdbtypes.h"
66
#include "target.h"
67
#include "regcache.h"
68
 
69
#include "opcode/or32.h"
70
#include "or1k-tdep.h"
71
 
72
#include "safe-ctype.h"
73
#include "block.h"
74
#include "reggroups.h"
75
#include "arch-utils.h"
76
#include "frame.h"
77
#include "frame-unwind.h"
78
#include "frame-base.h"
79
#include "dwarf2-frame.h"
80
#include "trad-frame.h"
81
 
82
#include <inttypes.h>
83
 
84
 
85
 
86
 
87
/* Support functions for the architecture definition */
88
 
89
 
90
/*----------------------------------------------------------------------------*/
91
/*!Get an instruction from a frame
92
 
93
   This reads from memory, but if the instruction has been substituted by a
94
   software breakpoint, returns the instruction that has been replaced, NOT
95
   the break point instruction
96
 
97
   Depending on whether this has a frame available we use a frame based memory
98
   access or independent memory access. Underneath they are both the same, but
99
   annoyingly save_frame_unwind_memory inverts the status returned!
100
 
101
   @param[in] next_frame  Information about the next frame.
102
   @param[in] addr        Address from which to get the instruction
103
 
104
   @return  The instruction */
105
/*---------------------------------------------------------------------------*/
106
 
107
static unsigned long int
108
or1k_fetch_instruction (struct frame_info *next_frame,
109
                        CORE_ADDR          addr)
110
{
111
  char  buf[OR1K_INSTLEN];
112
  int   status;
113
 
114
  struct frame_info *this_frame = get_prev_frame (next_frame);
115 146 jeremybenn
 
116
  if (NULL == this_frame)
117 24 jeremybenn
    {
118 146 jeremybenn
      status = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
119 24 jeremybenn
    }
120
  else
121
    {
122 146 jeremybenn
      status = !(safe_frame_unwind_memory (this_frame, addr, buf,
123
                                           OR1K_INSTLEN));
124 24 jeremybenn
    }
125
 
126
  if (0 != status)
127
    {
128
      memory_error (status, addr);
129
    }
130
 
131
  return  (unsigned long int)(extract_unsigned_integer (buf, OR1K_INSTLEN));
132
 
133
}       /* or1k_fetch_instruction() */
134
 
135
 
136
/*----------------------------------------------------------------------------*/
137
/*!Store an instruction in a frame
138
 
139
   This writes to memory. Unlike its counterpart to fetch the instruction it
140
   does nothing about breakpoints
141
 
142
   Depending on whether this has a frame available we use a frame based memory
143
   access or independent memory access.
144
 
145
   @param[in] next_frame  Information about the next frame. Here for
146
                          compatibility with the fetch function, but ignored.
147
   @param[in] addr        Address to which to put the instruction
148
   @param[in] insn        The instruction to be written */
149
/*---------------------------------------------------------------------------*/
150
 
151
static void
152
or1k_store_instruction (struct frame_info *next_frame,
153
                        CORE_ADDR          addr,
154
                        unsigned long int  insn)
155
{
156
  write_memory_unsigned_integer( addr, sizeof( insn ), insn );
157
 
158
}       /* or1k_store_instruction() */
159
 
160
 
161
/*---------------------------------------------------------------------------*/
162 146 jeremybenn
/*!Generic function to read bits from an instruction
163 24 jeremybenn
 
164 146 jeremybenn
   printf style. Basic syntax
165 24 jeremybenn
 
166 146 jeremybenn
      or1k_analyse_inst (inst, format, &arg1, &arg2 ...)
167 24 jeremybenn
 
168 146 jeremybenn
   Format string can contain the following characters:
169 24 jeremybenn
 
170 146 jeremybenn
   - SPACE:  Ignored, just for layout
171
   - 0:      Match with a zero bit
172
   - 1:      Match with a one bit
173
   - %<n>b:  Match <n> bits to the next argument (n decimal)
174 24 jeremybenn
 
175 146 jeremybenn
   If the arg corresponding to a bit field is non-null, the value will be
176
   assigned to that argument (using NULL allows fields to be skipped).
177 24 jeremybenn
 
178 146 jeremybenn
   Any bad string will cause a fatal error. These are constant strings, so
179
   should be correct.
180 24 jeremybenn
 
181 146 jeremybenn
   The bit field must be 32 bits long. A failure here will cause a fatal error
182
   for the same reason.
183 24 jeremybenn
 
184 146 jeremybenn
   @note The format string is presented MS field to LS field, left to
185
         right. This means that it is read lowest numbered char first.
186 24 jeremybenn
 
187 146 jeremybenn
   @note Some of the arg fields may be populated, even if recognition
188
         ultimately fails.
189 24 jeremybenn
 
190 146 jeremybenn
   @param[in]  inst    The instruction to analyse
191
   @param[in]  format  The format string
192
   @param[out] ...     Argument fields
193 24 jeremybenn
 
194 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
195
/*---------------------------------------------------------------------------*/
196 24 jeremybenn
static int
197 146 jeremybenn
or1k_analyse_inst (uint32_t    inst,
198
                   const char *format,
199
                   ...)
200 24 jeremybenn
{
201 146 jeremybenn
  /* Break out each field in turn, validating as we go. */
202
  va_list     ap;
203 24 jeremybenn
 
204 146 jeremybenn
  int         i;
205
  int         iptr = 0;                  /* Instruction pointer */
206 24 jeremybenn
 
207 146 jeremybenn
  va_start (ap, format);
208 24 jeremybenn
 
209 146 jeremybenn
  for (i = 0; 0 != format[i];)
210 24 jeremybenn
    {
211 146 jeremybenn
      const char *start_ptr;
212
      char       *end_ptr;
213 24 jeremybenn
 
214 146 jeremybenn
      uint32_t    bits;                 /* Bit substring of interest */
215
      uint32_t    width;                /* Substring width */
216
      uint32_t   *arg_ptr;
217 24 jeremybenn
 
218 146 jeremybenn
      switch (format[i])
219
        {
220
        case ' ': i++; break;   /* Formatting: ignored */
221
 
222
        case '0': case '1':     /* Constant bit field */
223
          bits = (inst >> (OR1K_INSTBITLEN - iptr - 1)) & 0x1;
224
 
225
          if ((format[i] - '0') != bits)
226
            {
227
              return  0;
228
            }
229 24 jeremybenn
 
230 146 jeremybenn
          iptr++;
231
          i++;
232
          break;
233 24 jeremybenn
 
234 146 jeremybenn
        case '%':               /* Bit field */
235
          i++;
236
          start_ptr = &(format[i]);
237
          width     = strtoul (start_ptr, &end_ptr, 10);
238 24 jeremybenn
 
239 146 jeremybenn
          /* Check we got something, and if so skip on */
240
          if (start_ptr == end_ptr)
241
            {
242
              fatal ("bitstring \"%s\" at offset %d has no length field.\n",
243
                     format, i);
244
            }
245 24 jeremybenn
 
246 146 jeremybenn
          i += end_ptr - start_ptr;
247 24 jeremybenn
 
248 146 jeremybenn
          /* Look for and skip the terminating 'b'. If it's not there, we
249
             still give a fatal error, because these are fixed strings that
250
             just should not be wrong. */
251
          if ('b' != format[i++])
252
            {
253
              fatal ("bitstring \"%s\" at offset %d has no terminating 'b'.\n",
254
                     format, i);
255
            }
256 24 jeremybenn
 
257 146 jeremybenn
          /* Break out the field. There is a special case with a bit width of
258
             32. */
259
          if (32 == width)
260
            {
261
              bits = inst;
262
            }
263
          else
264
            {
265
              bits = (inst >> (OR1K_INSTBITLEN - iptr - width)) & ((1 << width) - 1);
266
            }
267 24 jeremybenn
 
268 146 jeremybenn
          arg_ptr   = va_arg (ap, uint32_t *);
269
          *arg_ptr  = bits;
270
          iptr     += width;
271
          break;
272 24 jeremybenn
 
273 146 jeremybenn
        default:
274
          fatal ("invalid character in bitstring \"%s\" at offset %d.\n",
275
                 format, i);
276
          break;
277
        }
278 24 jeremybenn
    }
279
 
280 146 jeremybenn
  /* Is the length OK? */
281
  gdb_assert (OR1K_INSTBITLEN == iptr);
282 24 jeremybenn
 
283 146 jeremybenn
  return  1;                            /* We succeeded */
284 24 jeremybenn
 
285 146 jeremybenn
}       /* or1k_analyse_inst () */
286 24 jeremybenn
 
287
 
288
/*---------------------------------------------------------------------------*/
289 146 jeremybenn
/*!Analyse a l.addi instruction
290 24 jeremybenn
 
291 146 jeremybenn
   General form is:
292 24 jeremybenn
 
293 146 jeremybenn
     l.addi  rD,rA,I
294 24 jeremybenn
 
295 146 jeremybenn
   Makes use of the generic analysis function (@see or1k_analyse_inst ()).
296 24 jeremybenn
 
297 146 jeremybenn
   @param[in]  inst      The instruction to analyse.
298
   @param[out] rd_ptr    Pointer to the rD value.
299
   @param[out] ra_ptr    Pointer to the rA value.
300
   @param[out] simm_ptr  Pointer to the signed immediate value.
301 24 jeremybenn
 
302 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
303 24 jeremybenn
/*---------------------------------------------------------------------------*/
304
static int
305 146 jeremybenn
or1k_analyse_l_addi (uint32_t      inst,
306
                     unsigned int *rd_ptr,
307
                     unsigned int *ra_ptr,
308
                     int          *simm_ptr)
309 24 jeremybenn
{
310 146 jeremybenn
  /* Instruction fields */
311
  uint32_t  rd, ra, i;
312 24 jeremybenn
 
313 146 jeremybenn
  if (or1k_analyse_inst (inst, "10 0111 %5b %5b %16b", &rd, &ra, &i))
314 24 jeremybenn
    {
315 146 jeremybenn
      /* Found it. Construct the result fields */
316
      *rd_ptr   = (unsigned int) rd;
317
      *ra_ptr   = (unsigned int) ra;
318
      *simm_ptr = (int) (((i & 0x8000) == 0x8000) ? 0xffff0000 | i : i);
319 24 jeremybenn
 
320 146 jeremybenn
      return  1;                /* Success */
321 24 jeremybenn
    }
322 146 jeremybenn
  else
323 24 jeremybenn
    {
324 146 jeremybenn
      return  0;         /* Failure */
325 24 jeremybenn
    }
326 146 jeremybenn
}       /* or1k_analyse_l_addi () */
327 24 jeremybenn
 
328
 
329 146 jeremybenn
/*---------------------------------------------------------------------------*/
330
/*!Analyse a l.sw instruction
331 24 jeremybenn
 
332 146 jeremybenn
   General form is:
333 24 jeremybenn
 
334 146 jeremybenn
     l.sw  I(rA),rB
335 24 jeremybenn
 
336 146 jeremybenn
   Makes use of the generic analysis function (@see or1k_analyse_inst ()).
337 24 jeremybenn
 
338 146 jeremybenn
   @param[in]  inst      The instruction to analyse.
339
   @param[out] simm_ptr  Pointer to the signed immediate value.
340
   @param[out] ra_ptr    Pointer to the rA value.
341
   @param[out] rb_ptr    Pointer to the rB value.
342 24 jeremybenn
 
343 146 jeremybenn
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
344 24 jeremybenn
/*---------------------------------------------------------------------------*/
345 146 jeremybenn
static int
346
or1k_analyse_l_sw (uint32_t      inst,
347
                   int          *simm_ptr,
348
                   unsigned int *ra_ptr,
349
                   unsigned int *rb_ptr)
350 24 jeremybenn
{
351 146 jeremybenn
  /* Instruction fields */
352
  uint32_t  ihi, ilo, ra, rb;
353 24 jeremybenn
 
354 146 jeremybenn
  if (or1k_analyse_inst (inst, "11 0101 %5b %5b %5b %11b", &ihi, &ra, &rb,
355
                         &ilo))
356 24 jeremybenn
 
357
    {
358 146 jeremybenn
      /* Found it. Construct the result fields */
359
      *simm_ptr  = (int) ((ihi << 11) | ilo);
360
      *simm_ptr |= ((ihi & 0x10) == 0x10) ? 0xffff0000 : 0;
361 24 jeremybenn
 
362 146 jeremybenn
      *ra_ptr    = (unsigned int) ra;
363
      *rb_ptr    = (unsigned int) rb;
364 24 jeremybenn
 
365 146 jeremybenn
      return  1;                /* Success */
366 24 jeremybenn
    }
367
  else
368
    {
369 146 jeremybenn
      return  0;         /* Failure */
370 24 jeremybenn
    }
371 146 jeremybenn
}       /* or1k_analyse_l_sw () */
372 24 jeremybenn
 
373
 
374
 
375
 
376
/* Functions defining the architecture */
377
 
378
 
379
/*----------------------------------------------------------------------------*/
380
/*!Determine the return convention used for a given type
381
 
382
   Optionally, fetch or set the return value via "readbuf" or "writebuf"
383
   respectively using "regcache" for the register values.
384
 
385
   The OpenRISC 1000 returns scalar values via R11 and (for 64 bit values on
386
   32 bit architectures) R12. Structs and unions are returned by reference,
387
   with the address in R11
388
 
389
   Throughout use read_memory(), not target_read_memory(), since the address
390
   may be invalid and we want an error reported (read_memory() is
391
   target_read_memory() with error reporting).
392
 
393
   @todo This implementation is labelled OR1K, but in fact is just for the 32
394
         bit version, OR32. This should be made explicit
395
 
396
   @param[in]  gdbarch   The GDB architecture being used
397
   @param[in]  type      The type of the entity to be returned
398
   @param[in]  regcache  The register cache
399
   @param[in]  readbuf   Buffer into which the return value should be written
400
   @param[out] writebuf  Buffer from which the return value should be written
401
 
402
   @return  The type of return value */
403
/*---------------------------------------------------------------------------*/
404
 
405
static enum return_value_convention
406
or1k_return_value (struct gdbarch  *gdbarch,
407
                   struct type     *type,
408
                   struct regcache *regcache,
409
                   gdb_byte        *readbuf,
410
                   const gdb_byte  *writebuf)
411
{
412
  enum type_code  rv_type = TYPE_CODE (type);
413
  unsigned int    rv_size = TYPE_LENGTH (type);
414
  ULONGEST        tmp;
415
 
416
  /* Deal with struct/union and large scalars first. Large (> 4 byte) scalars
417
     are returned via a pointer (despite what is says in the architecture
418
     document). Result pointed to by R11 */
419
 
420
  if((TYPE_CODE_STRUCT == rv_type) ||
421
     (TYPE_CODE_UNION  == rv_type) ||
422
     (rv_size          >  4))
423
    {
424
      if (readbuf)
425
        {
426
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
427
          read_memory (tmp, readbuf, rv_size);
428
        }
429
      if (writebuf)
430
        {
431
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
432
          write_memory (tmp, writebuf, rv_size);
433
        }
434
 
435
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
436
    }
437
 
438
  /* 1-4 byte scalars are returned in R11 */
439
 
440
  if (readbuf)
441
    {
442
      regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
443
      store_unsigned_integer (readbuf, rv_size, tmp);
444
    }
445
  if (writebuf)
446
    {
447
      gdb_byte buf[4];
448
      memset (buf, 0, sizeof (buf));     /* Pad with zeros if < 4 bytes */
449
 
450
      if (BFD_ENDIAN_BIG == gdbarch_byte_order (gdbarch))
451
        {
452
          memcpy (buf + sizeof (buf) - rv_size, writebuf, rv_size);
453
        }
454
      else
455
        {
456
          memcpy (buf,                          writebuf, rv_size);
457
        }
458
 
459
      regcache_cooked_write (regcache, OR1K_RV_REGNUM, buf);
460
    }
461
 
462
  return RETURN_VALUE_REGISTER_CONVENTION;
463
 
464
}       /* or1k_return_value() */
465
 
466
 
467
/*----------------------------------------------------------------------------*/
468
/*!Determine the instruction to use for a breakpoint.
469
 
470
   Given the address at which to insert a breakpoint (bp_addr), what will
471
   that breakpoint be?
472
 
473
   For or1k, we have a breakpoint instruction. Since all or1k instructions
474
   are 32 bits, this is all we need, regardless of address.
475
 
476
   @param[in]  gdbarch  The GDB architecture being used
477
   @param[in]  bp_addr  The breakpoint address in question
478
   @param[out] bp_size  The size of instruction selected
479
 
480
   @return  The chosen breakpoint instruction */
481
/*---------------------------------------------------------------------------*/
482
 
483
static const gdb_byte *
484
or1k_breakpoint_from_pc (struct gdbarch *gdbarch,
485
                         CORE_ADDR      *bp_addr,
486
                         int            *bp_size)
487
{
488
  static const gdb_byte breakpoint[] = OR1K_BRK_INSTR_STRUCT;
489
 
490
  *bp_size = OR1K_INSTLEN;
491
  return breakpoint;
492
 
493
}       /* or1k_breakpoint_from_pc() */
494
 
495
 
496
/*----------------------------------------------------------------------------*/
497
/*!Determine if we are executing a delay slot
498
 
499
   Looks at the instruction at the previous instruction to see if it was one
500
   with a delay slot.
501
 
502
   @param[in] gdbarch     The GDB architecture being used
503
   @param[in] this_frame  Information about THIS frame
504
 
505
   @return  1 (true) if this instruction is executing a delay slot, 0 (false)
506
   otherwise. */
507
/*--------------------------------------------------------------------------*/
508
 
509
static int
510
or1k_single_step_through_delay( struct gdbarch    *gdbarch,
511
                                struct frame_info *this_frame )
512
{
513
  struct regcache   *regcache = get_current_regcache ();
514
  ULONGEST           val;
515
  CORE_ADDR          ppc;
516
  int                index;
517
 
518
  /* Get and decode the previous instruction. */
519
  regcache_cooked_read_unsigned (regcache, OR1K_PPC_REGNUM, &val);
520
  ppc        = (CORE_ADDR)val;
521
  index      = insn_decode (or1k_fetch_instruction (this_frame, ppc));
522
 
523
  /* We are only executing a delay slot if the previous instruction was a
524
     branch or jump. */
525
  return or32_opcodes[index].flags & OR32_IF_DELAY;
526
 
527
}       /* or1k_single_step_through_delay() */
528
 
529
 
530
/*----------------------------------------------------------------------------*/
531
/*!Read a pseudo register
532
 
533
   Since we have no pseudo registers this is a null function for now.
534
 
535
   @todo The floating point and vector registers ought to be done as
536
         pseudo-registers.
537
 
538
   @param[in]  gdbarch   The GDB architecture to consider
539
   @param[in]  regcache  The cached register values as an array
540
   @param[in]  regnum    The register to read
541
   @param[out] buf       A buffer to put the result in */
542
/*---------------------------------------------------------------------------*/
543
 
544
static void
545
or1k_pseudo_register_read (struct gdbarch  *gdbarch,
546
                           struct regcache *regcache,
547
                           int              regnum,
548
                           gdb_byte        *buf)
549
{
550
  return;
551
 
552
}       /* or1k_pseudo_register_read() */
553
 
554
 
555
/*----------------------------------------------------------------------------*/
556
/*!Write a pseudo register
557
 
558
   Since we have no pseudo registers this is a null function for now.
559
 
560
   @todo The floating point and vector registers ought to be done as
561
         pseudo-registers.
562
 
563
   @param[in] gdbarch   The GDB architecture to consider
564
   @param[in] regcache  The cached register values as an array
565
   @param[in] regnum    The register to read
566
   @param[in] buf       A buffer with the value to write */
567
/*---------------------------------------------------------------------------*/
568
 
569
static void
570
or1k_pseudo_register_write (struct gdbarch  *gdbarch,
571
                            struct regcache *regcache,
572
                            int              regnum,
573
                            const gdb_byte  *buf)
574
{
575
  return;
576
 
577
}       /* or1k_pseudo_register_write() */
578
 
579
 
580
/*----------------------------------------------------------------------------*/
581
/*!Return the register name for the OpenRISC 1000 architecture
582
 
583
   This version converted to ANSI C, made static and incorporates the static
584
   table of register names (this is the only place it is referenced).
585
 
586
   @todo The floating point and vector registers ought to be done as
587
         pseudo-registers.
588
 
589
   @param[in] gdbarch  The GDB architecture being used
590
   @param[in] regnum    The register number
591
 
592
   @return  The textual name of the register */
593
/*---------------------------------------------------------------------------*/
594
 
595
static const char *
596
or1k_register_name (struct gdbarch *gdbarch,
597
                    int             regnum)
598
{
599
  static char *or1k_gdb_reg_names[OR1K_TOTAL_NUM_REGS] =
600
    {
601
      /* general purpose registers */
602
      "gpr0",  "gpr1",  "gpr2",  "gpr3",  "gpr4",  "gpr5",  "gpr6",  "gpr7",
603
      "gpr8",  "gpr9",  "gpr10", "gpr11", "gpr12", "gpr13", "gpr14", "gpr15",
604
      "gpr16", "gpr17", "gpr18", "gpr19", "gpr20", "gpr21", "gpr22", "gpr23",
605
      "gpr24", "gpr25", "gpr26", "gpr27", "gpr28", "gpr29", "gpr30", "gpr31",
606
 
607
      /* previous program counter, next program counter and status register */
608
      "ppc",   "npc",   "sr"
609
 
610
      /* Floating point and vector registers may appear as pseudo registers in
611
         the future. */
612
    };
613
 
614
  return or1k_gdb_reg_names[regnum];
615
 
616
}       /* or1k_register_name() */
617
 
618
 
619
/*----------------------------------------------------------------------------*/
620
/*!Identify the type of a register
621
 
622
   @todo I don't fully understand exactly what this does, but I think this
623
         makes sense!
624
 
625
   @param[in] arch     The GDB architecture to consider
626
   @param[in] regnum   The register to identify
627
 
628
   @return  The type of the register */
629
/*---------------------------------------------------------------------------*/
630
 
631
static struct type *
632
or1k_register_type (struct gdbarch *arch,
633
                    int             regnum)
634
{
635
  static struct type *void_func_ptr = NULL;
636
  static struct type *void_ptr      = NULL;
637
 
638
  /* Set up the static pointers once, the first time*/
639
  if (NULL == void_func_ptr)
640
    {
641
      void_ptr = lookup_pointer_type (builtin_type_void);
642
      void_func_ptr =
643
        lookup_pointer_type (lookup_function_type (builtin_type_void));
644
    }
645
 
646
  if((regnum >= 0) && (regnum < OR1K_TOTAL_NUM_REGS))
647
    {
648
      switch (regnum)
649
        {
650
        case OR1K_PPC_REGNUM:
651
        case OR1K_NPC_REGNUM:
652
          return void_func_ptr;         /* Pointer to code */
653
 
654
        case OR1K_SP_REGNUM:
655
        case OR1K_FP_REGNUM:
656
          return void_ptr;                      /* Pointer to data */
657
 
658
        default:
659
          return builtin_type_int32;    /* Data */
660
        }
661
    }
662
 
663
  internal_error (__FILE__, __LINE__,
664
                  _("or1k_register_type: illegal register number %d"), regnum);
665
 
666
}       /* or1k_register_type() */
667
 
668
 
669
/*----------------------------------------------------------------------------*/
670
/*!Handle the "info register" command
671
 
672
   Print the identified register, unless it is -1, in which case print all
673
   the registers. If all is 1 means all registers, otherwise only the core
674
   GPRs.
675
 
676
   @todo At present all registers are printed with the default method. Should
677
         there be something special for FP registers?
678
 
679
   @param[in] gdbarch  The GDB architecture being used
680
   @param[in] file     File handle for use with any custom I/O
681
   @param[in] frame    Frame info for use with custom output
682
   @param[in] regnum   Register of interest, or -1 if all registers
683
   @param[in] all      1 if all means all, 0 if all means just GPRs
684
 
685
   @return  The aligned stack frame address */
686
/*---------------------------------------------------------------------------*/
687
 
688
static void
689
or1k_registers_info (struct gdbarch    *gdbarch,
690
                     struct ui_file    *file,
691
                     struct frame_info *frame,
692
                     int                regnum,
693
                     int                all)
694
{
695
  if (-1 == regnum)
696
    {
697
      /* Do all (valid) registers */
698
      unsigned int  lim = all ? OR1K_NUM_REGS : OR1K_MAX_GPR_REGS;
699
 
700
      for (regnum = 0; regnum < lim; regnum++) {
701
        if ('\0' != *(or1k_register_name (gdbarch, regnum)))
702
          {
703
            or1k_registers_info (gdbarch, file, frame, regnum, all);
704
          }
705
      }
706
    }
707
  else
708
    {
709
      /* Do one specified register - if it is part of this architecture */
710
      if ('\0' == *(or1k_register_name (gdbarch, regnum)))
711
        {
712
          error ("Not a valid register for the current processor type");
713
        }
714
      else
715
        {
716
          default_print_registers_info (gdbarch, file, frame, regnum, all);
717
        }
718
    }
719
}       /* or1k_registers_info() */
720
 
721
 
722
/*----------------------------------------------------------------------------*/
723
/*!Identify if a register belongs to a specified group
724
 
725
   Return true if the specified register is a member of the specified
726
   register group.
727
 
728
   These are the groups of registers that can be displayed via "info reg".
729
 
730
   @todo The Vector and Floating Point registers ought to be displayed as
731
         pseudo-registers.
732
 
733
   @param[in] gdbarch  The GDB architecture to consider
734
   @param[in] regnum   The register to consider
735
   @param[in] group    The group to consider
736
 
737
   @return  True (1) if regnum is a member of group */
738
/*---------------------------------------------------------------------------*/
739
 
740
static int
741
or1k_register_reggroup_p (struct gdbarch  *gdbarch,
742
                          int              regnum,
743
                          struct reggroup *group)
744
{
745
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
746
 
747
  /* All register group */
748
  if (group == all_reggroup)
749
    {
750
      return ((regnum >= 0) &&
751
              (regnum < OR1K_TOTAL_NUM_REGS) &&
752
              (or1k_register_name (gdbarch, regnum)[0] != '\0'));
753
    }
754
 
755
  /* For now everything except the PC */
756
  if (group == general_reggroup)
757
    {
758
      return ((regnum >= OR1K_ZERO_REGNUM) &&
759
              (regnum <  tdep->num_gpr_regs) &&
760
              (regnum != OR1K_PPC_REGNUM) &&
761
              (regnum != OR1K_NPC_REGNUM));
762
    }
763
 
764
  if (group == float_reggroup)
765
    {
766
      return 0;                  /* No float regs.  */
767
    }
768
 
769
  if (group == vector_reggroup)
770
    {
771
      return 0;                  /* No vector regs.  */
772
    }
773
 
774
  /* For any that are not handled above.  */
775
  return default_register_reggroup_p (gdbarch, regnum, group);
776
 
777
}       /* or1k_register_reggroup_p() */
778
 
779
 
780
/*----------------------------------------------------------------------------*/
781
/*!Skip a function prolog
782
 
783
   If the input address, PC, is in a function prologue, return the address of
784
   the end of the prologue, otherwise return the input  address.
785
 
786
   @see For details of the stack frame, see the function
787
   or1k_frame_unwind_cache().
788
 
789
   This function reuses the helper functions from or1k_frame_unwind_cache() to
790 146 jeremybenn
   locate the various parts of the prolog, any or all of which may be missing.
791 24 jeremybenn
 
792
   @param[in] gdbarch  The GDB architecture being used
793
   @param[in] pc       Current program counter
794
 
795
   @return  The address of the end of the prolog if the PC is in a function
796 146 jeremybenn
            prologue, otherwise the input  address.                           */
797
/*----------------------------------------------------------------------------*/
798 24 jeremybenn
 
799
static CORE_ADDR
800
or1k_skip_prologue (struct gdbarch *gdbarch,
801
                    CORE_ADDR       pc)
802
{
803 146 jeremybenn
  CORE_ADDR     addr;
804
  uint32_t      inst;
805 24 jeremybenn
 
806 146 jeremybenn
  unsigned int  ra, rb, rd;             /* For instruction analysis */
807
  int           simm;
808
 
809
  int           frame_size = 0;
810 24 jeremybenn
 
811 146 jeremybenn
  /* Try using SAL first if we have symbolic information available. */
812
  if (find_pc_partial_function (pc, NULL, NULL, NULL))
813 24 jeremybenn
    {
814
      CORE_ADDR  prologue_end = skip_prologue_using_sal( pc );
815
 
816 146 jeremybenn
      return  (prologue_end > pc) ? prologue_end : pc;
817 24 jeremybenn
    }
818
 
819 146 jeremybenn
  /* Look to see if we can find any of the standard prologue sequence. All
820
     quite difficult, since any or all of it may be missing. So this is just a
821
     best guess! */
822
  addr = pc;                            /* Where we have got to */
823
  inst = or1k_fetch_instruction (NULL, addr);
824 24 jeremybenn
 
825 146 jeremybenn
  /* Look for the new stack pointer being set up. */
826
  if (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
827
      (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
828
      (simm < 0) && (0 == (simm % 4)))
829 24 jeremybenn
    {
830 146 jeremybenn
      frame_size  = -simm;
831
      addr       += OR1K_INSTLEN;
832
      inst        = or1k_fetch_instruction (NULL, addr);
833 24 jeremybenn
    }
834
 
835 146 jeremybenn
  /* Look for the frame pointer being manipulated. */
836
  if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
837
      (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb) &&
838
      (simm >= 0) && (0 == (simm % 4)))
839
    {
840
      addr += OR1K_INSTLEN;
841
      inst  = or1k_fetch_instruction (NULL, addr);
842 24 jeremybenn
 
843 146 jeremybenn
      gdb_assert (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
844
                  (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
845
                  (simm == frame_size));
846 24 jeremybenn
 
847 146 jeremybenn
      addr += OR1K_INSTLEN;
848
      inst  = or1k_fetch_instruction (NULL, addr);
849
    }
850 24 jeremybenn
 
851 146 jeremybenn
  /* Look for the link register being saved */
852
  if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
853
      (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb) &&
854
      (simm >= 0) && (0 == (simm % 4)))
855
    {
856
      addr += OR1K_INSTLEN;
857
      inst  = or1k_fetch_instruction (NULL, addr);
858 24 jeremybenn
    }
859
 
860 146 jeremybenn
  /* Look for callee-saved register being saved. The register must be one
861
     of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
862
     r24, r26, r28, r30).*/
863
  while (1)
864
    {
865
      if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
866
          (OR1K_SP_REGNUM == ra) && (rb >= OR1K_FIRST_SAVED_REGNUM) &&
867
          (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
868 24 jeremybenn
        {
869
          addr += OR1K_INSTLEN;
870 146 jeremybenn
          inst  = or1k_fetch_instruction (NULL, addr);
871 24 jeremybenn
        }
872
      else
873
        {
874 146 jeremybenn
          /* Nothing else to look for. We have found the end of the prologue. */
875
          return  addr;
876 24 jeremybenn
        }
877
    }
878
}       /* or1k_skip_prologue() */
879
 
880
 
881
/*----------------------------------------------------------------------------*/
882
/*!Align the stack frame
883
 
884
   OpenRISC 1000 uses a falling stack frame, so this aligns down to the
885
   nearest 8 bytes. Useful when we'be building a dummy frame.
886
 
887
   @param[in] gdbarch  The GDB architecture being used
888
   @param[in] sp       Current stack pointer
889
 
890
   @return  The aligned stack frame address */
891
/*---------------------------------------------------------------------------*/
892
 
893
static CORE_ADDR
894
or1k_frame_align (struct gdbarch *gdbarch,
895
                  CORE_ADDR       sp)
896
{
897
  return align_down (sp, OR1K_STACK_ALIGN);
898
 
899
}       /* or1k_frame_align() */
900
 
901
 
902
/*----------------------------------------------------------------------------*/
903
/*!Unwind the program counter from a stack frame
904
 
905
   This just uses the built in frame unwinder
906
 
907
   @param[in] gdbarch     The GDB architecture being used
908
   @param[in] next_frame  Frame info for the NEXT frame
909
 
910
   @return  The program counter for THIS frame */
911
/*---------------------------------------------------------------------------*/
912
 
913
static CORE_ADDR
914
or1k_unwind_pc (struct gdbarch    *gdbarch,
915
                struct frame_info *next_frame)
916
{
917 146 jeremybenn
  CORE_ADDR pc = frame_unwind_register_unsigned (next_frame, OR1K_NPC_REGNUM);
918 24 jeremybenn
 
919 146 jeremybenn
  return pc;
920
 
921 24 jeremybenn
}       /* or1k_unwind_pc() */
922
 
923
 
924
/*----------------------------------------------------------------------------*/
925
/*!Unwind the stack pointer from a stack frame
926
 
927
   This just uses the built in frame unwinder
928
 
929
   @param[in] gdbarch     The GDB architecture being used
930
   @param[in] next_frame  Frame info for the NEXT frame
931
 
932
   @return  The stack pointer for THIS frame */
933
/*---------------------------------------------------------------------------*/
934
 
935
static CORE_ADDR
936
or1k_unwind_sp (struct gdbarch    *gdbarch,
937
                struct frame_info *next_frame)
938
{
939 146 jeremybenn
  CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
940 24 jeremybenn
 
941 146 jeremybenn
  return sp;
942
 
943 24 jeremybenn
}       /* or1k_unwind_sp() */
944
 
945
 
946
/*----------------------------------------------------------------------------*/
947
/*!Create a dummy stack frame
948
 
949
   The arguments are placed in registers and/or pushed on the stack as per the
950
   OR1K ABI.
951
 
952
   @param[in] gdbarch        The architecture to use
953
   @param[in] function       Pointer to the function that will be called
954
   @param[in] regcache       The register cache to use
955
   @param[in] bp_addr        Breakpoint address
956
   @param[in] nargs          Number of ags to push
957
   @param[in] args           The arguments
958
   @param[in] sp             The stack pointer
959
   @param[in] struct_return  True (1) if this returns a structure
960
   @param[in] struct_addr    Address for returning structures
961
 
962
   @return  The updated stack pointer */
963
/*---------------------------------------------------------------------------*/
964
 
965
static CORE_ADDR
966
or1k_push_dummy_call (struct gdbarch  *gdbarch,
967
                      struct value    *function,
968
                      struct regcache *regcache,
969
                      CORE_ADDR        bp_addr,
970
                      int              nargs,
971
                      struct value   **args,
972
                      CORE_ADDR        sp,
973
                      int              struct_return,
974
                      CORE_ADDR        struct_addr)
975
{
976
  int           argreg;
977
  int           argnum;
978
  int           first_stack_arg;
979
  int           stack_offset = 0;
980
 
981
  unsigned int  bpa = (gdbarch_tdep (gdbarch))->bytes_per_address;
982
  unsigned int  bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
983
 
984
  /* Return address */
985
  regcache_cooked_write_unsigned (regcache, OR1K_LR_REGNUM, bp_addr);
986
 
987
  /* Register for the next argument */
988
  argreg = OR1K_FIRST_ARG_REGNUM;
989
 
990
  /* Location for a returned structure. This is passed as a silent first
991
     argument. */
992
 
993
  if (struct_return)
994
    {
995
      regcache_cooked_write_unsigned (regcache, OR1K_FIRST_ARG_REGNUM,
996
                                      struct_addr);
997
      argreg++;
998
    }
999
 
1000
  /* Put as many args as possible in registers */
1001
  for (argnum = 0; argnum < nargs; argnum++)
1002
    {
1003
      char           *val;
1004
      char            valbuf[sizeof (ULONGEST) ];
1005
 
1006
      struct value   *arg      = args[argnum];
1007
      struct type    *arg_type = check_typedef (value_type (arg));
1008
      int             len      = arg_type->length;
1009
      enum type_code  typecode = arg_type->main_type->code;
1010
 
1011
      /* The EABI passes structures that do not fit in a register by
1012
         reference. In all other cases, pass the structure by value.  */
1013
      if((len > bpw) &&
1014
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1015
        {
1016
 
1017
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1018
          len      = bpa;
1019
          val      = valbuf;
1020
        }
1021
      else
1022
        {
1023
          val = (char *)value_contents (arg);
1024
        }
1025
 
1026
      if((len > bpw) && (argreg <= (OR1K_LAST_ARG_REGNUM - 1)))
1027
        {
1028
 
1029
          /* Big scalars use two registers, must be pair aligned. This code
1030
             breaks if we can have quad-word scalars (e.g. long double). */
1031
          ULONGEST regval = extract_unsigned_integer (val, len);
1032
 
1033
          gdb_assert (len <= (bpw * 2));
1034
 
1035
          argreg = 1 == (argreg & 1) ? argreg + 1 : argreg;
1036
          regcache_cooked_write_unsigned (regcache, argreg, regval >> bpw);
1037
          regcache_cooked_write_unsigned (regcache, argreg + 1,
1038
                                          regval && ((ULONGEST)(1 << bpw) - 1));
1039
          argreg += 2;
1040
        }
1041
      else if (argreg <= OR1K_LAST_ARG_REGNUM)
1042
        {
1043
          regcache_cooked_write_unsigned (regcache, argreg,
1044
                                          extract_unsigned_integer (val, len));
1045
          argreg++;
1046
        }
1047
      else
1048
        {
1049
          /* Run out of regs */
1050
          break;
1051
        }
1052
    }
1053
 
1054
  first_stack_arg = argnum;
1055
 
1056
  /* If we get here with argnum < nargs, then arguments remain to be placed on
1057
     the stack. This is tricky, since they must be pushed in reverse order and
1058
     the stack in the end must be aligned. The only solution is to do it in
1059
     two stages, the first to compute the stack size, the second to save the
1060
     args. */
1061
 
1062
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1063
    {
1064
      struct value   *arg      = args[argnum];
1065
      struct type    *arg_type = check_typedef (value_type (arg));
1066
      int             len      = arg_type->length;
1067
      enum type_code  typecode = arg_type->main_type->code;
1068
 
1069
      if((len > bpw) &&
1070
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1071
        {
1072
          /* Large structures are passed as addresses */
1073
          sp -= bpa;
1074
        }
1075
      else
1076
        {
1077
        /* Big scalars use more than one word. Code here allows for future
1078
         quad-word entities (e.g. long double) */
1079
          sp -= ((len + bpw - 1) / bpw) * bpw;
1080
        }
1081
    }
1082
 
1083
  sp           = gdbarch_frame_align (gdbarch, sp);
1084
  stack_offset = 0;
1085
 
1086
  /* Push the remaining args on the stack */
1087
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1088
    {
1089
      char           *val;
1090
      char            valbuf[sizeof (ULONGEST) ];
1091
 
1092
      struct value   *arg      = args[argnum];
1093
      struct type    *arg_type = check_typedef (value_type (arg));
1094
      int             len      = arg_type->length;
1095
      enum type_code  typecode = arg_type->main_type->code;
1096
 
1097
      /* The EABI passes structures that do not fit in a register by
1098
         reference. In all other cases, pass the structure by value.  */
1099
      if((len > bpw) &&
1100
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1101
        {
1102
 
1103
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1104
          len      = bpa;
1105
          val      = valbuf;
1106
        }
1107
      else
1108
        {
1109
          val = (char *)value_contents (arg);
1110
        }
1111
 
1112
      gdb_assert (len <= (bpw * 2));
1113
 
1114
      write_memory (sp + stack_offset, val, len);
1115
      stack_offset += ((len + bpw - 1) / bpw) * bpw;
1116
    }
1117
 
1118
  /* Save the updated stack pointer */
1119
  regcache_cooked_write_unsigned (regcache, OR1K_SP_REGNUM, sp);
1120
 
1121
  return sp;
1122
 
1123
}       /* or1k_push_dummy_call() */
1124
 
1125
 
1126
/*----------------------------------------------------------------------------*/
1127
/*!Unwind a dummy stack frame
1128
 
1129
   Tear down a dummy frame created by or1k_push_dummy_call(). This data has to
1130
   be constructed manually from the data in our hand. The frame_id info in
1131
   next_frame is not complete, and a call to unwind it will just recurse to us
1132
   (we think).
1133
 
1134
   The stack pointer and program counter can be unwound. From the program
1135
   counter, the start of the function can be determined.
1136
 
1137
   @param[in] gdbarch     The architecture to use
1138
   @param[in] next_frame  Information about the next frame
1139
 
1140
   @return  Frame ID of the preceding frame */
1141
/*---------------------------------------------------------------------------*/
1142
 
1143
static struct frame_id
1144
or1k_unwind_dummy_id (struct gdbarch    *gdbarch,
1145
                      struct frame_info *next_frame)
1146
{
1147
  CORE_ADDR  this_sp = gdbarch_unwind_sp (gdbarch, next_frame);
1148
  CORE_ADDR  this_pc = gdbarch_unwind_pc (gdbarch, next_frame);
1149
 
1150
  CORE_ADDR  start_addr;
1151
  CORE_ADDR  end_addr;
1152
 
1153
  /* Try using SAL to find the true function start. Otherwise the PC will
1154
     have to be a proxy for the start of the function. */
1155
  if (find_pc_partial_function (this_pc, NULL, &start_addr, &end_addr))
1156
    {
1157
      return  frame_id_build (this_sp, start_addr);
1158
    }
1159
  else
1160
    {
1161
      return  frame_id_build (this_sp, this_pc);
1162
    }
1163
 
1164
}       /* or1k_unwind_dummy_id() */
1165
 
1166
 
1167 146 jeremybenn
 
1168
 
1169
 
1170
/* Support functions for frame handling */
1171
 
1172
 
1173 24 jeremybenn
/*----------------------------------------------------------------------------*/
1174 146 jeremybenn
/*!Initialize a prologue (unwind) cache
1175
 
1176
   Build up the information (saved registers etc) for the given frame if it
1177
   does not already exist.
1178
 
1179
   STACK FORMAT
1180
   ============
1181
 
1182
   The OR1K has a falling stack frame and a simple prolog. The Stack pointer
1183
   is R1 and the frame pointer R2. The frame base is therefore the address
1184
   held in R2 and the stack pointer (R1) is the frame base of the NEXT frame.
1185
 
1186
   @verbatim
1187
   l.addi  r1,r1,-frame_size    # SP now points to end of new stack frame
1188
   @endverbatim
1189
 
1190
   The stack pointer may not be set up in a frameless function (e.g. a simple
1191
   leaf function).
1192
 
1193
   @verbatim
1194
   l.sw    fp_loc(r1),r2        # old FP saved in new stack frame
1195
   l.addi  r2,r1,frame_size     # FP now points to base of new stack frame
1196
   @endverbatim
1197
 
1198
   The frame pointer is not necessarily saved right at the end of the stack
1199
   frame - OR1K saves enough space for any args to called functions right at
1200
   the end (this is a difference from the Architecture Manual).
1201
 
1202
   @verbatim
1203
   l.sw    lr_loc(r1),r9        # Link (return) address
1204
   @endverbatim
1205
 
1206
   The link register is usally saved at fp_loc - 4. It may not be saved at all
1207
   in a leaf function.
1208
 
1209
   @verbatim
1210
   l.sw    reg_loc(r1),ry       # Save any callee saved regs
1211
   @endverbatim
1212
 
1213
   The offsets x for the callee saved registers generally (always?) rise in
1214
   increments of 4, starting at fp_loc + 4. If the frame pointer is omitted
1215
   (an option to GCC), then it may not be saved at all. There may be no callee
1216
   saved registers.
1217
 
1218
   So in summary none of this may be present. However what is present seems
1219
   always to follow this fixed order, and occur before any substantive code
1220
   (it is possible for GCC to have more flexible scheduling of the prologue,
1221
   but this does not seem to occur for OR1K).
1222
 
1223
   ANALYSIS
1224
   ========
1225
 
1226
   This prolog is used, even for -O3 with GCC.
1227
 
1228
   All this analysis must allow for the possibility that the PC is in the
1229
   middle of the prologue. Data should only be set up insofar as it has been
1230
   computed.
1231
 
1232
   A suite of "helper" routines are used, allowing reuse for
1233
   or1k_skip_prologue().
1234
 
1235
   Reportedly, this is only valid for frames less than 0x7fff in size.
1236
 
1237
   @param[in]     next_frame           The NEXT frame (i.e. inner from here,
1238
                                       the one THIS frame called)
1239
   @param[in,out] this_prologue_cache  The prologue cache. If not supplied, we
1240
                                       build it.
1241
 
1242
   @return  The prolog cache (duplicates the return through the argument) */
1243
/*---------------------------------------------------------------------------*/
1244
 
1245
static struct trad_frame_cache *
1246
or1k_frame_unwind_cache (struct frame_info  *next_frame,
1247
                         void              **this_prologue_cache)
1248
{
1249
  struct gdbarch          *gdbarch;
1250
  struct trad_frame_cache *info;
1251
 
1252
  CORE_ADDR                this_pc;
1253
  CORE_ADDR                this_sp;
1254
  int                      frame_size = 0;
1255
 
1256
  CORE_ADDR                start_addr;
1257
  CORE_ADDR                end_addr;
1258
 
1259
  /* Nothing to do if we already have this info */
1260
  if (NULL != *this_prologue_cache)
1261
    {
1262
      return *this_prologue_cache;
1263
    }
1264
 
1265
  /* Get a new prologue cache and populate it with default values */
1266
  info                 = trad_frame_cache_zalloc (next_frame);
1267
  *this_prologue_cache = info;
1268
 
1269
  /* Find the start address of THIS function (which is a NORMAL frame, even if
1270
     the NEXT frame is the sentinel frame) and the end of its prologue.  */
1271
  start_addr = frame_func_unwind (next_frame, NORMAL_FRAME);
1272
 
1273
  /* Return early if GDB couldn't find the function.  */
1274
  if (start_addr == 0)
1275
    {
1276
      return  info;
1277
    }
1278
 
1279
  /* Unwind key registers for THIS frame. */
1280
  gdbarch = get_frame_arch (next_frame);
1281
  this_pc = or1k_unwind_pc (gdbarch, next_frame);
1282
  this_sp = or1k_unwind_sp (gdbarch, next_frame);
1283
 
1284
  /* The frame base of THIS frame is its stack pointer. This is the same
1285
     whether we are frameless or not. */
1286
  trad_frame_set_this_base (info, this_sp);
1287
 
1288
  /* The default is to find the PC of the PREVIOUS frame in the link register
1289
     of this frame. This may be changed if we find the link register was saved
1290
     on the stack. */
1291
  trad_frame_set_reg_realreg (info, OR1K_NPC_REGNUM, OR1K_LR_REGNUM);
1292
 
1293
  /* We should only examine code that is in the prologue and which has been
1294
     executed. This is all code up to (but not including) end_addr or the PC,
1295
     whichever is first. */
1296
  end_addr = or1k_skip_prologue (gdbarch, start_addr);
1297
  end_addr = (this_pc > end_addr) ? end_addr : this_pc;
1298
 
1299
  /* All the following analysis only occurs if we are in the prologue and have
1300
     executed the code. Check we have a sane prologue size, and if zero we
1301
     are frameless and can give up here. */
1302
  if (end_addr < start_addr)
1303
    {
1304
      fatal ("end addr 0x%08x is less than start addr 0x%08x\n",
1305
             (unsigned int) end_addr, (unsigned int) start_addr);
1306
    }
1307
 
1308
  if (end_addr == start_addr)
1309
    {
1310
      frame_size = 0;
1311
    }
1312
  else
1313
    {
1314
      /* have a frame. Look for the various components */
1315
      CORE_ADDR  addr = start_addr;     /* Where we have got to */
1316
      uint32_t   inst = or1k_fetch_instruction (next_frame, addr);
1317
 
1318
      unsigned int  ra, rb, rd;         /* For instruction analysis */
1319
      int           simm;
1320
 
1321
      /* Look for the new stack pointer being set up. */
1322
      if (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
1323
          (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
1324
          (simm < 0) && (0 == (simm % 4)))
1325
        {
1326
          frame_size  = -simm;
1327
          addr       += OR1K_INSTLEN;
1328
          inst        = or1k_fetch_instruction (next_frame, addr);
1329
 
1330
          /* The stack pointer of the PREVIOUS frame is frame_size greater
1331
             than the stack pointer of THIS frame. */
1332
          trad_frame_set_reg_value (info, OR1K_SP_REGNUM,
1333
                                    this_sp + frame_size);
1334
        }
1335
 
1336
      /* Look for the frame pointer being manipulated. */
1337
      if ((addr < end_addr) &&
1338
          or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1339
          (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb) &&
1340
          (simm >= 0) && (0 == (simm % 4)))
1341
        {
1342
          addr += OR1K_INSTLEN;
1343
          inst  = or1k_fetch_instruction (next_frame, addr);
1344
 
1345
          /* At this stage, we can find the frame pointer of the PREVIOUS
1346
             frame on the stack of the current frame. */
1347
          trad_frame_set_reg_addr (info, OR1K_FP_REGNUM, this_sp + simm);
1348
 
1349
          /* Look for the new frame pointer being set up */
1350
          if (addr < end_addr)
1351
            {
1352
              gdb_assert (or1k_analyse_l_addi (inst, &rd, &ra, &simm) &&
1353
                          (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra) &&
1354
                          (simm == frame_size));
1355
 
1356
              addr += OR1K_INSTLEN;
1357
              inst  = or1k_fetch_instruction (next_frame, addr);
1358
 
1359
              /* If we have got this far, the stack pointer of the PREVIOUS
1360
                 frame is the frame pointer of THIS frame. */
1361
              trad_frame_set_reg_realreg (info, OR1K_SP_REGNUM, OR1K_FP_REGNUM);
1362
            }
1363
        }
1364
 
1365
      /* Look for the link register being saved */
1366
      if ((addr < end_addr) &&
1367
          or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1368
          (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb) &&
1369
          (simm >= 0) && (0 == (simm % 4)))
1370
        {
1371
          addr += OR1K_INSTLEN;
1372
          inst  = or1k_fetch_instruction (next_frame, addr);
1373
 
1374
          /* If the link register is saved in the THIS frame, it holds the
1375
             value of the PC in the PREVIOUS frame. This overwrites the
1376
             previous information about finding the PC in the link
1377
             register. */
1378
          trad_frame_set_reg_addr (info, OR1K_NPC_REGNUM, this_sp + simm);
1379
        }
1380
 
1381
      /* Look for callee-saved register being save. The register must be one
1382
         of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
1383
         r24, r26, r28, r30).*/
1384
      while (addr < end_addr)
1385
        {
1386
          if (or1k_analyse_l_sw (inst, &simm, &ra, &rb) &&
1387
              (OR1K_SP_REGNUM == ra) && (rb >= OR1K_FIRST_SAVED_REGNUM) &&
1388
              (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
1389
            {
1390
              addr += OR1K_INSTLEN;
1391
              inst  = or1k_fetch_instruction (next_frame, addr);
1392
 
1393
              /* The register in the PREVIOUS frame can be found at this
1394
                 location in THIS frame */
1395
              trad_frame_set_reg_addr (info, rb, this_sp + simm);
1396
            }
1397
          else
1398
            {
1399
              break;                    /* Not a register save instruction */
1400
            }
1401
        }
1402
    }
1403
 
1404
  /* Build the frame ID */
1405
  trad_frame_set_id (info, frame_id_build (this_sp, start_addr));
1406
 
1407
  return info;
1408
 
1409
}       /* or1k_frame_unwind_cache() */
1410
 
1411
 
1412
/*----------------------------------------------------------------------------*/
1413
/*!Find the frame ID of this frame
1414
 
1415
   Given a GDB frame (called by THIS frame), determine the address of oru
1416
   frame and from this create a new GDB frame struct. The info required is
1417
   obtained from the prologue cache for THIS frame.
1418
 
1419
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1420
                                    one THIS frame called)
1421
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
1422
   @param[out] this_id              Frame ID of our own frame.
1423
 
1424
   @return  Frame ID for THIS frame */
1425
/*---------------------------------------------------------------------------*/
1426
 
1427
static void
1428
or1k_frame_this_id (struct frame_info  *next_frame,
1429
                    void              **this_prologue_cache,
1430
                    struct frame_id    *this_id)
1431
{
1432
  struct trad_frame_cache *info =
1433
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
1434
 
1435
  trad_frame_get_id (info, this_id);
1436
 
1437
}       /* or1k_frame_this_id() */
1438
 
1439
 
1440
/*----------------------------------------------------------------------------*/
1441
/*!Get a register from THIS frame
1442
 
1443
   Given a pointer to the NEXT frame, return the details of a register in the
1444
   PREVIOUS frame.
1445
 
1446
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1447
                                    one THIS frame called)
1448
   @param[in]  this_prologue_cache  Any cached prologue associated with THIS
1449
                                    frame, which may therefore tell us about
1450
                                    registers in the PREVIOUS frame.
1451
   @param[in]  regnum               The register of interest in the PREVIOUS
1452
                                    frame
1453
   @param[out] optimizedp           True (1) if the register has been
1454
                                    optimized out.
1455
   @param[out] lvalp                What sort of l-value (if any) does the
1456
                                    register represent
1457
   @param[out] addrp                Address in THIS frame where the register's
1458
                                    value may be found (-1 if not available)
1459
   @param[out] realregp             Register in this frame where the
1460
                                    register's value may be found (-1 if not
1461
                                    available)
1462
   @param[out] bufferp              If non-NULL, buffer where the value held
1463
   in the register may be put */
1464
/*--------------------------------------------------------------------------*/
1465
 
1466
static void
1467
or1k_frame_prev_register (struct frame_info  *next_frame,
1468
                          void              **this_prologue_cache,
1469
                          int                 regnum,
1470
                          int                *optimizedp,
1471
                          enum lval_type     *lvalp,
1472
                          CORE_ADDR          *addrp,
1473
                          int                *realregp,
1474
                          gdb_byte           *bufferp)
1475
{
1476
  struct trad_frame_cache *info =
1477
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
1478
 
1479
  trad_frame_get_register (info, next_frame, regnum, optimizedp, lvalp, addrp,
1480
                           realregp, bufferp);
1481
 
1482
}       /* or1k_frame_prev_register() */
1483
 
1484
 
1485
/*----------------------------------------------------------------------------*/
1486
/*!Return the base address of the frame
1487
 
1488
   The commenting in the GDB source code could mean our stack pointer or our
1489
   frame pointer, since we have a falling stack, but index within the frame
1490
   using negative offsets from the FP.
1491
 
1492
   This seems to be the function used to determine the value of $fp, but the
1493
   value required seems to be the stack pointer, so we return that, even if
1494
   the value of $fp will be wrong.
1495
 
1496
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
1497
                                    one THIS frame called)
1498
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
1499
 
1500
   @return  The frame base address */
1501
/*---------------------------------------------------------------------------*/
1502
 
1503
static CORE_ADDR
1504
or1k_frame_base_address (struct frame_info  *next_frame,
1505
                         void              **this_prologue_cache)
1506
{
1507
  return  frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
1508
 
1509
}       /* or1k_frame_base_address() */
1510
 
1511
 
1512
/*----------------------------------------------------------------------------*/
1513 24 jeremybenn
/*!The OpenRISC 1000 registered frame sniffer
1514
 
1515
   This function just identifies our family of frame sniffing functions.
1516
 
1517
   @param[in] next_frame  The "next" (i.e. inner, newer from here, the one
1518
                          THIS frame called) frame.
1519
 
1520
                          @return  A pointer to a struct identifying the sniffing functions */
1521
/*---------------------------------------------------------------------------*/
1522
 
1523
static const struct frame_unwind *
1524
or1k_frame_sniffer (struct frame_info *next_frame)
1525
{
1526
  static const struct frame_unwind or1k_frame_unwind = {
1527
    .type          = NORMAL_FRAME,
1528
    .this_id       = or1k_frame_this_id,
1529
    .prev_register = or1k_frame_prev_register,
1530
    .unwind_data   = NULL,
1531
    .sniffer       = NULL,
1532
    .prev_pc       = NULL,
1533
    .dealloc_cache = NULL
1534
  };
1535
 
1536
  return  &or1k_frame_unwind;
1537
 
1538
}       /* or1k_frame_sniffer() */
1539
 
1540
 
1541
/*----------------------------------------------------------------------------*/
1542
/*!Architecture initialization for OpenRISC 1000
1543
 
1544
   Looks for a candidate architecture in the list of architectures supplied
1545
   using the info supplied. If none match, create a new architecture.
1546
 
1547
   @param[in] info    Information about the target architecture
1548
   @param[in] arches  The list of currently know architectures
1549
 
1550
   @return  A structure describing the target architecture */
1551
/*---------------------------------------------------------------------------*/
1552
 
1553
static struct gdbarch *
1554
or1k_gdbarch_init (struct gdbarch_info  info,
1555
                   struct gdbarch_list *arches)
1556
{
1557
  static struct frame_base     or1k_frame_base;
1558
  struct        gdbarch       *gdbarch;
1559
  struct        gdbarch_tdep  *tdep;
1560
  const struct  bfd_arch_info *binfo;
1561
 
1562
  /* Find a candidate among the list of pre-declared architectures.  */
1563
  arches = gdbarch_list_lookup_by_info (arches, &info);
1564
  if (NULL != arches)
1565
    {
1566
      return arches->gdbarch;
1567
    }
1568
 
1569
  /* None found, create a new architecture from the information
1570
     provided. Can't initialize all the target dependencies until we actually
1571
     know which target we are talking to, but put in some defaults for now. */
1572
 
1573
  binfo                   = info.bfd_arch_info;
1574
  tdep                    = xmalloc (sizeof *tdep);
1575
  tdep->num_matchpoints   = OR1K_MAX_MATCHPOINTS;
1576
  tdep->num_gpr_regs      = OR1K_MAX_GPR_REGS;
1577
  tdep->bytes_per_word    = binfo->bits_per_word    / binfo->bits_per_byte;
1578
  tdep->bytes_per_address = binfo->bits_per_address / binfo->bits_per_byte;
1579
  gdbarch                 = gdbarch_alloc (&info, tdep);
1580
 
1581
  /* Target data types.  */
1582
  set_gdbarch_short_bit             (gdbarch, 16);
1583
  set_gdbarch_int_bit               (gdbarch, 32);
1584
  set_gdbarch_long_bit              (gdbarch, 32);
1585
  set_gdbarch_long_long_bit         (gdbarch, 64);
1586
  set_gdbarch_float_bit             (gdbarch, 32);
1587
  set_gdbarch_float_format          (gdbarch, floatformats_ieee_single);
1588
  set_gdbarch_double_bit            (gdbarch, 64);
1589
  set_gdbarch_double_format         (gdbarch, floatformats_ieee_double);
1590
  set_gdbarch_long_double_bit       (gdbarch, 64);
1591
  set_gdbarch_long_double_format    (gdbarch, floatformats_ieee_double);
1592
  set_gdbarch_ptr_bit               (gdbarch, binfo->bits_per_address);
1593
  set_gdbarch_addr_bit              (gdbarch, binfo->bits_per_address);
1594
  set_gdbarch_char_signed           (gdbarch, 1);
1595
 
1596
  /* Information about the target architecture */
1597
  set_gdbarch_return_value          (gdbarch, or1k_return_value);
1598
  set_gdbarch_breakpoint_from_pc    (gdbarch, or1k_breakpoint_from_pc);
1599
  set_gdbarch_single_step_through_delay
1600
                                    (gdbarch, or1k_single_step_through_delay);
1601
  set_gdbarch_have_nonsteppable_watchpoint
1602
                                    (gdbarch, 1);
1603
  switch (gdbarch_byte_order (gdbarch))
1604
    {
1605
    case BFD_ENDIAN_BIG:
1606
      set_gdbarch_print_insn        (gdbarch, print_insn_big_or32);
1607
      break;
1608
 
1609
    case BFD_ENDIAN_LITTLE:
1610
      set_gdbarch_print_insn        (gdbarch, print_insn_little_or32);
1611
      break;
1612
 
1613
    case BFD_ENDIAN_UNKNOWN:
1614
      error ("or1k_gdbarch_init: Unknown endianism");
1615
      break;
1616
    }
1617
 
1618
  /* Register architecture */
1619
  set_gdbarch_pseudo_register_read  (gdbarch, or1k_pseudo_register_read);
1620
  set_gdbarch_pseudo_register_write (gdbarch, or1k_pseudo_register_write);
1621
  set_gdbarch_num_regs              (gdbarch, OR1K_NUM_REGS);
1622
  set_gdbarch_num_pseudo_regs       (gdbarch, OR1K_NUM_PSEUDO_REGS);
1623
  set_gdbarch_sp_regnum             (gdbarch, OR1K_SP_REGNUM);
1624
  set_gdbarch_pc_regnum             (gdbarch, OR1K_NPC_REGNUM);
1625
  set_gdbarch_ps_regnum             (gdbarch, OR1K_SR_REGNUM);
1626
  set_gdbarch_deprecated_fp_regnum  (gdbarch, OR1K_FP_REGNUM);
1627
 
1628
  /* Functions to supply register information */
1629
  set_gdbarch_register_name         (gdbarch, or1k_register_name);
1630
  set_gdbarch_register_type         (gdbarch, or1k_register_type);
1631
  set_gdbarch_print_registers_info  (gdbarch, or1k_registers_info);
1632
  set_gdbarch_register_reggroup_p   (gdbarch, or1k_register_reggroup_p);
1633
 
1634
  /* Functions to analyse frames */
1635
  set_gdbarch_skip_prologue         (gdbarch, or1k_skip_prologue);
1636
  set_gdbarch_inner_than            (gdbarch, core_addr_lessthan);
1637
  set_gdbarch_frame_align           (gdbarch, or1k_frame_align);
1638
  set_gdbarch_frame_red_zone_size   (gdbarch, OR1K_FRAME_RED_ZONE_SIZE);
1639
 
1640
  /* Functions to access frame data */
1641
  set_gdbarch_unwind_pc             (gdbarch, or1k_unwind_pc);
1642
  set_gdbarch_unwind_sp             (gdbarch, or1k_unwind_sp);
1643
 
1644
  /* Functions handling dummy frames */
1645
  set_gdbarch_push_dummy_call       (gdbarch, or1k_push_dummy_call);
1646
  set_gdbarch_unwind_dummy_id       (gdbarch, or1k_unwind_dummy_id);
1647
 
1648
  /* High level frame base sniffer */
1649
  or1k_frame_base.unwind      = or1k_frame_sniffer (NULL);
1650
  or1k_frame_base.this_base   = or1k_frame_base_address;
1651
  or1k_frame_base.this_locals = or1k_frame_base_address;
1652
  or1k_frame_base.this_args   = or1k_frame_base_address;
1653
  frame_base_set_default            (gdbarch, &or1k_frame_base);
1654
 
1655
  /* Low level frame sniffers */
1656
  frame_unwind_append_sniffer       (gdbarch, dwarf2_frame_sniffer);
1657
  frame_unwind_append_sniffer       (gdbarch, or1k_frame_sniffer);
1658
 
1659
 
1660
  return gdbarch;
1661
 
1662
}       /* or1k_gdbarch_init() */
1663
 
1664
 
1665
/*----------------------------------------------------------------------------*/
1666
/*!Dump the target specific data for this architecture
1667
 
1668
   @param[in] gdbarch  The architecture of interest
1669
   @param[in] file     Where to dump the data */
1670
/*---------------------------------------------------------------------------*/
1671
 
1672
static void
1673
or1k_dump_tdep (struct gdbarch *gdbarch,
1674
                struct ui_file *file)
1675
{
1676
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1677
 
1678
  if (NULL == tdep)
1679
    {
1680
      return;                   /* Nothing to report */
1681
    }
1682
 
1683
  fprintf_unfiltered (file, "or1k_dump_tdep: %d matchpoints available\n",
1684
                      tdep->num_matchpoints);
1685
  fprintf_unfiltered (file, "or1k_dump_tdep: %d general purpose registers\n",
1686
                      tdep->num_gpr_regs);
1687
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per word\n",
1688
                      tdep->bytes_per_word);
1689
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per address\n",
1690
                      tdep->bytes_per_address);
1691
 
1692
}       /* or1k_dump_tdep() */
1693
 
1694
 
1695
 
1696
/* Functions to add extra commands to GDB */
1697
 
1698
 
1699
/*----------------------------------------------------------------------------*/
1700
/*!Returns a special purpose register group name
1701
 
1702
   @param[in]  group  The SPR group number
1703
 
1704
   @return  The SPR name (pointer to the name argument) */
1705
/*---------------------------------------------------------------------------*/
1706
 
1707
static const char *
1708
or1k_spr_group_name (int  group)
1709
{
1710
  static const char *or1k_group_names[OR1K_NUM_SPGS] =
1711
    {
1712
      "SYS",
1713
      "DMMU",
1714
      "IMMU",
1715
      "DCACHE",
1716
      "ICACHE",
1717
      "MAC",
1718
      "DEBUG",
1719
      "PERF",
1720
      "POWER",
1721
      "PIC",
1722
      "TIMER",
1723
      "FPU"
1724
    };
1725
 
1726
  if ((0 <= group) && (group < OR1K_NUM_SPGS))
1727
    {
1728
      return or1k_group_names[group];
1729
    }
1730
  else
1731
    {
1732
      return "";
1733
    }
1734
}       /* or1k_spr_group_name() */
1735
 
1736
 
1737
/*----------------------------------------------------------------------------*/
1738
/*!Returns a special purpose register name
1739
 
1740
   @param[in]  group  The SPR group
1741
   @param[in]  index  The index within the SPR group
1742
   @param[out] name   Array to put the name in
1743
 
1744
   @return  The SPR name (pointer to the name argument) */
1745
/*---------------------------------------------------------------------------*/
1746
 
1747
static char *
1748
or1k_spr_register_name (int   group,
1749
                        int   index,
1750
                        char *name)
1751
{
1752
  char di;
1753
 
1754
  switch (group)
1755
    {
1756
 
1757
    case OR1K_SPG_SYS:
1758
      /* 1:1 names */
1759
      switch (index)
1760
        {
1761
        case OR1K_SPG_SYS_VR:       sprintf (name, "VR"      ); return  name;
1762
        case OR1K_SPG_SYS_UPR:      sprintf (name, "UPR"     ); return  name;
1763
        case OR1K_SPG_SYS_CPUCFGR:  sprintf (name, "CPUCFGR" ); return  name;
1764
        case OR1K_SPG_SYS_DMMUCFGR: sprintf (name, "DMMUCFGR"); return  name;
1765
        case OR1K_SPG_SYS_IMMUCFGR: sprintf (name, "IMMUCFGR"); return  name;
1766
        case OR1K_SPG_SYS_DCCFGR:   sprintf (name, "DCCFGR"  ); return  name;
1767
        case OR1K_SPG_SYS_ICCFGR:   sprintf (name, "ICCFGR"  ); return  name;
1768
        case OR1K_SPG_SYS_DCFGR:    sprintf (name, "DCFGR"   ); return  name;
1769
        case OR1K_SPG_SYS_PCCFGR:   sprintf (name, "PCCFGR"  ); return  name;
1770
        case OR1K_SPG_SYS_NPC:      sprintf (name, "NPC"     ); return  name;
1771
        case OR1K_SPG_SYS_SR:       sprintf (name, "SR"      ); return  name;
1772
        case OR1K_SPG_SYS_PPC:      sprintf (name, "PPC"     ); return  name;
1773
        case OR1K_SPG_SYS_FPCSR:    sprintf (name, "FPCSR"   ); return  name;
1774
        }
1775
 
1776
      /* Exception PC regs */
1777
      if((OR1K_SPG_SYS_EPCR <= index) &&
1778
         (index             <= OR1K_SPG_SYS_EPCR_END))
1779
        {
1780
          sprintf (name, "EPCR%d", index - OR1K_SPG_SYS_EPCR);
1781
          return  name;
1782
        }
1783
 
1784
      /* Exception EA regs */
1785
      if((OR1K_SPG_SYS_EEAR <= index) &&
1786
         (index             <= OR1K_SPG_SYS_EEAR_END))
1787
        {
1788
          sprintf (name, "EEAR%d", index - OR1K_SPG_SYS_EEAR);
1789
          return  name;
1790
        }
1791
 
1792
      /* Exception SR regs */
1793
      if((OR1K_SPG_SYS_ESR <= index) &&
1794
         (index            <= OR1K_SPG_SYS_ESR_END))
1795
        {
1796
          sprintf (name, "ESR%d", index - OR1K_SPG_SYS_ESR);
1797
          return  name;
1798
        }
1799
 
1800
      /* GPRs */
1801
      if((OR1K_SPG_SYS_GPR <= index) &&
1802
         (index            <= OR1K_SPG_SYS_GPR_END))
1803
        {
1804
          sprintf (name, "GPR%d", index - OR1K_SPG_SYS_GPR);
1805
          return  name;
1806
        }
1807
 
1808
      break;
1809
 
1810
    case OR1K_SPG_DMMU:
1811
    case OR1K_SPG_IMMU:
1812
      /* MMU registers. Use DMMU constants throughout, but these are identical
1813
         to the corresponding IMMU constants */
1814
      di = OR1K_SPG_DMMU == group ? 'D' : 'I';
1815
 
1816
      /* 1:1 names */
1817
      switch (index)
1818
        {
1819
        case OR1K_SPG_DMMU_DMMUCR:
1820
          sprintf (name, "%cMMUCR",  di); return  name;
1821
        case OR1K_SPG_DMMU_DMMUPR:
1822
          sprintf (name, "%cMMUPR",  di); return  name;
1823
        case OR1K_SPG_DMMU_DTLBEIR:
1824
          sprintf (name, "%cTLBEIR", di); return  name;
1825
        }
1826
 
1827
      /* ATB Match registers */
1828
      if((OR1K_SPG_DMMU_DATBMR <= index) &&
1829
         (index                <= OR1K_SPG_DMMU_DATBMR_END))
1830
        {
1831
          sprintf (name, "%cATBMR%d", di, index - OR1K_SPG_DMMU_DATBMR);
1832
          return  name;
1833
        }
1834
 
1835
      /* ATB Translate registers */
1836
      if((OR1K_SPG_DMMU_DATBTR <= index) &&
1837
         (index                <= OR1K_SPG_DMMU_DATBTR_END))
1838
        {
1839
          sprintf (name, "%cATBTR%d", di, index - OR1K_SPG_DMMU_DATBTR);
1840
          return  name;
1841
        }
1842
 
1843
      /* TLB Way 1 Match registers */
1844
      if((OR1K_SPG_DMMU_DTLBW1MR <= index) &&
1845
         (index                <= OR1K_SPG_DMMU_DTLBW1MR_END))
1846
        {
1847
          sprintf (name, "%cTLBW1MR%d", di, index - OR1K_SPG_DMMU_DTLBW1MR);
1848
          return  name;
1849
        }
1850
 
1851
      /* TLB Way 1 Translate registers */
1852
      if((OR1K_SPG_DMMU_DTLBW1TR <= index) &&
1853
         (index                <= OR1K_SPG_DMMU_DTLBW1TR_END))
1854
        {
1855
          sprintf (name, "%cTLBW1TR%d", di, index - OR1K_SPG_DMMU_DTLBW1TR);
1856
          return  name;
1857
        }
1858
 
1859
      /* TLB Way 2 Match registers */
1860
      if((OR1K_SPG_DMMU_DTLBW2MR <= index) &&
1861
         (index                <= OR1K_SPG_DMMU_DTLBW2MR_END))
1862
        {
1863
          sprintf (name, "%cTLBW2MR%d", di, index - OR1K_SPG_DMMU_DTLBW2MR);
1864
          return  name;
1865
        }
1866
 
1867
      /* TLB Way 2 Translate registers */
1868
      if((OR1K_SPG_DMMU_DTLBW2TR <= index) &&
1869
         (index                <= OR1K_SPG_DMMU_DTLBW2TR_END))
1870
        {
1871
          sprintf (name, "%cTLBW2TR%d", di, index - OR1K_SPG_DMMU_DTLBW2TR);
1872
          return  name;
1873
        }
1874
 
1875
      /* TLB Way 3 Match registers */
1876
      if((OR1K_SPG_DMMU_DTLBW3MR <= index) &&
1877
         (index                <= OR1K_SPG_DMMU_DTLBW3MR_END))
1878
        {
1879
          sprintf (name, "%cTLBW3MR%d", di, index - OR1K_SPG_DMMU_DTLBW3MR);
1880
          return  name;
1881
        }
1882
 
1883
      /* TLB Way 3 Translate registers */
1884
      if((OR1K_SPG_DMMU_DTLBW3TR <= index) &&
1885
         (index                <= OR1K_SPG_DMMU_DTLBW3TR_END))
1886
        {
1887
          sprintf (name, "%cTLBW3TR%d", di, index - OR1K_SPG_DMMU_DTLBW3TR);
1888
          return  name;
1889
        }
1890
 
1891
      break;
1892
 
1893
    case OR1K_SPG_DC:
1894
      /* Data cache registers. These do not have an exact correspondence with
1895
         their instruction cache counterparts, so must be done separately. */
1896
 
1897
      /* 1:1 names */
1898
      switch (index)
1899
        {
1900
        case OR1K_SPG_DC_DCCR:  sprintf (name, "DCCR" ); return  name;
1901
        case OR1K_SPG_DC_DCBPR: sprintf (name, "DCBPR"); return  name;
1902
        case OR1K_SPG_DC_DCBFR: sprintf (name, "DCBFR"); return  name;
1903
        case OR1K_SPG_DC_DCBIR: sprintf (name, "DCBIR"); return  name;
1904
        case OR1K_SPG_DC_DCBWR: sprintf (name, "DCBWR"); return  name;
1905
        case OR1K_SPG_DC_DCBLR: sprintf (name, "DCBLR"); return  name;
1906
        }
1907
 
1908
      break;
1909
 
1910
    case OR1K_SPG_IC:
1911
      /* Instruction cache registers */
1912
 
1913
      /* 1:1 names */
1914
      switch (index)
1915
        {
1916
        case OR1K_SPG_IC_ICCR:  sprintf (name, "ICCR" ); return  name;
1917
        case OR1K_SPG_IC_ICBPR: sprintf (name, "ICBPR"); return  name;
1918
        case OR1K_SPG_IC_ICBIR: sprintf (name, "ICBIR"); return  name;
1919
        case OR1K_SPG_IC_ICBLR: sprintf (name, "ICBLR"); return  name;
1920
        }
1921
 
1922
      break;
1923
 
1924
    case OR1K_SPG_MAC:
1925
      /* MAC registers */
1926
 
1927
      /* 1:1 names */
1928
      switch (index)
1929
        {
1930
        case OR1K_SPG_MAC_MACLO: sprintf (name, "MACLO"); return  name;
1931
        case OR1K_SPG_MAC_MACHI: sprintf (name, "MACHI"); return  name;
1932
        }
1933
 
1934
      break;
1935
 
1936
    case OR1K_SPG_DEBUG:
1937
      /* Debug registers */
1938
 
1939
      /* Debug Value registers */
1940
      if((OR1K_SPG_DEBUG_DVR <= index) &&
1941
         (index                <= OR1K_SPG_DEBUG_DVR_END))
1942
        {
1943
          sprintf (name, "DVR%d", index - OR1K_SPG_DEBUG_DVR);
1944
          return  name;
1945
        }
1946
 
1947
      /* Debug Control registers */
1948
      if((OR1K_SPG_DEBUG_DCR <= index) &&
1949
         (index                <= OR1K_SPG_DEBUG_DCR_END))
1950
        {
1951
          sprintf (name, "DCR%d", index - OR1K_SPG_DEBUG_DCR);
1952
          return  name;
1953
        }
1954
 
1955
      /* 1:1 names */
1956
      switch (index)
1957
        {
1958
        case OR1K_SPG_DEBUG_DMR1:  sprintf (name, "DMR1" ); return  name;
1959
        case OR1K_SPG_DEBUG_DMR2:  sprintf (name, "DMR2" ); return  name;
1960
        case OR1K_SPG_DEBUG_DCWR0: sprintf (name, "DCWR0"); return  name;
1961
        case OR1K_SPG_DEBUG_DCWR1: sprintf (name, "DCWR1"); return  name;
1962
        case OR1K_SPG_DEBUG_DSR:   sprintf (name, "DSR"  ); return  name;
1963
        case OR1K_SPG_DEBUG_DRR:   sprintf (name, "DRR"  ); return  name;
1964
        }
1965
 
1966
      break;
1967
 
1968
    case OR1K_SPG_PC:
1969
      /* Performance Counter registers */
1970
 
1971
      /* Performance Counters Count registers */
1972
      if((OR1K_SPG_PC_PCCR <= index) &&
1973
         (index                <= OR1K_SPG_PC_PCCR_END))
1974
        {
1975
          sprintf (name, "PCCR%d", index - OR1K_SPG_PC_PCCR);
1976
          return  name;
1977
        }
1978
 
1979
      /* Performance Counters Mode registers */
1980
      if((OR1K_SPG_PC_PCMR <= index) &&
1981
         (index                <= OR1K_SPG_PC_PCMR_END))
1982
        {
1983
          sprintf (name, "PCMR%d", index - OR1K_SPG_PC_PCMR);
1984
          return  name;
1985
        }
1986
 
1987
      break;
1988
 
1989
    case OR1K_SPG_PM:
1990
      /* Power Management registers */
1991
 
1992
      /* 1:1 names */
1993
      switch (index)
1994
        {
1995
        case OR1K_SPG_PM_PMR:  sprintf (name, "PMR"); return  name;
1996
        }
1997
 
1998
      break;
1999
 
2000
    case OR1K_SPG_PIC:
2001
      /* Programmable Interrupt Controller registers */
2002
 
2003
      /* 1:1 names */
2004
      switch (index)
2005
        {
2006
        case OR1K_SPG_PIC_PICMR:  sprintf (name, "PICMR"); return  name;
2007
        case OR1K_SPG_PIC_PICSR:  sprintf (name, "PICSR"); return  name;
2008
        }
2009
 
2010
      break;
2011
 
2012
    case OR1K_SPG_TT:
2013
      /* Tick Timer registers */
2014
 
2015
      /* 1:1 names */
2016
      switch (index)
2017
        {
2018
        case OR1K_SPG_TT_TTMR:  sprintf (name, "TTMR"); return  name;
2019
        case OR1K_SPG_TT_TTCR:  sprintf (name, "TTCR"); return  name;
2020
        }
2021
 
2022
      break;
2023
 
2024
    case OR1K_SPG_FPU:
2025
 
2026
      break;
2027
    }
2028
 
2029
  /* Not a recognized register */
2030
  strcpy (name, "");
2031
  return  name;
2032
 
2033
}       /* or1k_spr_register_name() */
2034
 
2035
 
2036
/*----------------------------------------------------------------------------*/
2037
/*!Get SPR group number from a name
2038
 
2039
   @param[in] group_name  SPR register group
2040
 
2041
   @return  The index, or negative if no match. */
2042
/*----------------------------------------------------------------------------*/
2043
 
2044
static int
2045
or1k_groupnum_from_name (char *group_name)
2046
{
2047
  int  group;
2048
 
2049
  for (group = 0; group < OR1K_NUM_SPGS; group++)
2050
    {
2051
      if (0 == strcasecmp (group_name, or1k_spr_group_name (group)))
2052
        {
2053
          return group;
2054
        }
2055
    }
2056
 
2057
  return -1;
2058
 
2059
}       /* or1k_groupnum_from_name() */
2060
 
2061
 
2062
/*----------------------------------------------------------------------------*/
2063
/*!Get register index in special purpose register group from name
2064
 
2065
   The name may either be SPR<group_num>_<index> or a known unique name. In
2066
   either case the group number must match the supplied group number.
2067
 
2068
   @param[in] group  SPR register group
2069
   @param[in] name   Register name
2070
 
2071
   @return  The index, or negative if no match. */
2072
/*----------------------------------------------------------------------------*/
2073
 
2074
static int
2075
or1k_regnum_from_name (int   group,
2076
                       char *name)
2077
{
2078
  /* Last valid register in each group. */
2079
  static const int  or1k_spr_group_last[OR1K_NUM_SPGS] =
2080
    {
2081
      OR1K_SPG_SYS_LAST,
2082
      OR1K_SPG_DMMU_LAST,
2083
      OR1K_SPG_IMMU_LAST,
2084
      OR1K_SPG_DC_LAST,
2085
      OR1K_SPG_IC_LAST,
2086
      OR1K_SPG_MAC_LAST,
2087
      OR1K_SPG_DEBUG_LAST,
2088
      OR1K_SPG_PC_LAST,
2089
      OR1K_SPG_PM_LAST,
2090
      OR1K_SPG_PIC_LAST,
2091
      OR1K_SPG_TT_LAST,
2092
      OR1K_SPG_FPU_LAST
2093
    };
2094
 
2095
  int  i;
2096
  char  spr_name[32];
2097
 
2098
  if (0 == strcasecmp (name, "SPR"))
2099
    {
2100
      char *ptr_c;
2101
 
2102
      /* Skip SPR */
2103
      name += 3;
2104
 
2105
      /* Get group number */
2106
      i = (int) strtoul (name, &ptr_c, 10);
2107
      if (*ptr_c != '_' || i != group)
2108
        {
2109
          return -1;
2110
        }
2111
 
2112
      /* Get index */
2113
      ptr_c++;
2114
      i = (int) strtoul (name, &ptr_c, 10);
2115
      if (*ptr_c)
2116
        {
2117
          return -1;
2118
        }
2119
      else
2120
        {
2121
          return  i;
2122
        }
2123
    }
2124
 
2125
  /* Look for a "known" name in this group */
2126
  for (i = 0; i <= or1k_spr_group_last[group]; i++)
2127
    {
2128
      char *s = or1k_spr_register_name (group, i, spr_name);
2129
 
2130
      if (0 == strcasecmp (name, s))
2131
        {
2132
          return i;
2133
        }
2134
    }
2135
 
2136
  /* Failure */
2137
  return -1;
2138
 
2139
}       /* or1k_regnum_from_name() */
2140
 
2141
 
2142
/*----------------------------------------------------------------------------*/
2143
/*!Get the next token from a string
2144
 
2145
   I can't believe there isn't a library argument for this, but strtok is
2146
   deprecated.
2147
 
2148
   Take a string and find the start of the next token and its length. A token
2149
   is anything containing non-blank characters.
2150
 
2151
   @param[in]  str  The string to look at (may be NULL).
2152
   @param[out] tok  Pointer to the start of the token within str. May be NULL
2153
                    if this result is not wanted (e.g. just the length is
2154
                    wanted. If no token is found will be the NULL char at the
2155
                    end of the string, if the original str was NULL, this will
2156
                    be NULL.
2157
 
2158
                    @return  The length of the token found */
2159
/*----------------------------------------------------------------------------*/
2160
 
2161
static int
2162
or1k_tokenize (char  *str,
2163
               char **tok)
2164
{
2165
  char *ptr;
2166
  int   len;
2167
 
2168
  /* Deal with NULL argument */
2169
  if (NULL == str)
2170
    {
2171
      if (NULL != tok)
2172
        {
2173
          *tok = NULL;
2174
        }
2175
      return 0;
2176
    }
2177
 
2178
  /* Find the start */
2179
  for (ptr = str; ISBLANK (*ptr) ; ptr++)
2180
    {
2181
      continue;
2182
    }
2183
 
2184
  /* Return the start pointer if requested */
2185
  if (NULL != tok)
2186
    {
2187
      *tok = ptr;
2188
    }
2189
 
2190
  /* Find the end and put in EOS */
2191
  for (len = 0;  ('\0' != ptr[len]) && (!ISBLANK (ptr[len])); len++)
2192
    {
2193
      continue;
2194
    }
2195
 
2196
  return len;
2197
 
2198
}       /* or1k_tokenize() */
2199
 
2200
 
2201
/*----------------------------------------------------------------------------*/
2202
/*!Parses args for spr commands
2203
 
2204
   Determines the special purpose register (SPR) name and puts result into
2205
   group and index
2206
 
2207
   Syntax is:
2208
 
2209
   @verbatim
2210
   <spr_args>    -> <group_ref> | <reg_name>
2211
   <group_ref>   -> <group_id> <index>
2212
   <group_id>    -> <group_num> | <group_name>
2213
   @endverbatim
2214
 
2215
   Where the indices/names have to be valid.
2216
 
2217
   So to parse, we look for 1 or 2 args. If 1 it must be a unique register
2218
   name. If 2, the first must be a group number or name and the second an
2219
   index within that group.
2220
 
2221
   Also responsible for providing diagnostics if the arguments do not match.
2222
 
2223
   Rewritten for GDB 6.8 to use the new UI calls and remove assorted
2224
   bugs. Syntax also slightly restricted to be more comprehensible.
2225
 
2226
   @param[in]  arg_str  The argument string
2227
   @param[out] group    The group this SPR belongs in, or -1 to indicate
2228
                        failure
2229
   @param[out] index    Index of the register within the group, or -1 to
2230
                        indicate the whole group
2231
   @param[in]  is_set   1 (true) if we are called from the "spr" command (so
2232
                        there is an extra arg) rather than the "info spr"
2233
                        command. Needed to distinguish between the case where
2234
                        info is sought from a register specified as group and
2235
                        index and setting a uniquely identified register to a
2236
                        value.
2237
 
2238
                        @return  A pointer to any remaining args */
2239
/*---------------------------------------------------------------------------*/
2240
 
2241
static char *
2242
or1k_parse_spr_params (char *arg_str,
2243
                       int  *group,
2244
                       int  *index,
2245
                       int   is_set)
2246
{
2247
  struct {
2248
    char              *str;
2249
    int                len;
2250
    unsigned long int  val;
2251
    int                is_num;
2252
  } arg[3] = {
2253
    {
2254
      .str    = NULL,
2255
      .len    = 0,
2256
      .val    = 0,
2257
      .is_num = 0,
2258
    },
2259
   {
2260
      .str    = NULL,
2261
      .len    = 0,
2262
      .val    = 0,
2263
      .is_num = 0,
2264
    },
2265
   {
2266
      .str    = NULL,
2267
      .len    = 0,
2268
      .val    = 0,
2269
      .is_num = 0,
2270
    }
2271
  };
2272
 
2273
  int   num_args;
2274
  char *trailer  = arg_str;
2275
  char *tmp_str;
2276
  int   i;
2277
 
2278
  char  spr_name[32];
2279
 
2280
  /* Break out the arguments. Note that the strings are NOT null terminated
2281
     (we don't want to change arg_str), so we must rely on len. The stroul
2282
     call will still work, since there is always a non-digit char (possibly EOS)
2283
     after the last digit. */
2284
  if (NULL == arg_str)
2285
    {
2286
      num_args = 0;
2287
    }
2288
  else
2289
    {
2290
      for (num_args = 0; num_args < 3; num_args++)
2291
        {
2292
          arg[num_args].len = or1k_tokenize (trailer, &(arg[num_args].str));
2293
          trailer           = arg[num_args].str + arg[num_args].len;
2294
 
2295
          if (0 == arg[num_args].len)
2296
            {
2297
              break;
2298
            }
2299
        }
2300
    }
2301
 
2302
  /* Patch nulls into the arg strings and see about values. Couldn't do this
2303
     earlier, since we needed the next char clean to check later args. This
2304
     means advancing trailer, UNLESS it was already at EOS */
2305
 
2306
  if((NULL != arg_str) && ('\0' != *trailer))
2307
    {
2308
      trailer++;
2309
    }
2310
 
2311
  for (i = 0; i < num_args; i++)
2312
    {
2313
      (arg[i].str)[arg[i].len] = '\0';
2314
      errno                    = 0;
2315
      arg[i].val               = strtoul (arg[i].str, &tmp_str, 0);
2316
      arg[i].is_num            = (0 == errno) && ('\0' == *tmp_str);
2317
    }
2318
 
2319
  /* Deal with the case where we are setting a register, so the final argument
2320
     should be disregarded (it is the trailer). Do this anyway if we get a
2321
     third argument */
2322
  if ((is_set & (num_args > 0)) || (num_args > 2))
2323
    {
2324
      trailer = arg[num_args - 1].str;
2325
      num_args--;
2326
    }
2327
 
2328
  /* Deal with different numbers of args */
2329
 
2330
  switch (num_args)
2331
    {
2332
 
2333
    case 0:
2334
      ui_out_message (uiout, 0,
2335
                      "Usage: <command> <register>      |\n"
2336
                      "       <command> <group>         |\n"
2337
                      "       <command> <group> <index>\n"
2338
                      "Valid groups are:\n");
2339
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2340
        {
2341
          ui_out_field_string (uiout, NULL, or1k_spr_group_name  (i));
2342
          ui_out_spaces (uiout, 1);
2343
          ui_out_wrap_hint (uiout, NULL);
2344
        }
2345
      ui_out_field_string (uiout, NULL, "\n");
2346
 
2347
      *index = -1;
2348
      return  trailer;
2349
 
2350
    case 1:
2351
      /* See if it is a numeric group */
2352
      if (arg[0].is_num)
2353
        {
2354
          if (arg[0].val < OR1K_NUM_SPGS)
2355
            {
2356
              *group = arg[0].val;
2357
              *index = -1;
2358
              return trailer;
2359
            }
2360
          else
2361
            {
2362
              ui_out_message (uiout, 0,
2363
                              "Group index should be in the range 0 - %d\n",
2364
                              OR1K_NUM_SPGS);
2365
              *group = -1;
2366
              *index = -1;
2367
              return trailer;
2368
            }
2369
        }
2370
 
2371
      /* Is is it a group name? */
2372
      *group = or1k_groupnum_from_name (arg[0].str);
2373
      if (*group >= 0)
2374
        {
2375
          *index = -1;
2376
          return trailer;
2377
        }
2378
 
2379
      /* See if it is a valid register name in any group */
2380
      for (*group = 0; *group < OR1K_NUM_SPGS; (*group)++)
2381
        {
2382
          *index = or1k_regnum_from_name (*group, arg[0].str);
2383
 
2384
          if (*index >= 0)
2385
            {
2386
              return  trailer;
2387
            }
2388
        }
2389
 
2390
      /* Couldn't find it - print out a rude message */
2391
      ui_out_message (uiout, 0,
2392
                      "Group or register name not recognized.\n"
2393
                      "Valid groups are:\n");
2394
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2395
        {
2396
          ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2397
          ui_out_spaces (uiout, 1);
2398
          ui_out_wrap_hint (uiout, NULL);
2399
        }
2400
      ui_out_field_string (uiout, NULL, "\n");
2401
 
2402
      *group = -1;
2403
      *index = -1;
2404
      return  trailer;
2405
 
2406
    case 2:
2407
      /* See if first arg is a numeric group */
2408
      if (arg[0].is_num)
2409
        {
2410
          if (arg[0].val < OR1K_NUM_SPGS)
2411
            {
2412
              *group = arg[0].val;
2413
              *index = -1;
2414
            }
2415
          else
2416
            {
2417
              ui_out_message (uiout, 0,
2418
                              "Group index should be in the range 0 - %d\n",
2419
                              OR1K_NUM_SPGS - 1);
2420
              *group = -1;
2421
              *index = -1;
2422
              return trailer;
2423
            }
2424
        }
2425
      else
2426
        {
2427
          /* Is is it a group name? */
2428
          *group = or1k_groupnum_from_name (arg[0].str);
2429
          if (*group >= 0)
2430
            {
2431
              *index = -1;
2432
            }
2433
          else
2434
            {
2435
              ui_out_message (uiout, 0,
2436
                              "Group name not recognized.\n"
2437
                              "Valid groups are:\n");
2438
              for (i = 0; i < OR1K_NUM_SPGS; i++)
2439
                {
2440
                  ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2441
                  ui_out_spaces (uiout, 1);
2442
                  ui_out_wrap_hint (uiout, NULL);
2443
                }
2444
              ui_out_field_string (uiout, NULL, "\n");
2445
 
2446
              *group = -1;
2447
              *index = -1;
2448
              return  trailer;
2449
            }
2450
        }
2451
 
2452
      /* Is second arg an index or name? */
2453
      if (arg[1].is_num)
2454
        {
2455
          if (arg[1].val < OR1K_SPG_SIZE)
2456
            {
2457
              /* Check this really is a register */
2458
              if (0 != strlen (or1k_spr_register_name (*group, arg[1].val,
2459
                                                       spr_name)))
2460
                {
2461
                  *index = arg[1].val;
2462
                  return trailer;
2463
                }
2464
              else
2465
                {
2466
                  ui_out_message (uiout, 0,
2467
                                  "No valid register at that index in group\n");
2468
                  *group = -1;
2469
                  *index = -1;
2470
                  return  trailer;
2471
                }
2472
            }
2473
          else
2474
            {
2475
              ui_out_message (uiout, 0,
2476
                              "Register index should be in the range 0 - %d\n",
2477
                              OR1K_SPG_SIZE - 1);
2478
              *group = -1;
2479
              *index = -1;
2480
              return  trailer;
2481
            }
2482
        }
2483
 
2484
      /* Must be a name */
2485
      *index = or1k_regnum_from_name (*group, arg[1].str);
2486
 
2487
      if (*index >= 0)
2488
        {
2489
          return trailer;
2490
        }
2491
 
2492
      /* Couldn't find it - print out a rude message */
2493
      ui_out_message (uiout, 0, "Register name not recognized in group.\n");
2494
      *group = -1;
2495
      *index = -1;
2496
      return  trailer;
2497
 
2498
    default:
2499
      /* Anything else is an error */
2500
      ui_out_message (uiout, 0, "Unable to parse arguments\n");
2501
      *group = -1;
2502
      *index = -1;
2503
      return  trailer;
2504
    }
2505
}       /* or1k_parse_spr_params() */
2506
 
2507
 
2508
/*---------------------------------------------------------------------------*/
2509
/*!Read a special purpose register from the target
2510
 
2511
   This has to be done using the target remote command "readspr"
2512
 
2513
   @param[in] regnum  The register to read
2514
 
2515
   @return  The value read */
2516
/*---------------------------------------------------------------------------*/
2517
 
2518
static ULONGEST
2519
or1k_read_spr (unsigned int  regnum)
2520
{
2521
  struct ui_file    *uibuf = mem_fileopen ();
2522
  char               cmd[sizeof ("readspr ffff")];
2523
  unsigned long int  data;
2524
  char              *res;
2525
  long int           len;
2526
 
2527
  /* Create the command string and pass it to target remote command function */
2528
  sprintf (cmd, "readspr %4x", regnum);
2529
  target_rcmd (cmd, uibuf);
2530
 
2531
  /* Get the output for the UI file as a string */
2532
  res = ui_file_xstrdup (uibuf, &len);
2533
  sscanf (res, "%lx", &data);
2534
 
2535
  /* Tidy up */
2536
  xfree (res);
2537
  ui_file_delete (uibuf);
2538
 
2539
  return  (ULONGEST)data;
2540
 
2541
}       /* or1k_read_spr() */
2542
 
2543
 
2544
/*---------------------------------------------------------------------------*/
2545
/*!Write a special purpose register on the target
2546
 
2547
   This has to be done using the target remote command "writespr"
2548
 
2549
   Since the SPRs may map to GPR's or the other GDB register (PPC, NPC, SR),
2550
   any register cache is flushed.
2551
 
2552
   @param[in] regnum  The register to write
2553
   @param[in] data  The value to write */
2554
/*---------------------------------------------------------------------------*/
2555
 
2556
static void
2557
or1k_write_spr (unsigned int  regnum,
2558
                ULONGEST      data)
2559
{
2560
  struct ui_file    *uibuf = mem_fileopen ();
2561
  char               cmd[sizeof ("writespr ffff ffffffff")];
2562
  char              *res;
2563
  long int           len;
2564
 
2565
  /* Create the command string and pass it to target remote command function */
2566
  sprintf (cmd, "writespr %4x %8llx", regnum, (long long unsigned int)data);
2567
  target_rcmd (cmd, uibuf);
2568
 
2569
  /* Flush the register cache */
2570
  registers_changed ();
2571
 
2572
  /* We ignore the result - Rcmd can put out its own error messages. Just
2573
     tidy up */
2574
  ui_file_delete (uibuf);
2575
 
2576
}       /* or1k_write_spr() */
2577
 
2578
 
2579
/*----------------------------------------------------------------------------*/
2580
/*!Show the value of a special purpose register or group
2581
 
2582
   This is a custom extension to the GDB info command.
2583
 
2584
   @param[in] args
2585
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2586
   otherwise. */
2587
/*---------------------------------------------------------------------------*/
2588
 
2589
static void
2590
or1k_info_spr_command (char *args,
2591
                       int   from_tty)
2592
{
2593
  int  group;
2594
  int  index;
2595
 
2596
  char  spr_name[32];
2597
 
2598
  or1k_parse_spr_params (args, &group, &index, 0);
2599
 
2600
  if (group < 0)
2601
    {
2602
      return;                   /* Couldn't parse the args */
2603
    }
2604
 
2605
  if (index >= 0)
2606
    {
2607
      ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2608
 
2609
      ui_out_field_fmt (uiout, NULL, "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2610
                        or1k_spr_group_name (group),
2611
                        or1k_spr_register_name (group, index, spr_name), group,
2612
                        index, (long long unsigned int)value, (long long unsigned int)value);
2613
    }
2614
  else
2615
    {
2616
      /* Print all valid registers in the group */
2617
      for (index = 0; index < OR1K_SPG_SIZE; index++)
2618
        {
2619
          if (0 != strlen (or1k_spr_register_name (group, index, spr_name)))
2620
            {
2621
              ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2622
 
2623
              ui_out_field_fmt (uiout, NULL,
2624
                                "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2625
                                or1k_spr_group_name (group),
2626
                                or1k_spr_register_name (group, index, spr_name),
2627
                                group, index, (long long unsigned int)value, (long long unsigned int)value);
2628
            }
2629
        }
2630
    }
2631
}       /* or1k_info_spr_command() */
2632
 
2633
 
2634
/*----------------------------------------------------------------------------*/
2635
/*!Set a special purpose register
2636
 
2637
   This is a custom command added to GDB.
2638
 
2639
   @param[in] args
2640
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2641
   otherwise. */
2642
/*---------------------------------------------------------------------------*/
2643
 
2644
static void
2645
or1k_spr_command (char *args,
2646
                  int   from_tty)
2647
{
2648
  int   group;
2649
  int   index;
2650
  char *tmp_str;
2651
  char *nargs = or1k_parse_spr_params (args, &group, &index, 1);
2652
 
2653
  ULONGEST  old_val;
2654
  ULONGEST  new_val;
2655
 
2656
  char  spr_name[32];
2657
 
2658
  /* Do we have a valid register spec? */
2659
  if (index < 0)
2660
    {
2661
      return;           /* Parser will have printed the error message */
2662
    }
2663
 
2664
  /* Do we have a value to set? */
2665
 
2666
  errno = 0;
2667
  new_val = (ULONGEST)strtoul (nargs, &tmp_str, 0);
2668
 
2669
  if((0 != errno) || ('\0' != *tmp_str))
2670
    {
2671
      ui_out_message (uiout, 0, "Invalid value - register not changed\n");
2672
      return;
2673
    }
2674
 
2675
  old_val = or1k_read_spr (OR1K_SPR (group, index));
2676
 
2677
  or1k_write_spr (OR1K_SPR (group, index) , new_val);
2678
 
2679
  ui_out_field_fmt (uiout, NULL,
2680
                    "%s.%s (SPR%i_%i) set to %llu (0x%llx), "
2681
                    "was: %llu (0x%llx)\n",
2682
                    or1k_spr_group_name (group),
2683
                    or1k_spr_register_name (group, index, spr_name) , group,
2684
                    index, (long long unsigned int)new_val, (long long unsigned int)new_val, (long long unsigned int)old_val, (long long unsigned int)old_val);
2685
 
2686
}       /* or1k_spr_command() */
2687
 
2688
 
2689
/*----------------------------------------------------------------------------*/
2690
/*!Main entry point for target architecture initialization
2691
 
2692
   In this version initializes the architecture via
2693
   registers_gdbarch_init(). Add a command to set and show special purpose
2694
   registers. */
2695
/*---------------------------------------------------------------------------*/
2696
 
2697
void
2698
_initialize_or1k_tdep (void)
2699
{
2700
  /* Register this architecture. We should do this for or16 and or64 when
2701
     they have their BFD defined. */
2702
  gdbarch_register (bfd_arch_or32, or1k_gdbarch_init, or1k_dump_tdep);
2703
 
2704
  /* Initialize the automata for the assembler */
2705
  build_automata();
2706
 
2707
  /* Commands to show and set special purpose registers */
2708
  add_info ("spr", or1k_info_spr_command,
2709
            "Show the value of a special purpose register");
2710
  add_com ("spr", class_support, or1k_spr_command,
2711
           "Set a special purpose register");
2712
 
2713
}       /* _initialize_or1k_tdep() */

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