OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [or1k-tdep.c] - Blame information for rev 24

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Target-dependent code for the or1k architecture, for GDB, the GNU Debugger.
2
 
3
   Copyright 1988-2008, Free Software Foundation, Inc.
4
   Copyright (C) 2008 Embecosm Limited
5
 
6
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
7
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
9
 
10
   This file is part of GDB.
11
 
12
   This program is free software; you can redistribute it and/or modify it
13
   under the terms of the GNU General Public License as published by the Free
14
   Software Foundation; either version 3 of the License, or (at your option)
15
   any later version.
16
 
17
   This program is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
20
   more details.
21
 
22
   You should have received a copy of the GNU General Public License along
23
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
24
 
25
/*-----------------------------------------------------------------------------
26
   This version for the OpenRISC 1000 architecture is a rewrite by Jeremy
27
   Bennett of the old GDB 5.3 interface to make use of gdbarch for GDB 6.8.
28
 
29
   The code tries to follow the GDB coding style.
30
 
31
   Commenting is Doxygen compatible.
32
 
33
   Much has been stripped out in the interests of getting a basic working
34
   system. This is described as the OpenRISC 1000 target architecture, so
35
   should work with 16, 32 and 64 bit versions of that architecture and should
36
   work whether or not they have floating point and/or vector registers.
37
 
38
   There was never a capability to run simulator commands (no remote target
39
   implemented the required function), so that has been removed.
40
 
41
   The info trace command has been removed. The meaning of this is not clear -
42
   it relies on a value in register 255 of the debug group, which is
43
   undocumented.
44
 
45
   All the hardware trace has been removed for the time being. The new debug
46
   interface does not support hardware trace, so there is no plan to reinstate
47
   this functionality.
48
 
49
   Support for multiple contexts (which was rudimentary, and not working) has
50
   been removed. */
51
/*---------------------------------------------------------------------------*/
52
 
53
#include "demangle.h"
54
#include "defs.h"
55
#include "gdb_string.h"
56
#include "frame.h"
57
#include "inferior.h"
58
#include "symtab.h"
59
#include "value.h"
60
#include "gdbcmd.h"
61
#include "language.h"
62
#include "gdbcore.h"
63
#include "symfile.h"
64
#include "objfiles.h"
65
#include "gdbtypes.h"
66
#include "target.h"
67
#include "regcache.h"
68
 
69
#include "opcode/or32.h"
70
#include "or1k-tdep.h"
71
 
72
#include "safe-ctype.h"
73
#include "block.h"
74
#include "reggroups.h"
75
#include "arch-utils.h"
76
#include "frame.h"
77
#include "frame-unwind.h"
78
#include "frame-base.h"
79
#include "dwarf2-frame.h"
80
#include "trad-frame.h"
81
 
82
#include <inttypes.h>
83
 
84
 
85
/* Forward declarations of support functions for the architecture definition */
86
 
87
static unsigned long int
88
                     or1k_fetch_instruction (struct frame_info *next_frame,
89
                                             CORE_ADDR          addr);
90
static void          or1k_store_instruction( struct frame_info *next_frame,
91
                                           CORE_ADDR          addr,
92
                                           unsigned long int  insn);
93
 
94
/* Forward declaration of support functions for frame handling */
95
 
96
static int   or1k_frame_size (struct frame_info *next_frame,
97
                              CORE_ADDR          func_start_addr);
98
static int   or1k_frame_fp_loc (struct frame_info *next_frame,
99
                                CORE_ADDR          func_start_addr);
100
static int   or1k_frame_size_check (struct frame_info *next_frame,
101
                                    CORE_ADDR          func_start_addr);
102
static int   or1k_link_address (struct frame_info *next_frame,
103
                                CORE_ADDR          func_start_addr);
104
static int   or1k_get_saved_reg (struct frame_info *next_frame,
105
                                 CORE_ADDR          instr_start_addr,
106
                                 int               *reg_offset);
107
static struct trad_frame_cache
108
            *or1k_frame_unwind_cache (struct frame_info  *next_frame,
109
                                      void              **this_prologue_cache);
110
static void  or1k_frame_this_id (struct frame_info  *next_frame,
111
                                 void              **this_prologue_cache,
112
                                 struct frame_id    *this_id);
113
static void  or1k_frame_prev_register (struct frame_info  *next_frame,
114
                                       void              **this_prologue_cache,
115
                                       int                 regnum,
116
                                       int                *optimizedp,
117
                                       enum lval_type     *lvalp,
118
                                       CORE_ADDR          *addrp,
119
                                       int                *realregp,
120
                                       gdb_byte           *bufferp);
121
static CORE_ADDR
122
             or1k_frame_base_address (struct frame_info  *next_frame,
123
                                      void              **this_prologue_cache);
124
 
125
/* Forward declarations of functions which define the architecture */
126
 
127
static enum return_value_convention
128
                        or1k_return_value (struct gdbarch  *gdbarch,
129
                                           struct type     *type,
130
                                           struct regcache *regcache,
131
                                           gdb_byte        *readbuf,
132
                                           const gdb_byte  *writebuf);
133
static const gdb_byte  *or1k_breakpoint_from_pc (struct gdbarch *gdbarch,
134
                                                 CORE_ADDR      *bp_addr,
135
                                                 int            *bp_size);
136
static int     or1k_single_step_through_delay (struct gdbarch    *gdbarch,
137
                                               struct frame_info *this_frame);
138
static void             or1k_pseudo_register_read (struct gdbarch  *gdbarch,
139
                                                   struct regcache *regcache,
140
                                                   int              regnum,
141
                                                   gdb_byte        *buf);
142
static void             or1k_pseudo_register_write (struct gdbarch  *gdbarch,
143
                                                    struct regcache *regcache,
144
                                                    int              regnum,
145
                                                    const gdb_byte  *buf);
146
static const char      *or1k_register_name (struct gdbarch *gdbarch,
147
                                            int             regnum);
148
static struct type     *or1k_register_type (struct gdbarch *arch,
149
                                            int             regnum);
150
static void             or1k_registers_info (struct gdbarch    *gdbarch,
151
                                             struct ui_file    *file,
152
                                             struct frame_info *frame,
153
                                             int                regnum,
154
                                             int                all);
155
static int              or1k_register_reggroup_p (struct gdbarch  *gdbarch,
156
                                                  int              regnum,
157
                                                  struct reggroup *group);
158
static CORE_ADDR        or1k_skip_prologue (struct gdbarch *gdbarch,
159
                                            CORE_ADDR       pc);
160
static CORE_ADDR        or1k_frame_align (struct gdbarch *gdbarch,
161
                                          CORE_ADDR       sp);
162
static CORE_ADDR        or1k_unwind_pc (struct gdbarch    *gdbarch,
163
                                        struct frame_info *next_frame);
164
static CORE_ADDR        or1k_unwind_sp (struct gdbarch    *gdbarch,
165
                                        struct frame_info *next_frame);
166
static CORE_ADDR        or1k_push_dummy_call (struct gdbarch  *gdbarch,
167
                                              struct value    *function,
168
                                              struct regcache *regcache,
169
                                              CORE_ADDR        bp_addr,
170
                                              int              nargs,
171
                                              struct value   **args,
172
                                              CORE_ADDR        sp,
173
                                              int              struct_return,
174
                                              CORE_ADDR        struct_addr);
175
static struct frame_id  or1k_unwind_dummy_id (struct gdbarch    *gdbarch,
176
                                              struct frame_info *next_frame);
177
static const struct frame_unwind *
178
                        or1k_frame_sniffer (struct frame_info *next_frame);
179
 
180
/* Forward declaration of architecture set up functions */
181
 
182
static struct gdbarch *or1k_gdbarch_init (struct gdbarch_info  info,
183
                                          struct gdbarch_list *arches);
184
 
185
static void            or1k_dump_tdep (struct gdbarch *gdbarch,
186
                                       struct ui_file *file);
187
 
188
/* Forward declarations of functions which extend GDB */
189
 
190
static const char     *or1k_spr_group_name (int  group);
191
static char           *or1k_spr_register_name (int   group,
192
                                               int   index,
193
                                               char *name);
194
static int             or1k_groupnum_from_name (char *group_name);
195
static int             or1k_regnum_from_name (int   group,
196
                                              char *name);
197
static int             or1k_tokenize (char  *str,
198
                                      char **tok);
199
static char           *or1k_parse_spr_params (char *args,
200
                                              int  *group,
201
                                              int  *index,
202
                                              int   is_set);
203
static ULONGEST        or1k_read_spr (unsigned int  regnum);
204
static void            or1k_write_spr (unsigned int  regnum,
205
                                       ULONGEST      data);
206
static void            info_spr_command (char *args,
207
                                         int   from_tty);
208
static void            or1k_spr_command (char *args,
209
                                         int   from_tty);
210
static void            info_matchpoints_command (char *args,
211
                                                 int   from_tty);
212
 
213
 
214
 
215
/* Support functions for the architecture definition */
216
 
217
 
218
/*----------------------------------------------------------------------------*/
219
/*!Get an instruction from a frame
220
 
221
   This reads from memory, but if the instruction has been substituted by a
222
   software breakpoint, returns the instruction that has been replaced, NOT
223
   the break point instruction
224
 
225
   Depending on whether this has a frame available we use a frame based memory
226
   access or independent memory access. Underneath they are both the same, but
227
   annoyingly save_frame_unwind_memory inverts the status returned!
228
 
229
   @param[in] next_frame  Information about the next frame.
230
   @param[in] addr        Address from which to get the instruction
231
 
232
   @return  The instruction */
233
/*---------------------------------------------------------------------------*/
234
 
235
static unsigned long int
236
or1k_fetch_instruction (struct frame_info *next_frame,
237
                        CORE_ADDR          addr)
238
{
239
  char  buf[OR1K_INSTLEN];
240
  int   status;
241
 
242
  struct frame_info *this_frame = get_prev_frame (next_frame);
243
  if (NULL != this_frame)
244
    {
245
      status = !(safe_frame_unwind_memory (this_frame, addr, buf,
246
                                           OR1K_INSTLEN));
247
    }
248
  else
249
    {
250
      status = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
251
    }
252
 
253
  if (0 != status)
254
    {
255
      memory_error (status, addr);
256
    }
257
 
258
  return  (unsigned long int)(extract_unsigned_integer (buf, OR1K_INSTLEN));
259
 
260
}       /* or1k_fetch_instruction() */
261
 
262
 
263
/*----------------------------------------------------------------------------*/
264
/*!Store an instruction in a frame
265
 
266
   This writes to memory. Unlike its counterpart to fetch the instruction it
267
   does nothing about breakpoints
268
 
269
   Depending on whether this has a frame available we use a frame based memory
270
   access or independent memory access.
271
 
272
   @param[in] next_frame  Information about the next frame. Here for
273
                          compatibility with the fetch function, but ignored.
274
   @param[in] addr        Address to which to put the instruction
275
   @param[in] insn        The instruction to be written */
276
/*---------------------------------------------------------------------------*/
277
 
278
static void
279
or1k_store_instruction (struct frame_info *next_frame,
280
                        CORE_ADDR          addr,
281
                        unsigned long int  insn)
282
{
283
  write_memory_unsigned_integer( addr, sizeof( insn ), insn );
284
 
285
}       /* or1k_store_instruction() */
286
 
287
 
288
 
289
 
290
 
291
/* Support functions for frame handling */
292
 
293
 
294
/*----------------------------------------------------------------------------*/
295
/*!Return the size of the new stack frame
296
 
297
   Given the function start address, find the size of the stack frame. We are
298
   looking for the instruction
299
 
300
   @verbatim
301
   l.addi  r1,r1,-<frame_size>
302
   @endverbatim
303
 
304
   If this is not found at the start address, then this must be frameless
305
   invocation, for which we return size 0.
306
 
307
   @see or1k_frame_unwind_cache() for details of the OR1K prolog
308
 
309
   @param[in]  next_frame       The NEXT frame (i.e. inner from here, the one
310
                                THIS frame called), or NULL if this
311
                                information is not available.
312
   @param[in]  instr_addr       Function start address
313
 
314
   @return  The size of the new stack frame, or zero if this is frameless */
315
/*---------------------------------------------------------------------------*/
316
 
317
static int
318
or1k_frame_size (struct frame_info *next_frame,
319
                 CORE_ADDR          instr_addr)
320
{
321
  uint32_t  instr  = or1k_fetch_instruction (next_frame, instr_addr);
322
  int       opcode = OR1K_OPCODE1 (instr);
323
  int       rd;
324
  int       ra;
325
  int       imm;
326
 
327
  if (OR1K_OP_ADDI != opcode)
328
    {
329
      return  0;
330
    }
331
 
332
  rd  = OR1K_D_REG (instr);
333
  ra  = OR1K_A_REG (instr);
334
  imm = OR1K_IMM (instr);
335
 
336
  if((OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra))
337
    {
338
      return  -imm;             /* Falling stack */
339
    }
340
  else
341
    {
342
      return 0;
343
    }
344
}       /* or1k_frame_size() */
345
 
346
 
347
/*----------------------------------------------------------------------------*/
348
/*!Return the offset from the stack pointer of the saved FP location
349
 
350
   Given the function start address, find the size of the stack frame. We are
351
   looking for the instruction
352
 
353
   @verbatim
354
   l.sw    <save_loc>(r1),r2
355
   @endverbatim
356
 
357
   If this is not found at the start address + 4, then this is an error.
358
 
359
   @see or1k_frame_unwind_cache() for details of the OR1K prolog
360
 
361
   @param[in]  next_frame   The NEXT frame (i.e. inner from here, the one THIS
362
                            frame called), or NULL if this information is not
363
                            available.
364
   @param[in]  instr_addr   Address where we find this instruction (function
365
                            start + OR1K_INSTLEN)
366
 
367
   @return  The offset from the stack pointer where the old frame pointer is
368
   saved or -1 if we don't find this instruction. */
369
/*--------------------------------------------------------------------------*/
370
 
371
static int
372
or1k_frame_fp_loc (struct frame_info *next_frame,
373
                   CORE_ADDR          instr_addr)
374
{
375
  uint32_t  instr  = or1k_fetch_instruction (next_frame, instr_addr);
376
  int       opcode = OR1K_OPCODE1 (instr);
377
  int       ra;
378
  int       rb;
379
  int       imm;
380
 
381
  if (OR1K_OP_SW != opcode)
382
    {
383
      return  -1;
384
    }
385
 
386
  ra  = OR1K_A_REG (instr);
387
  rb  = OR1K_B_REG (instr);
388
  imm = OR1K_IMM2 (instr);
389
 
390
  if((OR1K_SP_REGNUM != ra) || (OR1K_FP_REGNUM != rb))
391
    {
392
      return  -1;
393
    }
394
 
395
  return imm;
396
 
397
}       /* or1k_frame_fp_loc() */
398
 
399
 
400
/*----------------------------------------------------------------------------*/
401
/*!Check the frame size is what expected
402
 
403
   Given the function start address, find the setting of the frame
404
   pointer. This should choose a frame size matching that used earlier to set
405
   the stack pointer. We look for the instruction:
406
 
407
   @verbatim
408
   l.addi  r2,r1,<frame_size>
409
   @endverbatim
410
 
411
   If this is not found at the start address + 8, with the expected frame size
412
   then this is an error.
413
 
414
   There is no return value - the function raises an error if the instruction
415
   is not found.
416
 
417
   @see or1k_frame_unwind_cache() for details of the OR1K prolog
418
 
419
   @param[in]  next_frame  The NEXT frame (i.e. inner from here, the one THIS
420
                           frame called), or NULL if this information is not
421
                           available.
422
   @param[in]  instr_addr  Address where we find this instruction (function
423
                           start + 2*OR1K_INSTLEN)
424
 
425
                           @return  The frame size found, or -1 if the instruction was not there. */
426
/*---------------------------------------------------------------------------*/
427
 
428
static int
429
or1k_frame_size_check (struct frame_info *next_frame,
430
                       CORE_ADDR          instr_addr)
431
{
432
  uint32_t  instr  = or1k_fetch_instruction (next_frame, instr_addr);
433
  int       opcode = OR1K_OPCODE1 (instr);
434
  int       rd;
435
  int       ra;
436
  int       imm;
437
 
438
  if (OR1K_OP_ADDI != opcode)
439
    {
440
      return  -1;
441
    }
442
 
443
  rd  = OR1K_D_REG (instr);
444
  ra  = OR1K_A_REG (instr);
445
  imm = OR1K_IMM (instr);
446
 
447
  if((OR1K_SP_REGNUM != ra) || (OR1K_FP_REGNUM != rd))
448
    {
449
      return -1;
450
    }
451
 
452
  return  imm;
453
 
454
}       /* or1k_frame_size_check() */
455
 
456
 
457
/*----------------------------------------------------------------------------*/
458
/*!See if the link (return) address is saved as expected
459
 
460
   Given the function start address, find the saving of the link address. The
461
   location (as an offset from the stack pointer) should be 4 less than the
462
   offset where the frame pointer was saved. We look for the instruction:
463
 
464
   @verbatim
465
   l.sw    <save_loc-4>(r1),r9
466
   @endverbatim
467
 
468
   This instruction may be missing - leaf functions do not necessarily save
469
   the return address on the stack.
470
 
471
   @see or1k_frame_unwind_cache() for details of the OR1K prolog
472
 
473
   @param[in]  next_frame  The NEXT frame (i.e. inner from here, the one THIS
474
                           frame called), or NULL if this information is not
475
                           available.
476
   @param[in]  instr_addr  Address where we find this instruction (function
477
                           start + 12)
478
 
479
                           @return  The link offset if the instruction was found, -1 otherwise */
480
/*---------------------------------------------------------------------------*/
481
 
482
static int
483
or1k_link_address (struct frame_info *next_frame,
484
                   CORE_ADDR          instr_addr)
485
{
486
  uint32_t  instr  = or1k_fetch_instruction (next_frame, instr_addr);
487
  int       opcode = OR1K_OPCODE1 (instr);
488
  int       ra;
489
  int       rb;
490
  int       imm;
491
 
492
  if (OR1K_OP_SW != opcode)
493
    {
494
      return  -1;
495
    }
496
 
497
  ra  = OR1K_A_REG (instr);
498
  rb  = OR1K_B_REG (instr);
499
  imm = OR1K_IMM2 (instr);
500
 
501
  if((OR1K_SP_REGNUM != ra) || (OR1K_LR_REGNUM != rb))
502
    {
503
      return  -1;
504
    }
505
 
506
  return  imm;
507
 
508
}       /* or1k_link_address() */
509
 
510
 
511
/*----------------------------------------------------------------------------*/
512
/*!Get a saved register's details
513
 
514
   Given an address, see if it contains an instruction to save a register with
515
   the specified offset from the stack pointer. The locations increment by 4
516
   from the location where the FP was saved for each callee saved register. We
517
   look for the instruction:
518
 
519
   @verbatim
520
   l.sw    x(r1),ry
521
   @endverbatim
522
 
523
   If this is found with the expected offset (x), then the register number
524
   (y) is returned. If not -1 is returned (not a register). The register
525
   must be one of the 10 callee saved registers (r10, r12, r14, r16, r18, r20,
526
   r22, r24, r26, r28, r30).
527
 
528
   @see or1k_frame_unwind_cache() for details of the OR1K prolog
529
 
530
   @param[in]  next_frame  The NEXT frame (i.e. inner from here, the one THIS
531
                           frame called), or NULL if this information is not
532
                           available.
533
   @param[in]  instr_addr  Location of this instruction
534
   @param[out] reg_offset  Offset where the register is saved
535
 
536
   @return  The register number if this instruction is found, otherwise -1 */
537
/*---------------------------------------------------------------------------*/
538
 
539
static int
540
or1k_get_saved_reg (struct frame_info *next_frame,
541
                    CORE_ADDR          instr_addr,
542
                    int               *reg_offset)
543
{
544
  uint32_t  instr  = or1k_fetch_instruction (next_frame, instr_addr);
545
  int       opcode = OR1K_OPCODE1 (instr);
546
  int       ra;
547
  int       rb;
548
  int       imm;
549
 
550
  if (OR1K_OP_SW != opcode)
551
    {
552
      return -1;
553
    }
554
 
555
  ra  = OR1K_A_REG (instr);
556
  rb  = OR1K_B_REG (instr);
557
  imm = OR1K_IMM2 (instr);
558
 
559
  if(OR1K_SP_REGNUM != ra)
560
    {
561
      return -1;
562
    }
563
 
564
  if ((1 == (rb % 2)) || rb < 10)
565
    {
566
      return  -1;                       /* Not a callee saved register */
567
    }
568
 
569
  *reg_offset = imm;
570
  return  rb;
571
 
572
}       /* or1k_get_saved_reg() */
573
 
574
 
575
/*----------------------------------------------------------------------------*/
576
/*!Initialize a prologue (unwind) cache
577
 
578
   Build up the information (saved registers etc) for the given frame if it
579
   does not already exist.
580
 
581
   The OR1K has a falling stack frame and a simple prolog. The Stack pointer
582
   is R1 and the frame pointer R2. The frame base is therefore the address
583
   held in R2 and the stack pointer (R1) is the frame base of the NEXT frame.
584
 
585
   @verbatim
586
   l.addi  r1,r1,-frame_size    # SP now points to end of new stack frame
587
   l.sw    save_loc(r1),r2      # old FP saved in new stack frame
588
   l.addi  r2,r1,frame_size     # FP now points to base of new stack frame
589
   l.sw    save_loc-4(r1),r9    # Link (return) address
590
   l.sw    x(r1),ry             # Save any callee saved regs
591
   @endverbatim
592
 
593
   The frame pointer is not necessarily saved right at the end of the stack
594
   frame - OR1K saves enough space for any args to called functions right at
595
   the end. The offsets x for the various registers saved always rise in
596
   increments of 4, starting at save_loc+4.
597
 
598
   This prolog is used, even for -O3 with GCC.
599
 
600
   All this analysis must allow for the possibility that the PC is in the
601
   middle of the prologue. Data should only be set up insofar as it has been
602
   computed.
603
 
604
   A suite of "helper" routines are used, allowing reuse for
605
   or1k_skip_prologue().
606
 
607
   Reportedly, this is only valid for frames less than 0x7fff in size.
608
 
609
   @param[in]     next_frame           The NEXT frame (i.e. inner from here,
610
                                       the one THIS frame called)
611
   @param[in,out] this_prologue_cache  The prologue cache. If not supplied, we
612
                                       build it.
613
 
614
                                       @return  The prolog cache (duplicates the return through the argument) */
615
/*---------------------------------------------------------------------------*/
616
 
617
static struct trad_frame_cache *
618
or1k_frame_unwind_cache (struct frame_info  *next_frame,
619
                         void              **this_prologue_cache)
620
{
621
  struct gdbarch          *gdbarch;
622
  struct trad_frame_cache *info;
623
 
624
  CORE_ADDR                this_pc;
625
  CORE_ADDR                this_sp;
626
  int                      frame_size;
627
  int                      fp_save_offset;
628
  int                      tmp;
629
 
630
  CORE_ADDR                start_iaddr;
631
  CORE_ADDR                saved_regs_iaddr;
632
  CORE_ADDR                prologue_end_iaddr;
633
  CORE_ADDR                end_iaddr;
634
 
635
  int                      regnum;
636
 
637
  /* Nothing to do if we already have this info */
638
  if (NULL != *this_prologue_cache)
639
    {
640
      return *this_prologue_cache;
641
    }
642
 
643
  gdbarch = get_frame_arch (next_frame);
644
 
645
  /* Get a new prologue cache and populate it with default values */
646
  info                 = trad_frame_cache_zalloc (next_frame);
647
  *this_prologue_cache = info;
648
 
649
  /* Find the start address of THIS function (which is a NORMAL frame, even if
650
     the NEXT frame is the sentinel frame) and the end of its prologue.  */
651
  start_iaddr        = frame_func_unwind (next_frame, NORMAL_FRAME);
652
  prologue_end_iaddr = skip_prologue_using_sal (start_iaddr);
653
 
654
  /* Return early if GDB couldn't find the function.  */
655
  if (start_iaddr == 0)
656
    {
657
      return  info;
658
    }
659
 
660
  /* Unwind key registers for THIS frame. */
661
  this_pc = or1k_unwind_pc (gdbarch, next_frame);
662
  this_sp = or1k_unwind_sp (gdbarch, next_frame);
663
 
664
  /* The frame base of THIS frame is its stack pointer. This is the same
665
     whether we are frameless or not. */
666
  trad_frame_set_this_base (info, this_sp);
667
 
668
  /* We should only examine code that is in the prologue and which has been
669
     executed. This is all code up to (but not including) end_iaddr. */
670
  end_iaddr = (this_pc > prologue_end_iaddr) ? prologue_end_iaddr : this_pc;
671
 
672
  /* The default is to find the PC of the PREVIOUS frame in the link register
673
     of this frame. This may be changed if we find the link register was saved
674
     on the stack. */
675
  trad_frame_set_reg_realreg (info, OR1K_NPC_REGNUM, OR1K_LR_REGNUM);
676
 
677
  /* All the following analysis only occurs if we are in the prologue and have
678
     executed the code. Get THIS frame size (which implies framelessness if
679
     zero) */
680
 
681
  if (end_iaddr > start_iaddr)
682
    {
683
      frame_size = or1k_frame_size (next_frame, start_iaddr);
684
    }
685
  else
686
    {
687
      frame_size = 0;
688
    }
689
 
690
  /* If we are not frameless, check the other standard components are present
691
     as expected */
692
  if ((0 != frame_size) && (end_iaddr > (start_iaddr + OR1K_INSTLEN)))
693
    {
694
      int  i;
695
 
696
      /* If we are not frameless, the frame pointer of the PREVIOUS frame can
697
         be found at offset fp_save_offset from the stack pointer in THIS
698
         frame. */
699
      fp_save_offset = or1k_frame_fp_loc (next_frame,
700
                                          start_iaddr + OR1K_INSTLEN);
701
      if (-1 == fp_save_offset)
702
        {
703
          error ("or1k_frame_unwind_cache: "
704
                 "invalid frame pointer save instruction at address %08llx\n",
705
                 (long long unsigned int)(ULONGEST)(start_iaddr + OR1K_INSTLEN));
706
        }
707
      else
708
        {
709
          trad_frame_set_reg_addr (info, OR1K_FP_REGNUM,
710
                                   this_sp + fp_save_offset);
711
        }
712
 
713
      /* The frame pointer should be set up to match the allocated stack
714
         size */
715
      if (end_iaddr > (start_iaddr + (2 * OR1K_INSTLEN)))
716
        {
717
          tmp = or1k_frame_size_check (next_frame,
718
                                       start_iaddr + (2 * OR1K_INSTLEN));
719
 
720
          if (-1 == tmp)
721
            {
722
              error ("or1k_frame_unwind_cache: "
723
                     "no frame pointer set up instruction at address %08llx\n",
724
                     (long long unsigned int)(ULONGEST)(start_iaddr + (2 * OR1K_INSTLEN)));
725
            }
726
          else if (frame_size != tmp)
727
            {
728
              error ("or1k_frame_unwind_cache: "
729
                     "frame pointer set to wrong size  at address %08llx: "
730
                     "expected %d, got %d\n",
731
                     (long long unsigned int)(ULONGEST)(start_iaddr + (2* OR1K_INSTLEN)), frame_size,
732
                     tmp);
733
            }
734
          else
735
            {
736
              /* If we have got this far, the stack pointer of the PREVIOUS
737
                 frame is the frame pointer of THIS frame. */
738
              trad_frame_set_reg_realreg (info, OR1K_SP_REGNUM, OR1K_FP_REGNUM);
739
            }
740
        }
741
      /* If the link register is saved in the THIS frame, it holds the value
742
         of the PC in the PREVIOUS frame. This overwrites the previous
743
         information about finding the PC in the link register. */
744
      if (end_iaddr > (start_iaddr + (2 * OR1K_INSTLEN)))
745
        {
746
          tmp = or1k_link_address (next_frame,
747
                                   start_iaddr + (3 * OR1K_INSTLEN));
748
          if ((-1 != tmp) && (tmp == (fp_save_offset - OR1K_INSTLEN)))
749
            {
750
              trad_frame_set_reg_addr (info, OR1K_LR_REGNUM, this_sp + tmp);
751
              trad_frame_set_reg_addr (info, OR1K_NPC_REGNUM, this_sp + tmp);
752
              saved_regs_iaddr = start_iaddr + (3 * OR1K_INSTLEN);
753
            }
754
          else
755
            {
756
              saved_regs_iaddr = start_iaddr + (2 * OR1K_INSTLEN);
757
            }
758
 
759
          /* Retrieve any saved register information */
760
          for (i = OR1K_INSTLEN;
761
               saved_regs_iaddr + i < end_iaddr;
762
               i += OR1K_INSTLEN)
763
            {
764
              regnum = or1k_get_saved_reg (next_frame, saved_regs_iaddr + i,
765
                                           &tmp);
766
 
767
              if ((regnum < 0) || (tmp != (fp_save_offset + i)))
768
                {
769
                  break;                        /* End of register saves */
770
                }
771
 
772
              /* The register in the PREVIOUS frame can be found at this
773
                 location in THIS frame */
774
              trad_frame_set_reg_addr (info, regnum,
775
                                       this_sp + fp_save_offset + i);
776
            }
777
        }
778
    }
779
 
780
  /* Build the frame ID */
781
  trad_frame_set_id (info, frame_id_build (this_sp, start_iaddr));
782
 
783
  return info;
784
 
785
}       /* or1k_frame_unwind_cache() */
786
 
787
 
788
/*----------------------------------------------------------------------------*/
789
/*!Find the frame ID of this frame
790
 
791
   Given a GDB frame (called by THIS frame), determine the address of oru
792
   frame and from this create a new GDB frame struct. The info required is
793
   obtained from the prologue cache for THIS frame.
794
 
795
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
796
                                    one THIS frame called)
797
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
798
   @param[out] this_id              Frame ID of our own frame.
799
 
800
   @return  Frame ID for THIS frame */
801
/*---------------------------------------------------------------------------*/
802
 
803
static void
804
or1k_frame_this_id (struct frame_info  *next_frame,
805
                    void              **this_prologue_cache,
806
                    struct frame_id    *this_id)
807
{
808
  struct trad_frame_cache *info =
809
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
810
 
811
  trad_frame_get_id (info, this_id);
812
 
813
}       /* or1k_frame_this_id() */
814
 
815
 
816
/*----------------------------------------------------------------------------*/
817
/*!Get a register from THIS frame
818
 
819
   Given a pointer to the NEXT frame, return the details of a register in the
820
   PREVIOUS frame.
821
 
822
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
823
                                    one THIS frame called)
824
   @param[in]  this_prologue_cache  Any cached prologue associated with THIS
825
                                    frame, which may therefore tell us about
826
                                    registers in the PREVIOUS frame.
827
   @param[in]  regnum               The register of interest in the PREVIOUS
828
                                    frame
829
   @param[out] optimizedp           True (1) if the register has been
830
                                    optimized out.
831
   @param[out] lvalp                What sort of l-value (if any) does the
832
                                    register represent
833
   @param[out] addrp                Address in THIS frame where the register's
834
                                    value may be found (-1 if not available)
835
   @param[out] realregp             Register in this frame where the
836
                                    register's value may be found (-1 if not
837
                                    available)
838
   @param[out] bufferp              If non-NULL, buffer where the value held
839
   in the register may be put */
840
/*--------------------------------------------------------------------------*/
841
 
842
static void
843
or1k_frame_prev_register (struct frame_info  *next_frame,
844
                          void              **this_prologue_cache,
845
                          int                 regnum,
846
                          int                *optimizedp,
847
                          enum lval_type     *lvalp,
848
                          CORE_ADDR          *addrp,
849
                          int                *realregp,
850
                          gdb_byte           *bufferp)
851
{
852
  struct trad_frame_cache *info =
853
    or1k_frame_unwind_cache (next_frame, this_prologue_cache);
854
 
855
  trad_frame_get_register (info, next_frame, regnum, optimizedp, lvalp, addrp,
856
                           realregp, bufferp);
857
 
858
}       /* or1k_frame_prev_register() */
859
 
860
 
861
/*----------------------------------------------------------------------------*/
862
/*!Return the base address of the frame
863
 
864
   The commenting in the GDB source code could mean our stack pointer or our
865
   frame pointer, since we have a falling stack, but index within the frame
866
   using negative offsets from the FP.
867
 
868
   This seems to be the function used to determine the value of $fp, but the
869
   value required seems to be the stack pointer, so we return that, even if
870
   the value of $fp will be wrong.
871
 
872
   @param[in] next_frame            The NEXT frame (i.e. inner from here, the
873
                                    one THIS frame called)
874
   @param[in]  this_prologue_cache  Any cached prologue for THIS function.
875
 
876
   @return  The frame base address */
877
/*---------------------------------------------------------------------------*/
878
 
879
static CORE_ADDR
880
or1k_frame_base_address (struct frame_info  *next_frame,
881
                         void              **this_prologue_cache)
882
{
883
  return  frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
884
 
885
}       /* or1k_frame_base_address() */
886
 
887
 
888
 
889
 
890
/* Functions defining the architecture */
891
 
892
 
893
/*----------------------------------------------------------------------------*/
894
/*!Determine the return convention used for a given type
895
 
896
   Optionally, fetch or set the return value via "readbuf" or "writebuf"
897
   respectively using "regcache" for the register values.
898
 
899
   The OpenRISC 1000 returns scalar values via R11 and (for 64 bit values on
900
   32 bit architectures) R12. Structs and unions are returned by reference,
901
   with the address in R11
902
 
903
   Throughout use read_memory(), not target_read_memory(), since the address
904
   may be invalid and we want an error reported (read_memory() is
905
   target_read_memory() with error reporting).
906
 
907
   @todo This implementation is labelled OR1K, but in fact is just for the 32
908
         bit version, OR32. This should be made explicit
909
 
910
   @param[in]  gdbarch   The GDB architecture being used
911
   @param[in]  type      The type of the entity to be returned
912
   @param[in]  regcache  The register cache
913
   @param[in]  readbuf   Buffer into which the return value should be written
914
   @param[out] writebuf  Buffer from which the return value should be written
915
 
916
   @return  The type of return value */
917
/*---------------------------------------------------------------------------*/
918
 
919
static enum return_value_convention
920
or1k_return_value (struct gdbarch  *gdbarch,
921
                   struct type     *type,
922
                   struct regcache *regcache,
923
                   gdb_byte        *readbuf,
924
                   const gdb_byte  *writebuf)
925
{
926
  enum type_code  rv_type = TYPE_CODE (type);
927
  unsigned int    rv_size = TYPE_LENGTH (type);
928
  ULONGEST        tmp;
929
 
930
  /* Deal with struct/union and large scalars first. Large (> 4 byte) scalars
931
     are returned via a pointer (despite what is says in the architecture
932
     document). Result pointed to by R11 */
933
 
934
  if((TYPE_CODE_STRUCT == rv_type) ||
935
     (TYPE_CODE_UNION  == rv_type) ||
936
     (rv_size          >  4))
937
    {
938
      if (readbuf)
939
        {
940
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
941
          read_memory (tmp, readbuf, rv_size);
942
        }
943
      if (writebuf)
944
        {
945
          regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
946
          write_memory (tmp, writebuf, rv_size);
947
        }
948
 
949
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
950
    }
951
 
952
  /* 1-4 byte scalars are returned in R11 */
953
 
954
  if (readbuf)
955
    {
956
      regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
957
      store_unsigned_integer (readbuf, rv_size, tmp);
958
    }
959
  if (writebuf)
960
    {
961
      gdb_byte buf[4];
962
      memset (buf, 0, sizeof (buf));     /* Pad with zeros if < 4 bytes */
963
 
964
      if (BFD_ENDIAN_BIG == gdbarch_byte_order (gdbarch))
965
        {
966
          memcpy (buf + sizeof (buf) - rv_size, writebuf, rv_size);
967
        }
968
      else
969
        {
970
          memcpy (buf,                          writebuf, rv_size);
971
        }
972
 
973
      regcache_cooked_write (regcache, OR1K_RV_REGNUM, buf);
974
    }
975
 
976
  return RETURN_VALUE_REGISTER_CONVENTION;
977
 
978
}       /* or1k_return_value() */
979
 
980
 
981
/*----------------------------------------------------------------------------*/
982
/*!Determine the instruction to use for a breakpoint.
983
 
984
   Given the address at which to insert a breakpoint (bp_addr), what will
985
   that breakpoint be?
986
 
987
   For or1k, we have a breakpoint instruction. Since all or1k instructions
988
   are 32 bits, this is all we need, regardless of address.
989
 
990
   @param[in]  gdbarch  The GDB architecture being used
991
   @param[in]  bp_addr  The breakpoint address in question
992
   @param[out] bp_size  The size of instruction selected
993
 
994
   @return  The chosen breakpoint instruction */
995
/*---------------------------------------------------------------------------*/
996
 
997
static const gdb_byte *
998
or1k_breakpoint_from_pc (struct gdbarch *gdbarch,
999
                         CORE_ADDR      *bp_addr,
1000
                         int            *bp_size)
1001
{
1002
  static const gdb_byte breakpoint[] = OR1K_BRK_INSTR_STRUCT;
1003
 
1004
  *bp_size = OR1K_INSTLEN;
1005
  return breakpoint;
1006
 
1007
}       /* or1k_breakpoint_from_pc() */
1008
 
1009
 
1010
/*----------------------------------------------------------------------------*/
1011
/*!Determine if we are executing a delay slot
1012
 
1013
   Looks at the instruction at the previous instruction to see if it was one
1014
   with a delay slot.
1015
 
1016
   @param[in] gdbarch     The GDB architecture being used
1017
   @param[in] this_frame  Information about THIS frame
1018
 
1019
   @return  1 (true) if this instruction is executing a delay slot, 0 (false)
1020
   otherwise. */
1021
/*--------------------------------------------------------------------------*/
1022
 
1023
static int
1024
or1k_single_step_through_delay( struct gdbarch    *gdbarch,
1025
                                struct frame_info *this_frame )
1026
{
1027
  struct regcache   *regcache = get_current_regcache ();
1028
  ULONGEST           val;
1029
  CORE_ADDR          ppc;
1030
  int                index;
1031
 
1032
  /* Get and decode the previous instruction. */
1033
  regcache_cooked_read_unsigned (regcache, OR1K_PPC_REGNUM, &val);
1034
  ppc        = (CORE_ADDR)val;
1035
  index      = insn_decode (or1k_fetch_instruction (this_frame, ppc));
1036
 
1037
  /* We are only executing a delay slot if the previous instruction was a
1038
     branch or jump. */
1039
  return or32_opcodes[index].flags & OR32_IF_DELAY;
1040
 
1041
}       /* or1k_single_step_through_delay() */
1042
 
1043
 
1044
/*----------------------------------------------------------------------------*/
1045
/*!Read a pseudo register
1046
 
1047
   Since we have no pseudo registers this is a null function for now.
1048
 
1049
   @todo The floating point and vector registers ought to be done as
1050
         pseudo-registers.
1051
 
1052
   @param[in]  gdbarch   The GDB architecture to consider
1053
   @param[in]  regcache  The cached register values as an array
1054
   @param[in]  regnum    The register to read
1055
   @param[out] buf       A buffer to put the result in */
1056
/*---------------------------------------------------------------------------*/
1057
 
1058
static void
1059
or1k_pseudo_register_read (struct gdbarch  *gdbarch,
1060
                           struct regcache *regcache,
1061
                           int              regnum,
1062
                           gdb_byte        *buf)
1063
{
1064
  return;
1065
 
1066
}       /* or1k_pseudo_register_read() */
1067
 
1068
 
1069
/*----------------------------------------------------------------------------*/
1070
/*!Write a pseudo register
1071
 
1072
   Since we have no pseudo registers this is a null function for now.
1073
 
1074
   @todo The floating point and vector registers ought to be done as
1075
         pseudo-registers.
1076
 
1077
   @param[in] gdbarch   The GDB architecture to consider
1078
   @param[in] regcache  The cached register values as an array
1079
   @param[in] regnum    The register to read
1080
   @param[in] buf       A buffer with the value to write */
1081
/*---------------------------------------------------------------------------*/
1082
 
1083
static void
1084
or1k_pseudo_register_write (struct gdbarch  *gdbarch,
1085
                            struct regcache *regcache,
1086
                            int              regnum,
1087
                            const gdb_byte  *buf)
1088
{
1089
  return;
1090
 
1091
}       /* or1k_pseudo_register_write() */
1092
 
1093
 
1094
/*----------------------------------------------------------------------------*/
1095
/*!Return the register name for the OpenRISC 1000 architecture
1096
 
1097
   This version converted to ANSI C, made static and incorporates the static
1098
   table of register names (this is the only place it is referenced).
1099
 
1100
   @todo The floating point and vector registers ought to be done as
1101
         pseudo-registers.
1102
 
1103
   @param[in] gdbarch  The GDB architecture being used
1104
   @param[in] regnum    The register number
1105
 
1106
   @return  The textual name of the register */
1107
/*---------------------------------------------------------------------------*/
1108
 
1109
static const char *
1110
or1k_register_name (struct gdbarch *gdbarch,
1111
                    int             regnum)
1112
{
1113
  static char *or1k_gdb_reg_names[OR1K_TOTAL_NUM_REGS] =
1114
    {
1115
      /* general purpose registers */
1116
      "gpr0",  "gpr1",  "gpr2",  "gpr3",  "gpr4",  "gpr5",  "gpr6",  "gpr7",
1117
      "gpr8",  "gpr9",  "gpr10", "gpr11", "gpr12", "gpr13", "gpr14", "gpr15",
1118
      "gpr16", "gpr17", "gpr18", "gpr19", "gpr20", "gpr21", "gpr22", "gpr23",
1119
      "gpr24", "gpr25", "gpr26", "gpr27", "gpr28", "gpr29", "gpr30", "gpr31",
1120
 
1121
      /* previous program counter, next program counter and status register */
1122
      "ppc",   "npc",   "sr"
1123
 
1124
      /* Floating point and vector registers may appear as pseudo registers in
1125
         the future. */
1126
    };
1127
 
1128
  return or1k_gdb_reg_names[regnum];
1129
 
1130
}       /* or1k_register_name() */
1131
 
1132
 
1133
/*----------------------------------------------------------------------------*/
1134
/*!Identify the type of a register
1135
 
1136
   @todo I don't fully understand exactly what this does, but I think this
1137
         makes sense!
1138
 
1139
   @param[in] arch     The GDB architecture to consider
1140
   @param[in] regnum   The register to identify
1141
 
1142
   @return  The type of the register */
1143
/*---------------------------------------------------------------------------*/
1144
 
1145
static struct type *
1146
or1k_register_type (struct gdbarch *arch,
1147
                    int             regnum)
1148
{
1149
  static struct type *void_func_ptr = NULL;
1150
  static struct type *void_ptr      = NULL;
1151
 
1152
  /* Set up the static pointers once, the first time*/
1153
  if (NULL == void_func_ptr)
1154
    {
1155
      void_ptr = lookup_pointer_type (builtin_type_void);
1156
      void_func_ptr =
1157
        lookup_pointer_type (lookup_function_type (builtin_type_void));
1158
    }
1159
 
1160
  if((regnum >= 0) && (regnum < OR1K_TOTAL_NUM_REGS))
1161
    {
1162
      switch (regnum)
1163
        {
1164
        case OR1K_PPC_REGNUM:
1165
        case OR1K_NPC_REGNUM:
1166
          return void_func_ptr;         /* Pointer to code */
1167
 
1168
        case OR1K_SP_REGNUM:
1169
        case OR1K_FP_REGNUM:
1170
          return void_ptr;                      /* Pointer to data */
1171
 
1172
        default:
1173
          return builtin_type_int32;    /* Data */
1174
        }
1175
    }
1176
 
1177
  internal_error (__FILE__, __LINE__,
1178
                  _("or1k_register_type: illegal register number %d"), regnum);
1179
 
1180
}       /* or1k_register_type() */
1181
 
1182
 
1183
/*----------------------------------------------------------------------------*/
1184
/*!Handle the "info register" command
1185
 
1186
   Print the identified register, unless it is -1, in which case print all
1187
   the registers. If all is 1 means all registers, otherwise only the core
1188
   GPRs.
1189
 
1190
   @todo At present all registers are printed with the default method. Should
1191
         there be something special for FP registers?
1192
 
1193
   @param[in] gdbarch  The GDB architecture being used
1194
   @param[in] file     File handle for use with any custom I/O
1195
   @param[in] frame    Frame info for use with custom output
1196
   @param[in] regnum   Register of interest, or -1 if all registers
1197
   @param[in] all      1 if all means all, 0 if all means just GPRs
1198
 
1199
   @return  The aligned stack frame address */
1200
/*---------------------------------------------------------------------------*/
1201
 
1202
static void
1203
or1k_registers_info (struct gdbarch    *gdbarch,
1204
                     struct ui_file    *file,
1205
                     struct frame_info *frame,
1206
                     int                regnum,
1207
                     int                all)
1208
{
1209
  if (-1 == regnum)
1210
    {
1211
      /* Do all (valid) registers */
1212
      unsigned int  lim = all ? OR1K_NUM_REGS : OR1K_MAX_GPR_REGS;
1213
 
1214
      for (regnum = 0; regnum < lim; regnum++) {
1215
        if ('\0' != *(or1k_register_name (gdbarch, regnum)))
1216
          {
1217
            or1k_registers_info (gdbarch, file, frame, regnum, all);
1218
          }
1219
      }
1220
    }
1221
  else
1222
    {
1223
      /* Do one specified register - if it is part of this architecture */
1224
      if ('\0' == *(or1k_register_name (gdbarch, regnum)))
1225
        {
1226
          error ("Not a valid register for the current processor type");
1227
        }
1228
      else
1229
        {
1230
          default_print_registers_info (gdbarch, file, frame, regnum, all);
1231
        }
1232
    }
1233
}       /* or1k_registers_info() */
1234
 
1235
 
1236
/*----------------------------------------------------------------------------*/
1237
/*!Identify if a register belongs to a specified group
1238
 
1239
   Return true if the specified register is a member of the specified
1240
   register group.
1241
 
1242
   These are the groups of registers that can be displayed via "info reg".
1243
 
1244
   @todo The Vector and Floating Point registers ought to be displayed as
1245
         pseudo-registers.
1246
 
1247
   @param[in] gdbarch  The GDB architecture to consider
1248
   @param[in] regnum   The register to consider
1249
   @param[in] group    The group to consider
1250
 
1251
   @return  True (1) if regnum is a member of group */
1252
/*---------------------------------------------------------------------------*/
1253
 
1254
static int
1255
or1k_register_reggroup_p (struct gdbarch  *gdbarch,
1256
                          int              regnum,
1257
                          struct reggroup *group)
1258
{
1259
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1260
 
1261
  /* All register group */
1262
  if (group == all_reggroup)
1263
    {
1264
      return ((regnum >= 0) &&
1265
              (regnum < OR1K_TOTAL_NUM_REGS) &&
1266
              (or1k_register_name (gdbarch, regnum)[0] != '\0'));
1267
    }
1268
 
1269
  /* For now everything except the PC */
1270
  if (group == general_reggroup)
1271
    {
1272
      return ((regnum >= OR1K_ZERO_REGNUM) &&
1273
              (regnum <  tdep->num_gpr_regs) &&
1274
              (regnum != OR1K_PPC_REGNUM) &&
1275
              (regnum != OR1K_NPC_REGNUM));
1276
    }
1277
 
1278
  if (group == float_reggroup)
1279
    {
1280
      return 0;                  /* No float regs.  */
1281
    }
1282
 
1283
  if (group == vector_reggroup)
1284
    {
1285
      return 0;                  /* No vector regs.  */
1286
    }
1287
 
1288
  /* For any that are not handled above.  */
1289
  return default_register_reggroup_p (gdbarch, regnum, group);
1290
 
1291
}       /* or1k_register_reggroup_p() */
1292
 
1293
 
1294
/*----------------------------------------------------------------------------*/
1295
/*!Skip a function prolog
1296
 
1297
   If the input address, PC, is in a function prologue, return the address of
1298
   the end of the prologue, otherwise return the input  address.
1299
 
1300
   @see For details of the stack frame, see the function
1301
   or1k_frame_unwind_cache().
1302
 
1303
   This function reuses the helper functions from or1k_frame_unwind_cache() to
1304
   locate the various parts of the prolog.
1305
 
1306
   This is very tricky. Essentially we look for the parts of a prolog.  If we
1307
   get a mismatch, we never know if it is because we are not in prolog, or
1308
   because the prolog is broken.
1309
 
1310
   @param[in] gdbarch  The GDB architecture being used
1311
   @param[in] pc       Current program counter
1312
 
1313
   @return  The address of the end of the prolog if the PC is in a function
1314
   prologue, otherwise the input  address. */
1315
/*--------------------------------------------------------------------------*/
1316
 
1317
static CORE_ADDR
1318
or1k_skip_prologue (struct gdbarch *gdbarch,
1319
                    CORE_ADDR       pc)
1320
{
1321
  enum {
1322
    OR1K_FRAME_SIZE,
1323
    OR1K_FP_SAVED,
1324
    OR1K_NEW_FP,
1325
    OR1K_LR_SAVE,
1326
    OR1K_REG_SAVE,
1327
    OR1K_NO_PROLOGUE
1328
  } start_pos = OR1K_NO_PROLOGUE;
1329
 
1330
  CORE_ADDR  addr     = pc;
1331
  int        frame_size;
1332
  int        fp_save_offset;
1333
  int        tmp;
1334
  int        i;
1335
 
1336
  CORE_ADDR  start_addr;
1337
  CORE_ADDR  end_addr;
1338
 
1339
  /* Try using SAL first */
1340
  if (find_pc_partial_function (pc, NULL, &start_addr, &end_addr))
1341
    {
1342
      CORE_ADDR  prologue_end = skip_prologue_using_sal( pc );
1343
 
1344
      if (prologue_end > pc)
1345
        {
1346
          return  prologue_end;
1347
        }
1348
      else
1349
        {
1350
          return  pc;
1351
        }
1352
    }
1353
 
1354
  frame_size = or1k_frame_size (NULL, addr);
1355
 
1356
  if (0 != frame_size)
1357
    {
1358
      /* We seem to have the start of a prolog */
1359
      start_pos = OR1K_FRAME_SIZE;
1360
      addr += OR1K_INSTLEN;
1361
    }
1362
 
1363
  /* Look for the previous frame pointer being saved. If we are in a frame,
1364
     then this must be here. */
1365
  fp_save_offset = or1k_frame_fp_loc (NULL, addr);
1366
 
1367
  switch (start_pos)
1368
   {
1369
    case OR1K_FRAME_SIZE:
1370
      if (-1 == fp_save_offset)
1371
        {
1372
          error ("or1k_skip_prolog: "
1373
                 "old frame pointer not saved at address %08llx: giving up\n",
1374
                 (long long unsigned int)(ULONGEST)addr);
1375
        }
1376
      else
1377
        {
1378
          addr += OR1K_INSTLEN;
1379
        }
1380
 
1381
      break;
1382
 
1383
    default:
1384
      start_pos  = OR1K_FP_SAVED;
1385
      addr      += OR1K_INSTLEN;
1386
      break;
1387
    }
1388
 
1389
  /* Look for new FP being set up. This must match the frame_size if that is
1390
     known. */
1391
  tmp = or1k_frame_size_check (NULL, addr);
1392
  switch (start_pos)
1393
   {
1394
    case OR1K_FRAME_SIZE:
1395
      if (frame_size != tmp)
1396
        {
1397
          error ("or1k_skip_prolog: "
1398
                 "frame pointer set to wrong size  at address %08llx: "
1399
                 "expected %d, got %d\n", (long long unsigned int)(ULONGEST)addr, frame_size, tmp);
1400
        }
1401
      else
1402
        {
1403
          addr += OR1K_INSTLEN;
1404
        }
1405
 
1406
      break;
1407
 
1408
    case OR1K_FP_SAVED:
1409
      if (-1 == tmp)
1410
        {
1411
          error ("or1k_skip_prolog: "
1412
                 "no frame pointer set up instruction at address %08llx\n",
1413
                 (long long unsigned int)(ULONGEST)addr);
1414
        }
1415
      else
1416
        {
1417
          addr += OR1K_INSTLEN;
1418
        }
1419
 
1420
      break;
1421
 
1422
    default:
1423
      if (-1 != tmp)
1424
        {
1425
          start_pos  = OR1K_NEW_FP;
1426
          addr      += OR1K_INSTLEN;
1427
        }
1428
    }
1429
 
1430
  /* Look for the link register being saved. If we are in a prolog sequence,
1431
     and is there then it should save to a particular location. */
1432
  tmp = or1k_link_address (NULL, addr);
1433
  switch (start_pos)
1434
   {
1435
    case OR1K_FRAME_SIZE:
1436
    case OR1K_FP_SAVED:
1437
      if ((-1 != tmp) && (tmp != fp_save_offset - OR1K_INSTLEN))
1438
        {
1439
          error ("or1k_skip_prolog: "
1440
                 "link address saved to wrong offset at address %08llx: "
1441
                 "expected %d, got %d\n", (long long unsigned int)(ULONGEST)addr,
1442
                 fp_save_offset - OR1K_INSTLEN, tmp);
1443
        }
1444
      else
1445
        {
1446
          addr += OR1K_INSTLEN;
1447
        }
1448
 
1449
      break;
1450
 
1451
    default:
1452
      if (-1 != tmp)
1453
        {
1454
          start_pos  = OR1K_LR_SAVE;
1455
          addr      += OR1K_INSTLEN;
1456
        }
1457
    }
1458
 
1459
  /* Skip saved registers */
1460
  for (i = 0;; i += OR1K_INSTLEN)
1461
   {
1462
      int  regnum = or1k_get_saved_reg (NULL, addr, &tmp);
1463
 
1464
      switch (start_pos)
1465
        {
1466
        case OR1K_FRAME_SIZE:
1467
        case OR1K_FP_SAVED:
1468
          if (-1  != regnum)
1469
           {
1470
              if (tmp != fp_save_offset + ((i - 1) * OR1K_INSTLEN))
1471
                {
1472
                  error ("or1k_skip_prolog: callee register saved to wrong "
1473
                         "offset at address %08llx: "
1474
                         "expected %d, got %d\n", (long long unsigned int)(ULONGEST)addr,
1475
                         fp_save_offset + ((i - 1) * OR1K_INSTLEN), tmp);
1476
                }
1477
              else
1478
                {
1479
                  addr += 4;
1480
                }
1481
            }
1482
          else
1483
           {
1484
              return  addr;
1485
            }
1486
 
1487
          break;
1488
 
1489
        case OR1K_NEW_FP:
1490
        case OR1K_LR_SAVE:
1491
        case OR1K_REG_SAVE:
1492
          if (-1 != regnum)
1493
           {
1494
              addr += 4;
1495
            }
1496
          else
1497
           {
1498
              return  addr;
1499
            }
1500
 
1501
        default:
1502
          if (-1 != regnum)
1503
           {
1504
              start_pos  = OR1K_REG_SAVE;
1505
              addr += 4;
1506
            }
1507
          else
1508
           {
1509
              return  pc;               /* Not in a prolog */
1510
            }
1511
 
1512
          break;
1513
        }
1514
    }
1515
}       /* or1k_skip_prologue() */
1516
 
1517
 
1518
/*----------------------------------------------------------------------------*/
1519
/*!Align the stack frame
1520
 
1521
   OpenRISC 1000 uses a falling stack frame, so this aligns down to the
1522
   nearest 8 bytes. Useful when we'be building a dummy frame.
1523
 
1524
   @param[in] gdbarch  The GDB architecture being used
1525
   @param[in] sp       Current stack pointer
1526
 
1527
   @return  The aligned stack frame address */
1528
/*---------------------------------------------------------------------------*/
1529
 
1530
static CORE_ADDR
1531
or1k_frame_align (struct gdbarch *gdbarch,
1532
                  CORE_ADDR       sp)
1533
{
1534
  return align_down (sp, OR1K_STACK_ALIGN);
1535
 
1536
}       /* or1k_frame_align() */
1537
 
1538
 
1539
/*----------------------------------------------------------------------------*/
1540
/*!Unwind the program counter from a stack frame
1541
 
1542
   This just uses the built in frame unwinder
1543
 
1544
   @param[in] gdbarch     The GDB architecture being used
1545
   @param[in] next_frame  Frame info for the NEXT frame
1546
 
1547
   @return  The program counter for THIS frame */
1548
/*---------------------------------------------------------------------------*/
1549
 
1550
static CORE_ADDR
1551
or1k_unwind_pc (struct gdbarch    *gdbarch,
1552
                struct frame_info *next_frame)
1553
{
1554
  return frame_unwind_register_unsigned (next_frame, OR1K_NPC_REGNUM);
1555
 
1556
}       /* or1k_unwind_pc() */
1557
 
1558
 
1559
/*----------------------------------------------------------------------------*/
1560
/*!Unwind the stack pointer from a stack frame
1561
 
1562
   This just uses the built in frame unwinder
1563
 
1564
   @param[in] gdbarch     The GDB architecture being used
1565
   @param[in] next_frame  Frame info for the NEXT frame
1566
 
1567
   @return  The stack pointer for THIS frame */
1568
/*---------------------------------------------------------------------------*/
1569
 
1570
static CORE_ADDR
1571
or1k_unwind_sp (struct gdbarch    *gdbarch,
1572
                struct frame_info *next_frame)
1573
{
1574
  return frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
1575
 
1576
}       /* or1k_unwind_sp() */
1577
 
1578
 
1579
/*----------------------------------------------------------------------------*/
1580
/*!Create a dummy stack frame
1581
 
1582
   The arguments are placed in registers and/or pushed on the stack as per the
1583
   OR1K ABI.
1584
 
1585
   @param[in] gdbarch        The architecture to use
1586
   @param[in] function       Pointer to the function that will be called
1587
   @param[in] regcache       The register cache to use
1588
   @param[in] bp_addr        Breakpoint address
1589
   @param[in] nargs          Number of ags to push
1590
   @param[in] args           The arguments
1591
   @param[in] sp             The stack pointer
1592
   @param[in] struct_return  True (1) if this returns a structure
1593
   @param[in] struct_addr    Address for returning structures
1594
 
1595
   @return  The updated stack pointer */
1596
/*---------------------------------------------------------------------------*/
1597
 
1598
static CORE_ADDR
1599
or1k_push_dummy_call (struct gdbarch  *gdbarch,
1600
                      struct value    *function,
1601
                      struct regcache *regcache,
1602
                      CORE_ADDR        bp_addr,
1603
                      int              nargs,
1604
                      struct value   **args,
1605
                      CORE_ADDR        sp,
1606
                      int              struct_return,
1607
                      CORE_ADDR        struct_addr)
1608
{
1609
  int           argreg;
1610
  int           argnum;
1611
  int           first_stack_arg;
1612
  int           stack_offset = 0;
1613
 
1614
  unsigned int  bpa = (gdbarch_tdep (gdbarch))->bytes_per_address;
1615
  unsigned int  bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
1616
 
1617
  /* Return address */
1618
  regcache_cooked_write_unsigned (regcache, OR1K_LR_REGNUM, bp_addr);
1619
 
1620
  /* Register for the next argument */
1621
  argreg = OR1K_FIRST_ARG_REGNUM;
1622
 
1623
  /* Location for a returned structure. This is passed as a silent first
1624
     argument. */
1625
 
1626
  if (struct_return)
1627
    {
1628
      regcache_cooked_write_unsigned (regcache, OR1K_FIRST_ARG_REGNUM,
1629
                                      struct_addr);
1630
      argreg++;
1631
    }
1632
 
1633
  /* Put as many args as possible in registers */
1634
  for (argnum = 0; argnum < nargs; argnum++)
1635
    {
1636
      char           *val;
1637
      char            valbuf[sizeof (ULONGEST) ];
1638
 
1639
      struct value   *arg      = args[argnum];
1640
      struct type    *arg_type = check_typedef (value_type (arg));
1641
      int             len      = arg_type->length;
1642
      enum type_code  typecode = arg_type->main_type->code;
1643
 
1644
      /* The EABI passes structures that do not fit in a register by
1645
         reference. In all other cases, pass the structure by value.  */
1646
      if((len > bpw) &&
1647
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1648
        {
1649
 
1650
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1651
          len      = bpa;
1652
          val      = valbuf;
1653
        }
1654
      else
1655
        {
1656
          val = (char *)value_contents (arg);
1657
        }
1658
 
1659
      if((len > bpw) && (argreg <= (OR1K_LAST_ARG_REGNUM - 1)))
1660
        {
1661
 
1662
          /* Big scalars use two registers, must be pair aligned. This code
1663
             breaks if we can have quad-word scalars (e.g. long double). */
1664
          ULONGEST regval = extract_unsigned_integer (val, len);
1665
 
1666
          gdb_assert (len <= (bpw * 2));
1667
 
1668
          argreg = 1 == (argreg & 1) ? argreg + 1 : argreg;
1669
          regcache_cooked_write_unsigned (regcache, argreg, regval >> bpw);
1670
          regcache_cooked_write_unsigned (regcache, argreg + 1,
1671
                                          regval && ((ULONGEST)(1 << bpw) - 1));
1672
          argreg += 2;
1673
        }
1674
      else if (argreg <= OR1K_LAST_ARG_REGNUM)
1675
        {
1676
          regcache_cooked_write_unsigned (regcache, argreg,
1677
                                          extract_unsigned_integer (val, len));
1678
          argreg++;
1679
        }
1680
      else
1681
        {
1682
          /* Run out of regs */
1683
          break;
1684
        }
1685
    }
1686
 
1687
  first_stack_arg = argnum;
1688
 
1689
  /* If we get here with argnum < nargs, then arguments remain to be placed on
1690
     the stack. This is tricky, since they must be pushed in reverse order and
1691
     the stack in the end must be aligned. The only solution is to do it in
1692
     two stages, the first to compute the stack size, the second to save the
1693
     args. */
1694
 
1695
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1696
    {
1697
      struct value   *arg      = args[argnum];
1698
      struct type    *arg_type = check_typedef (value_type (arg));
1699
      int             len      = arg_type->length;
1700
      enum type_code  typecode = arg_type->main_type->code;
1701
 
1702
      if((len > bpw) &&
1703
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1704
        {
1705
          /* Large structures are passed as addresses */
1706
          sp -= bpa;
1707
        }
1708
      else
1709
        {
1710
        /* Big scalars use more than one word. Code here allows for future
1711
         quad-word entities (e.g. long double) */
1712
          sp -= ((len + bpw - 1) / bpw) * bpw;
1713
        }
1714
    }
1715
 
1716
  sp           = gdbarch_frame_align (gdbarch, sp);
1717
  stack_offset = 0;
1718
 
1719
  /* Push the remaining args on the stack */
1720
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1721
    {
1722
      char           *val;
1723
      char            valbuf[sizeof (ULONGEST) ];
1724
 
1725
      struct value   *arg      = args[argnum];
1726
      struct type    *arg_type = check_typedef (value_type (arg));
1727
      int             len      = arg_type->length;
1728
      enum type_code  typecode = arg_type->main_type->code;
1729
 
1730
      /* The EABI passes structures that do not fit in a register by
1731
         reference. In all other cases, pass the structure by value.  */
1732
      if((len > bpw) &&
1733
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1734
        {
1735
 
1736
          store_unsigned_integer (valbuf, bpa, value_offset (arg));
1737
          len      = bpa;
1738
          val      = valbuf;
1739
        }
1740
      else
1741
        {
1742
          val = (char *)value_contents (arg);
1743
        }
1744
 
1745
      gdb_assert (len <= (bpw * 2));
1746
 
1747
      write_memory (sp + stack_offset, val, len);
1748
      stack_offset += ((len + bpw - 1) / bpw) * bpw;
1749
    }
1750
 
1751
  /* Save the updated stack pointer */
1752
  regcache_cooked_write_unsigned (regcache, OR1K_SP_REGNUM, sp);
1753
 
1754
  return sp;
1755
 
1756
}       /* or1k_push_dummy_call() */
1757
 
1758
 
1759
/*----------------------------------------------------------------------------*/
1760
/*!Unwind a dummy stack frame
1761
 
1762
   Tear down a dummy frame created by or1k_push_dummy_call(). This data has to
1763
   be constructed manually from the data in our hand. The frame_id info in
1764
   next_frame is not complete, and a call to unwind it will just recurse to us
1765
   (we think).
1766
 
1767
   The stack pointer and program counter can be unwound. From the program
1768
   counter, the start of the function can be determined.
1769
 
1770
   @param[in] gdbarch     The architecture to use
1771
   @param[in] next_frame  Information about the next frame
1772
 
1773
   @return  Frame ID of the preceding frame */
1774
/*---------------------------------------------------------------------------*/
1775
 
1776
static struct frame_id
1777
or1k_unwind_dummy_id (struct gdbarch    *gdbarch,
1778
                      struct frame_info *next_frame)
1779
{
1780
  CORE_ADDR  this_sp = gdbarch_unwind_sp (gdbarch, next_frame);
1781
  CORE_ADDR  this_pc = gdbarch_unwind_pc (gdbarch, next_frame);
1782
 
1783
  CORE_ADDR  start_addr;
1784
  CORE_ADDR  end_addr;
1785
 
1786
  /* Try using SAL to find the true function start. Otherwise the PC will
1787
     have to be a proxy for the start of the function. */
1788
  if (find_pc_partial_function (this_pc, NULL, &start_addr, &end_addr))
1789
    {
1790
      return  frame_id_build (this_sp, start_addr);
1791
    }
1792
  else
1793
    {
1794
      return  frame_id_build (this_sp, this_pc);
1795
    }
1796
 
1797
}       /* or1k_unwind_dummy_id() */
1798
 
1799
 
1800
/*----------------------------------------------------------------------------*/
1801
/*!The OpenRISC 1000 registered frame sniffer
1802
 
1803
   This function just identifies our family of frame sniffing functions.
1804
 
1805
   @param[in] next_frame  The "next" (i.e. inner, newer from here, the one
1806
                          THIS frame called) frame.
1807
 
1808
                          @return  A pointer to a struct identifying the sniffing functions */
1809
/*---------------------------------------------------------------------------*/
1810
 
1811
static const struct frame_unwind *
1812
or1k_frame_sniffer (struct frame_info *next_frame)
1813
{
1814
  static const struct frame_unwind or1k_frame_unwind = {
1815
    .type          = NORMAL_FRAME,
1816
    .this_id       = or1k_frame_this_id,
1817
    .prev_register = or1k_frame_prev_register,
1818
    .unwind_data   = NULL,
1819
    .sniffer       = NULL,
1820
    .prev_pc       = NULL,
1821
    .dealloc_cache = NULL
1822
  };
1823
 
1824
  return  &or1k_frame_unwind;
1825
 
1826
}       /* or1k_frame_sniffer() */
1827
 
1828
 
1829
/*----------------------------------------------------------------------------*/
1830
/*!Architecture initialization for OpenRISC 1000
1831
 
1832
   Looks for a candidate architecture in the list of architectures supplied
1833
   using the info supplied. If none match, create a new architecture.
1834
 
1835
   @param[in] info    Information about the target architecture
1836
   @param[in] arches  The list of currently know architectures
1837
 
1838
   @return  A structure describing the target architecture */
1839
/*---------------------------------------------------------------------------*/
1840
 
1841
static struct gdbarch *
1842
or1k_gdbarch_init (struct gdbarch_info  info,
1843
                   struct gdbarch_list *arches)
1844
{
1845
  static struct frame_base     or1k_frame_base;
1846
  struct        gdbarch       *gdbarch;
1847
  struct        gdbarch_tdep  *tdep;
1848
  const struct  bfd_arch_info *binfo;
1849
 
1850
  /* Find a candidate among the list of pre-declared architectures.  */
1851
  arches = gdbarch_list_lookup_by_info (arches, &info);
1852
  if (NULL != arches)
1853
    {
1854
      return arches->gdbarch;
1855
    }
1856
 
1857
  /* None found, create a new architecture from the information
1858
     provided. Can't initialize all the target dependencies until we actually
1859
     know which target we are talking to, but put in some defaults for now. */
1860
 
1861
  binfo                   = info.bfd_arch_info;
1862
  tdep                    = xmalloc (sizeof *tdep);
1863
  tdep->num_matchpoints   = OR1K_MAX_MATCHPOINTS;
1864
  tdep->num_gpr_regs      = OR1K_MAX_GPR_REGS;
1865
  tdep->bytes_per_word    = binfo->bits_per_word    / binfo->bits_per_byte;
1866
  tdep->bytes_per_address = binfo->bits_per_address / binfo->bits_per_byte;
1867
  gdbarch                 = gdbarch_alloc (&info, tdep);
1868
 
1869
  /* Target data types.  */
1870
  set_gdbarch_short_bit             (gdbarch, 16);
1871
  set_gdbarch_int_bit               (gdbarch, 32);
1872
  set_gdbarch_long_bit              (gdbarch, 32);
1873
  set_gdbarch_long_long_bit         (gdbarch, 64);
1874
  set_gdbarch_float_bit             (gdbarch, 32);
1875
  set_gdbarch_float_format          (gdbarch, floatformats_ieee_single);
1876
  set_gdbarch_double_bit            (gdbarch, 64);
1877
  set_gdbarch_double_format         (gdbarch, floatformats_ieee_double);
1878
  set_gdbarch_long_double_bit       (gdbarch, 64);
1879
  set_gdbarch_long_double_format    (gdbarch, floatformats_ieee_double);
1880
  set_gdbarch_ptr_bit               (gdbarch, binfo->bits_per_address);
1881
  set_gdbarch_addr_bit              (gdbarch, binfo->bits_per_address);
1882
  set_gdbarch_char_signed           (gdbarch, 1);
1883
 
1884
  /* Information about the target architecture */
1885
  set_gdbarch_return_value          (gdbarch, or1k_return_value);
1886
  set_gdbarch_breakpoint_from_pc    (gdbarch, or1k_breakpoint_from_pc);
1887
  set_gdbarch_single_step_through_delay
1888
                                    (gdbarch, or1k_single_step_through_delay);
1889
  set_gdbarch_have_nonsteppable_watchpoint
1890
                                    (gdbarch, 1);
1891
  switch (gdbarch_byte_order (gdbarch))
1892
    {
1893
    case BFD_ENDIAN_BIG:
1894
      set_gdbarch_print_insn        (gdbarch, print_insn_big_or32);
1895
      break;
1896
 
1897
    case BFD_ENDIAN_LITTLE:
1898
      set_gdbarch_print_insn        (gdbarch, print_insn_little_or32);
1899
      break;
1900
 
1901
    case BFD_ENDIAN_UNKNOWN:
1902
      error ("or1k_gdbarch_init: Unknown endianism");
1903
      break;
1904
    }
1905
 
1906
  /* Register architecture */
1907
  set_gdbarch_pseudo_register_read  (gdbarch, or1k_pseudo_register_read);
1908
  set_gdbarch_pseudo_register_write (gdbarch, or1k_pseudo_register_write);
1909
  set_gdbarch_num_regs              (gdbarch, OR1K_NUM_REGS);
1910
  set_gdbarch_num_pseudo_regs       (gdbarch, OR1K_NUM_PSEUDO_REGS);
1911
  set_gdbarch_sp_regnum             (gdbarch, OR1K_SP_REGNUM);
1912
  set_gdbarch_pc_regnum             (gdbarch, OR1K_NPC_REGNUM);
1913
  set_gdbarch_ps_regnum             (gdbarch, OR1K_SR_REGNUM);
1914
  set_gdbarch_deprecated_fp_regnum  (gdbarch, OR1K_FP_REGNUM);
1915
 
1916
  /* Functions to supply register information */
1917
  set_gdbarch_register_name         (gdbarch, or1k_register_name);
1918
  set_gdbarch_register_type         (gdbarch, or1k_register_type);
1919
  set_gdbarch_print_registers_info  (gdbarch, or1k_registers_info);
1920
  set_gdbarch_register_reggroup_p   (gdbarch, or1k_register_reggroup_p);
1921
 
1922
  /* Functions to analyse frames */
1923
  set_gdbarch_skip_prologue         (gdbarch, or1k_skip_prologue);
1924
  set_gdbarch_inner_than            (gdbarch, core_addr_lessthan);
1925
  set_gdbarch_frame_align           (gdbarch, or1k_frame_align);
1926
  set_gdbarch_frame_red_zone_size   (gdbarch, OR1K_FRAME_RED_ZONE_SIZE);
1927
 
1928
  /* Functions to access frame data */
1929
  set_gdbarch_unwind_pc             (gdbarch, or1k_unwind_pc);
1930
  set_gdbarch_unwind_sp             (gdbarch, or1k_unwind_sp);
1931
 
1932
  /* Functions handling dummy frames */
1933
  set_gdbarch_push_dummy_call       (gdbarch, or1k_push_dummy_call);
1934
  set_gdbarch_unwind_dummy_id       (gdbarch, or1k_unwind_dummy_id);
1935
 
1936
  /* High level frame base sniffer */
1937
  or1k_frame_base.unwind      = or1k_frame_sniffer (NULL);
1938
  or1k_frame_base.this_base   = or1k_frame_base_address;
1939
  or1k_frame_base.this_locals = or1k_frame_base_address;
1940
  or1k_frame_base.this_args   = or1k_frame_base_address;
1941
  frame_base_set_default            (gdbarch, &or1k_frame_base);
1942
 
1943
  /* Low level frame sniffers */
1944
  frame_unwind_append_sniffer       (gdbarch, dwarf2_frame_sniffer);
1945
  frame_unwind_append_sniffer       (gdbarch, or1k_frame_sniffer);
1946
 
1947
 
1948
  return gdbarch;
1949
 
1950
}       /* or1k_gdbarch_init() */
1951
 
1952
 
1953
/*----------------------------------------------------------------------------*/
1954
/*!Dump the target specific data for this architecture
1955
 
1956
   @param[in] gdbarch  The architecture of interest
1957
   @param[in] file     Where to dump the data */
1958
/*---------------------------------------------------------------------------*/
1959
 
1960
static void
1961
or1k_dump_tdep (struct gdbarch *gdbarch,
1962
                struct ui_file *file)
1963
{
1964
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1965
 
1966
  if (NULL == tdep)
1967
    {
1968
      return;                   /* Nothing to report */
1969
    }
1970
 
1971
  fprintf_unfiltered (file, "or1k_dump_tdep: %d matchpoints available\n",
1972
                      tdep->num_matchpoints);
1973
  fprintf_unfiltered (file, "or1k_dump_tdep: %d general purpose registers\n",
1974
                      tdep->num_gpr_regs);
1975
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per word\n",
1976
                      tdep->bytes_per_word);
1977
  fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per address\n",
1978
                      tdep->bytes_per_address);
1979
 
1980
}       /* or1k_dump_tdep() */
1981
 
1982
 
1983
 
1984
/* Functions to add extra commands to GDB */
1985
 
1986
 
1987
/*----------------------------------------------------------------------------*/
1988
/*!Returns a special purpose register group name
1989
 
1990
   @param[in]  group  The SPR group number
1991
 
1992
   @return  The SPR name (pointer to the name argument) */
1993
/*---------------------------------------------------------------------------*/
1994
 
1995
static const char *
1996
or1k_spr_group_name (int  group)
1997
{
1998
  static const char *or1k_group_names[OR1K_NUM_SPGS] =
1999
    {
2000
      "SYS",
2001
      "DMMU",
2002
      "IMMU",
2003
      "DCACHE",
2004
      "ICACHE",
2005
      "MAC",
2006
      "DEBUG",
2007
      "PERF",
2008
      "POWER",
2009
      "PIC",
2010
      "TIMER",
2011
      "FPU"
2012
    };
2013
 
2014
  if ((0 <= group) && (group < OR1K_NUM_SPGS))
2015
    {
2016
      return or1k_group_names[group];
2017
    }
2018
  else
2019
    {
2020
      return "";
2021
    }
2022
}       /* or1k_spr_group_name() */
2023
 
2024
 
2025
/*----------------------------------------------------------------------------*/
2026
/*!Returns a special purpose register name
2027
 
2028
   @param[in]  group  The SPR group
2029
   @param[in]  index  The index within the SPR group
2030
   @param[out] name   Array to put the name in
2031
 
2032
   @return  The SPR name (pointer to the name argument) */
2033
/*---------------------------------------------------------------------------*/
2034
 
2035
static char *
2036
or1k_spr_register_name (int   group,
2037
                        int   index,
2038
                        char *name)
2039
{
2040
  char di;
2041
 
2042
  switch (group)
2043
    {
2044
 
2045
    case OR1K_SPG_SYS:
2046
      /* 1:1 names */
2047
      switch (index)
2048
        {
2049
        case OR1K_SPG_SYS_VR:       sprintf (name, "VR"      ); return  name;
2050
        case OR1K_SPG_SYS_UPR:      sprintf (name, "UPR"     ); return  name;
2051
        case OR1K_SPG_SYS_CPUCFGR:  sprintf (name, "CPUCFGR" ); return  name;
2052
        case OR1K_SPG_SYS_DMMUCFGR: sprintf (name, "DMMUCFGR"); return  name;
2053
        case OR1K_SPG_SYS_IMMUCFGR: sprintf (name, "IMMUCFGR"); return  name;
2054
        case OR1K_SPG_SYS_DCCFGR:   sprintf (name, "DCCFGR"  ); return  name;
2055
        case OR1K_SPG_SYS_ICCFGR:   sprintf (name, "ICCFGR"  ); return  name;
2056
        case OR1K_SPG_SYS_DCFGR:    sprintf (name, "DCFGR"   ); return  name;
2057
        case OR1K_SPG_SYS_PCCFGR:   sprintf (name, "PCCFGR"  ); return  name;
2058
        case OR1K_SPG_SYS_NPC:      sprintf (name, "NPC"     ); return  name;
2059
        case OR1K_SPG_SYS_SR:       sprintf (name, "SR"      ); return  name;
2060
        case OR1K_SPG_SYS_PPC:      sprintf (name, "PPC"     ); return  name;
2061
        case OR1K_SPG_SYS_FPCSR:    sprintf (name, "FPCSR"   ); return  name;
2062
        }
2063
 
2064
      /* Exception PC regs */
2065
      if((OR1K_SPG_SYS_EPCR <= index) &&
2066
         (index             <= OR1K_SPG_SYS_EPCR_END))
2067
        {
2068
          sprintf (name, "EPCR%d", index - OR1K_SPG_SYS_EPCR);
2069
          return  name;
2070
        }
2071
 
2072
      /* Exception EA regs */
2073
      if((OR1K_SPG_SYS_EEAR <= index) &&
2074
         (index             <= OR1K_SPG_SYS_EEAR_END))
2075
        {
2076
          sprintf (name, "EEAR%d", index - OR1K_SPG_SYS_EEAR);
2077
          return  name;
2078
        }
2079
 
2080
      /* Exception SR regs */
2081
      if((OR1K_SPG_SYS_ESR <= index) &&
2082
         (index            <= OR1K_SPG_SYS_ESR_END))
2083
        {
2084
          sprintf (name, "ESR%d", index - OR1K_SPG_SYS_ESR);
2085
          return  name;
2086
        }
2087
 
2088
      /* GPRs */
2089
      if((OR1K_SPG_SYS_GPR <= index) &&
2090
         (index            <= OR1K_SPG_SYS_GPR_END))
2091
        {
2092
          sprintf (name, "GPR%d", index - OR1K_SPG_SYS_GPR);
2093
          return  name;
2094
        }
2095
 
2096
      break;
2097
 
2098
    case OR1K_SPG_DMMU:
2099
    case OR1K_SPG_IMMU:
2100
      /* MMU registers. Use DMMU constants throughout, but these are identical
2101
         to the corresponding IMMU constants */
2102
      di = OR1K_SPG_DMMU == group ? 'D' : 'I';
2103
 
2104
      /* 1:1 names */
2105
      switch (index)
2106
        {
2107
        case OR1K_SPG_DMMU_DMMUCR:
2108
          sprintf (name, "%cMMUCR",  di); return  name;
2109
        case OR1K_SPG_DMMU_DMMUPR:
2110
          sprintf (name, "%cMMUPR",  di); return  name;
2111
        case OR1K_SPG_DMMU_DTLBEIR:
2112
          sprintf (name, "%cTLBEIR", di); return  name;
2113
        }
2114
 
2115
      /* ATB Match registers */
2116
      if((OR1K_SPG_DMMU_DATBMR <= index) &&
2117
         (index                <= OR1K_SPG_DMMU_DATBMR_END))
2118
        {
2119
          sprintf (name, "%cATBMR%d", di, index - OR1K_SPG_DMMU_DATBMR);
2120
          return  name;
2121
        }
2122
 
2123
      /* ATB Translate registers */
2124
      if((OR1K_SPG_DMMU_DATBTR <= index) &&
2125
         (index                <= OR1K_SPG_DMMU_DATBTR_END))
2126
        {
2127
          sprintf (name, "%cATBTR%d", di, index - OR1K_SPG_DMMU_DATBTR);
2128
          return  name;
2129
        }
2130
 
2131
      /* TLB Way 1 Match registers */
2132
      if((OR1K_SPG_DMMU_DTLBW1MR <= index) &&
2133
         (index                <= OR1K_SPG_DMMU_DTLBW1MR_END))
2134
        {
2135
          sprintf (name, "%cTLBW1MR%d", di, index - OR1K_SPG_DMMU_DTLBW1MR);
2136
          return  name;
2137
        }
2138
 
2139
      /* TLB Way 1 Translate registers */
2140
      if((OR1K_SPG_DMMU_DTLBW1TR <= index) &&
2141
         (index                <= OR1K_SPG_DMMU_DTLBW1TR_END))
2142
        {
2143
          sprintf (name, "%cTLBW1TR%d", di, index - OR1K_SPG_DMMU_DTLBW1TR);
2144
          return  name;
2145
        }
2146
 
2147
      /* TLB Way 2 Match registers */
2148
      if((OR1K_SPG_DMMU_DTLBW2MR <= index) &&
2149
         (index                <= OR1K_SPG_DMMU_DTLBW2MR_END))
2150
        {
2151
          sprintf (name, "%cTLBW2MR%d", di, index - OR1K_SPG_DMMU_DTLBW2MR);
2152
          return  name;
2153
        }
2154
 
2155
      /* TLB Way 2 Translate registers */
2156
      if((OR1K_SPG_DMMU_DTLBW2TR <= index) &&
2157
         (index                <= OR1K_SPG_DMMU_DTLBW2TR_END))
2158
        {
2159
          sprintf (name, "%cTLBW2TR%d", di, index - OR1K_SPG_DMMU_DTLBW2TR);
2160
          return  name;
2161
        }
2162
 
2163
      /* TLB Way 3 Match registers */
2164
      if((OR1K_SPG_DMMU_DTLBW3MR <= index) &&
2165
         (index                <= OR1K_SPG_DMMU_DTLBW3MR_END))
2166
        {
2167
          sprintf (name, "%cTLBW3MR%d", di, index - OR1K_SPG_DMMU_DTLBW3MR);
2168
          return  name;
2169
        }
2170
 
2171
      /* TLB Way 3 Translate registers */
2172
      if((OR1K_SPG_DMMU_DTLBW3TR <= index) &&
2173
         (index                <= OR1K_SPG_DMMU_DTLBW3TR_END))
2174
        {
2175
          sprintf (name, "%cTLBW3TR%d", di, index - OR1K_SPG_DMMU_DTLBW3TR);
2176
          return  name;
2177
        }
2178
 
2179
      break;
2180
 
2181
    case OR1K_SPG_DC:
2182
      /* Data cache registers. These do not have an exact correspondence with
2183
         their instruction cache counterparts, so must be done separately. */
2184
 
2185
      /* 1:1 names */
2186
      switch (index)
2187
        {
2188
        case OR1K_SPG_DC_DCCR:  sprintf (name, "DCCR" ); return  name;
2189
        case OR1K_SPG_DC_DCBPR: sprintf (name, "DCBPR"); return  name;
2190
        case OR1K_SPG_DC_DCBFR: sprintf (name, "DCBFR"); return  name;
2191
        case OR1K_SPG_DC_DCBIR: sprintf (name, "DCBIR"); return  name;
2192
        case OR1K_SPG_DC_DCBWR: sprintf (name, "DCBWR"); return  name;
2193
        case OR1K_SPG_DC_DCBLR: sprintf (name, "DCBLR"); return  name;
2194
        }
2195
 
2196
      break;
2197
 
2198
    case OR1K_SPG_IC:
2199
      /* Instruction cache registers */
2200
 
2201
      /* 1:1 names */
2202
      switch (index)
2203
        {
2204
        case OR1K_SPG_IC_ICCR:  sprintf (name, "ICCR" ); return  name;
2205
        case OR1K_SPG_IC_ICBPR: sprintf (name, "ICBPR"); return  name;
2206
        case OR1K_SPG_IC_ICBIR: sprintf (name, "ICBIR"); return  name;
2207
        case OR1K_SPG_IC_ICBLR: sprintf (name, "ICBLR"); return  name;
2208
        }
2209
 
2210
      break;
2211
 
2212
    case OR1K_SPG_MAC:
2213
      /* MAC registers */
2214
 
2215
      /* 1:1 names */
2216
      switch (index)
2217
        {
2218
        case OR1K_SPG_MAC_MACLO: sprintf (name, "MACLO"); return  name;
2219
        case OR1K_SPG_MAC_MACHI: sprintf (name, "MACHI"); return  name;
2220
        }
2221
 
2222
      break;
2223
 
2224
    case OR1K_SPG_DEBUG:
2225
      /* Debug registers */
2226
 
2227
      /* Debug Value registers */
2228
      if((OR1K_SPG_DEBUG_DVR <= index) &&
2229
         (index                <= OR1K_SPG_DEBUG_DVR_END))
2230
        {
2231
          sprintf (name, "DVR%d", index - OR1K_SPG_DEBUG_DVR);
2232
          return  name;
2233
        }
2234
 
2235
      /* Debug Control registers */
2236
      if((OR1K_SPG_DEBUG_DCR <= index) &&
2237
         (index                <= OR1K_SPG_DEBUG_DCR_END))
2238
        {
2239
          sprintf (name, "DCR%d", index - OR1K_SPG_DEBUG_DCR);
2240
          return  name;
2241
        }
2242
 
2243
      /* 1:1 names */
2244
      switch (index)
2245
        {
2246
        case OR1K_SPG_DEBUG_DMR1:  sprintf (name, "DMR1" ); return  name;
2247
        case OR1K_SPG_DEBUG_DMR2:  sprintf (name, "DMR2" ); return  name;
2248
        case OR1K_SPG_DEBUG_DCWR0: sprintf (name, "DCWR0"); return  name;
2249
        case OR1K_SPG_DEBUG_DCWR1: sprintf (name, "DCWR1"); return  name;
2250
        case OR1K_SPG_DEBUG_DSR:   sprintf (name, "DSR"  ); return  name;
2251
        case OR1K_SPG_DEBUG_DRR:   sprintf (name, "DRR"  ); return  name;
2252
        }
2253
 
2254
      break;
2255
 
2256
    case OR1K_SPG_PC:
2257
      /* Performance Counter registers */
2258
 
2259
      /* Performance Counters Count registers */
2260
      if((OR1K_SPG_PC_PCCR <= index) &&
2261
         (index                <= OR1K_SPG_PC_PCCR_END))
2262
        {
2263
          sprintf (name, "PCCR%d", index - OR1K_SPG_PC_PCCR);
2264
          return  name;
2265
        }
2266
 
2267
      /* Performance Counters Mode registers */
2268
      if((OR1K_SPG_PC_PCMR <= index) &&
2269
         (index                <= OR1K_SPG_PC_PCMR_END))
2270
        {
2271
          sprintf (name, "PCMR%d", index - OR1K_SPG_PC_PCMR);
2272
          return  name;
2273
        }
2274
 
2275
      break;
2276
 
2277
    case OR1K_SPG_PM:
2278
      /* Power Management registers */
2279
 
2280
      /* 1:1 names */
2281
      switch (index)
2282
        {
2283
        case OR1K_SPG_PM_PMR:  sprintf (name, "PMR"); return  name;
2284
        }
2285
 
2286
      break;
2287
 
2288
    case OR1K_SPG_PIC:
2289
      /* Programmable Interrupt Controller registers */
2290
 
2291
      /* 1:1 names */
2292
      switch (index)
2293
        {
2294
        case OR1K_SPG_PIC_PICMR:  sprintf (name, "PICMR"); return  name;
2295
        case OR1K_SPG_PIC_PICSR:  sprintf (name, "PICSR"); return  name;
2296
        }
2297
 
2298
      break;
2299
 
2300
    case OR1K_SPG_TT:
2301
      /* Tick Timer registers */
2302
 
2303
      /* 1:1 names */
2304
      switch (index)
2305
        {
2306
        case OR1K_SPG_TT_TTMR:  sprintf (name, "TTMR"); return  name;
2307
        case OR1K_SPG_TT_TTCR:  sprintf (name, "TTCR"); return  name;
2308
        }
2309
 
2310
      break;
2311
 
2312
    case OR1K_SPG_FPU:
2313
 
2314
      break;
2315
    }
2316
 
2317
  /* Not a recognized register */
2318
  strcpy (name, "");
2319
  return  name;
2320
 
2321
}       /* or1k_spr_register_name() */
2322
 
2323
 
2324
/*----------------------------------------------------------------------------*/
2325
/*!Get SPR group number from a name
2326
 
2327
   @param[in] group_name  SPR register group
2328
 
2329
   @return  The index, or negative if no match. */
2330
/*----------------------------------------------------------------------------*/
2331
 
2332
static int
2333
or1k_groupnum_from_name (char *group_name)
2334
{
2335
  int  group;
2336
 
2337
  for (group = 0; group < OR1K_NUM_SPGS; group++)
2338
    {
2339
      if (0 == strcasecmp (group_name, or1k_spr_group_name (group)))
2340
        {
2341
          return group;
2342
        }
2343
    }
2344
 
2345
  return -1;
2346
 
2347
}       /* or1k_groupnum_from_name() */
2348
 
2349
 
2350
/*----------------------------------------------------------------------------*/
2351
/*!Get register index in special purpose register group from name
2352
 
2353
   The name may either be SPR<group_num>_<index> or a known unique name. In
2354
   either case the group number must match the supplied group number.
2355
 
2356
   @param[in] group  SPR register group
2357
   @param[in] name   Register name
2358
 
2359
   @return  The index, or negative if no match. */
2360
/*----------------------------------------------------------------------------*/
2361
 
2362
static int
2363
or1k_regnum_from_name (int   group,
2364
                       char *name)
2365
{
2366
  /* Last valid register in each group. */
2367
  static const int  or1k_spr_group_last[OR1K_NUM_SPGS] =
2368
    {
2369
      OR1K_SPG_SYS_LAST,
2370
      OR1K_SPG_DMMU_LAST,
2371
      OR1K_SPG_IMMU_LAST,
2372
      OR1K_SPG_DC_LAST,
2373
      OR1K_SPG_IC_LAST,
2374
      OR1K_SPG_MAC_LAST,
2375
      OR1K_SPG_DEBUG_LAST,
2376
      OR1K_SPG_PC_LAST,
2377
      OR1K_SPG_PM_LAST,
2378
      OR1K_SPG_PIC_LAST,
2379
      OR1K_SPG_TT_LAST,
2380
      OR1K_SPG_FPU_LAST
2381
    };
2382
 
2383
  int  i;
2384
  char  spr_name[32];
2385
 
2386
  if (0 == strcasecmp (name, "SPR"))
2387
    {
2388
      char *ptr_c;
2389
 
2390
      /* Skip SPR */
2391
      name += 3;
2392
 
2393
      /* Get group number */
2394
      i = (int) strtoul (name, &ptr_c, 10);
2395
      if (*ptr_c != '_' || i != group)
2396
        {
2397
          return -1;
2398
        }
2399
 
2400
      /* Get index */
2401
      ptr_c++;
2402
      i = (int) strtoul (name, &ptr_c, 10);
2403
      if (*ptr_c)
2404
        {
2405
          return -1;
2406
        }
2407
      else
2408
        {
2409
          return  i;
2410
        }
2411
    }
2412
 
2413
  /* Look for a "known" name in this group */
2414
  for (i = 0; i <= or1k_spr_group_last[group]; i++)
2415
    {
2416
      char *s = or1k_spr_register_name (group, i, spr_name);
2417
 
2418
      if (0 == strcasecmp (name, s))
2419
        {
2420
          return i;
2421
        }
2422
    }
2423
 
2424
  /* Failure */
2425
  return -1;
2426
 
2427
}       /* or1k_regnum_from_name() */
2428
 
2429
 
2430
/*----------------------------------------------------------------------------*/
2431
/*!Get the next token from a string
2432
 
2433
   I can't believe there isn't a library argument for this, but strtok is
2434
   deprecated.
2435
 
2436
   Take a string and find the start of the next token and its length. A token
2437
   is anything containing non-blank characters.
2438
 
2439
   @param[in]  str  The string to look at (may be NULL).
2440
   @param[out] tok  Pointer to the start of the token within str. May be NULL
2441
                    if this result is not wanted (e.g. just the length is
2442
                    wanted. If no token is found will be the NULL char at the
2443
                    end of the string, if the original str was NULL, this will
2444
                    be NULL.
2445
 
2446
                    @return  The length of the token found */
2447
/*----------------------------------------------------------------------------*/
2448
 
2449
static int
2450
or1k_tokenize (char  *str,
2451
               char **tok)
2452
{
2453
  char *ptr;
2454
  int   len;
2455
 
2456
  /* Deal with NULL argument */
2457
  if (NULL == str)
2458
    {
2459
      if (NULL != tok)
2460
        {
2461
          *tok = NULL;
2462
        }
2463
      return 0;
2464
    }
2465
 
2466
  /* Find the start */
2467
  for (ptr = str; ISBLANK (*ptr) ; ptr++)
2468
    {
2469
      continue;
2470
    }
2471
 
2472
  /* Return the start pointer if requested */
2473
  if (NULL != tok)
2474
    {
2475
      *tok = ptr;
2476
    }
2477
 
2478
  /* Find the end and put in EOS */
2479
  for (len = 0;  ('\0' != ptr[len]) && (!ISBLANK (ptr[len])); len++)
2480
    {
2481
      continue;
2482
    }
2483
 
2484
  return len;
2485
 
2486
}       /* or1k_tokenize() */
2487
 
2488
 
2489
/*----------------------------------------------------------------------------*/
2490
/*!Parses args for spr commands
2491
 
2492
   Determines the special purpose register (SPR) name and puts result into
2493
   group and index
2494
 
2495
   Syntax is:
2496
 
2497
   @verbatim
2498
   <spr_args>    -> <group_ref> | <reg_name>
2499
   <group_ref>   -> <group_id> <index>
2500
   <group_id>    -> <group_num> | <group_name>
2501
   @endverbatim
2502
 
2503
   Where the indices/names have to be valid.
2504
 
2505
   So to parse, we look for 1 or 2 args. If 1 it must be a unique register
2506
   name. If 2, the first must be a group number or name and the second an
2507
   index within that group.
2508
 
2509
   Also responsible for providing diagnostics if the arguments do not match.
2510
 
2511
   Rewritten for GDB 6.8 to use the new UI calls and remove assorted
2512
   bugs. Syntax also slightly restricted to be more comprehensible.
2513
 
2514
   @param[in]  arg_str  The argument string
2515
   @param[out] group    The group this SPR belongs in, or -1 to indicate
2516
                        failure
2517
   @param[out] index    Index of the register within the group, or -1 to
2518
                        indicate the whole group
2519
   @param[in]  is_set   1 (true) if we are called from the "spr" command (so
2520
                        there is an extra arg) rather than the "info spr"
2521
                        command. Needed to distinguish between the case where
2522
                        info is sought from a register specified as group and
2523
                        index and setting a uniquely identified register to a
2524
                        value.
2525
 
2526
                        @return  A pointer to any remaining args */
2527
/*---------------------------------------------------------------------------*/
2528
 
2529
static char *
2530
or1k_parse_spr_params (char *arg_str,
2531
                       int  *group,
2532
                       int  *index,
2533
                       int   is_set)
2534
{
2535
  struct {
2536
    char              *str;
2537
    int                len;
2538
    unsigned long int  val;
2539
    int                is_num;
2540
  } arg[3] = {
2541
    {
2542
      .str    = NULL,
2543
      .len    = 0,
2544
      .val    = 0,
2545
      .is_num = 0,
2546
    },
2547
   {
2548
      .str    = NULL,
2549
      .len    = 0,
2550
      .val    = 0,
2551
      .is_num = 0,
2552
    },
2553
   {
2554
      .str    = NULL,
2555
      .len    = 0,
2556
      .val    = 0,
2557
      .is_num = 0,
2558
    }
2559
  };
2560
 
2561
  int   num_args;
2562
  char *trailer  = arg_str;
2563
  char *tmp_str;
2564
  int   i;
2565
 
2566
  char  spr_name[32];
2567
 
2568
  /* Break out the arguments. Note that the strings are NOT null terminated
2569
     (we don't want to change arg_str), so we must rely on len. The stroul
2570
     call will still work, since there is always a non-digit char (possibly EOS)
2571
     after the last digit. */
2572
  if (NULL == arg_str)
2573
    {
2574
      num_args = 0;
2575
    }
2576
  else
2577
    {
2578
      for (num_args = 0; num_args < 3; num_args++)
2579
        {
2580
          arg[num_args].len = or1k_tokenize (trailer, &(arg[num_args].str));
2581
          trailer           = arg[num_args].str + arg[num_args].len;
2582
 
2583
          if (0 == arg[num_args].len)
2584
            {
2585
              break;
2586
            }
2587
        }
2588
    }
2589
 
2590
  /* Patch nulls into the arg strings and see about values. Couldn't do this
2591
     earlier, since we needed the next char clean to check later args. This
2592
     means advancing trailer, UNLESS it was already at EOS */
2593
 
2594
  if((NULL != arg_str) && ('\0' != *trailer))
2595
    {
2596
      trailer++;
2597
    }
2598
 
2599
  for (i = 0; i < num_args; i++)
2600
    {
2601
      (arg[i].str)[arg[i].len] = '\0';
2602
      errno                    = 0;
2603
      arg[i].val               = strtoul (arg[i].str, &tmp_str, 0);
2604
      arg[i].is_num            = (0 == errno) && ('\0' == *tmp_str);
2605
    }
2606
 
2607
  /* Deal with the case where we are setting a register, so the final argument
2608
     should be disregarded (it is the trailer). Do this anyway if we get a
2609
     third argument */
2610
  if ((is_set & (num_args > 0)) || (num_args > 2))
2611
    {
2612
      trailer = arg[num_args - 1].str;
2613
      num_args--;
2614
    }
2615
 
2616
  /* Deal with different numbers of args */
2617
 
2618
  switch (num_args)
2619
    {
2620
 
2621
    case 0:
2622
      ui_out_message (uiout, 0,
2623
                      "Usage: <command> <register>      |\n"
2624
                      "       <command> <group>         |\n"
2625
                      "       <command> <group> <index>\n"
2626
                      "Valid groups are:\n");
2627
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2628
        {
2629
          ui_out_field_string (uiout, NULL, or1k_spr_group_name  (i));
2630
          ui_out_spaces (uiout, 1);
2631
          ui_out_wrap_hint (uiout, NULL);
2632
        }
2633
      ui_out_field_string (uiout, NULL, "\n");
2634
 
2635
      *index = -1;
2636
      return  trailer;
2637
 
2638
    case 1:
2639
      /* See if it is a numeric group */
2640
      if (arg[0].is_num)
2641
        {
2642
          if (arg[0].val < OR1K_NUM_SPGS)
2643
            {
2644
              *group = arg[0].val;
2645
              *index = -1;
2646
              return trailer;
2647
            }
2648
          else
2649
            {
2650
              ui_out_message (uiout, 0,
2651
                              "Group index should be in the range 0 - %d\n",
2652
                              OR1K_NUM_SPGS);
2653
              *group = -1;
2654
              *index = -1;
2655
              return trailer;
2656
            }
2657
        }
2658
 
2659
      /* Is is it a group name? */
2660
      *group = or1k_groupnum_from_name (arg[0].str);
2661
      if (*group >= 0)
2662
        {
2663
          *index = -1;
2664
          return trailer;
2665
        }
2666
 
2667
      /* See if it is a valid register name in any group */
2668
      for (*group = 0; *group < OR1K_NUM_SPGS; (*group)++)
2669
        {
2670
          *index = or1k_regnum_from_name (*group, arg[0].str);
2671
 
2672
          if (*index >= 0)
2673
            {
2674
              return  trailer;
2675
            }
2676
        }
2677
 
2678
      /* Couldn't find it - print out a rude message */
2679
      ui_out_message (uiout, 0,
2680
                      "Group or register name not recognized.\n"
2681
                      "Valid groups are:\n");
2682
      for (i = 0; i < OR1K_NUM_SPGS; i++)
2683
        {
2684
          ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2685
          ui_out_spaces (uiout, 1);
2686
          ui_out_wrap_hint (uiout, NULL);
2687
        }
2688
      ui_out_field_string (uiout, NULL, "\n");
2689
 
2690
      *group = -1;
2691
      *index = -1;
2692
      return  trailer;
2693
 
2694
    case 2:
2695
      /* See if first arg is a numeric group */
2696
      if (arg[0].is_num)
2697
        {
2698
          if (arg[0].val < OR1K_NUM_SPGS)
2699
            {
2700
              *group = arg[0].val;
2701
              *index = -1;
2702
            }
2703
          else
2704
            {
2705
              ui_out_message (uiout, 0,
2706
                              "Group index should be in the range 0 - %d\n",
2707
                              OR1K_NUM_SPGS - 1);
2708
              *group = -1;
2709
              *index = -1;
2710
              return trailer;
2711
            }
2712
        }
2713
      else
2714
        {
2715
          /* Is is it a group name? */
2716
          *group = or1k_groupnum_from_name (arg[0].str);
2717
          if (*group >= 0)
2718
            {
2719
              *index = -1;
2720
            }
2721
          else
2722
            {
2723
              ui_out_message (uiout, 0,
2724
                              "Group name not recognized.\n"
2725
                              "Valid groups are:\n");
2726
              for (i = 0; i < OR1K_NUM_SPGS; i++)
2727
                {
2728
                  ui_out_field_string (uiout, NULL, or1k_spr_group_name (i));
2729
                  ui_out_spaces (uiout, 1);
2730
                  ui_out_wrap_hint (uiout, NULL);
2731
                }
2732
              ui_out_field_string (uiout, NULL, "\n");
2733
 
2734
              *group = -1;
2735
              *index = -1;
2736
              return  trailer;
2737
            }
2738
        }
2739
 
2740
      /* Is second arg an index or name? */
2741
      if (arg[1].is_num)
2742
        {
2743
          if (arg[1].val < OR1K_SPG_SIZE)
2744
            {
2745
              /* Check this really is a register */
2746
              if (0 != strlen (or1k_spr_register_name (*group, arg[1].val,
2747
                                                       spr_name)))
2748
                {
2749
                  *index = arg[1].val;
2750
                  return trailer;
2751
                }
2752
              else
2753
                {
2754
                  ui_out_message (uiout, 0,
2755
                                  "No valid register at that index in group\n");
2756
                  *group = -1;
2757
                  *index = -1;
2758
                  return  trailer;
2759
                }
2760
            }
2761
          else
2762
            {
2763
              ui_out_message (uiout, 0,
2764
                              "Register index should be in the range 0 - %d\n",
2765
                              OR1K_SPG_SIZE - 1);
2766
              *group = -1;
2767
              *index = -1;
2768
              return  trailer;
2769
            }
2770
        }
2771
 
2772
      /* Must be a name */
2773
      *index = or1k_regnum_from_name (*group, arg[1].str);
2774
 
2775
      if (*index >= 0)
2776
        {
2777
          return trailer;
2778
        }
2779
 
2780
      /* Couldn't find it - print out a rude message */
2781
      ui_out_message (uiout, 0, "Register name not recognized in group.\n");
2782
      *group = -1;
2783
      *index = -1;
2784
      return  trailer;
2785
 
2786
    default:
2787
      /* Anything else is an error */
2788
      ui_out_message (uiout, 0, "Unable to parse arguments\n");
2789
      *group = -1;
2790
      *index = -1;
2791
      return  trailer;
2792
    }
2793
}       /* or1k_parse_spr_params() */
2794
 
2795
 
2796
/*---------------------------------------------------------------------------*/
2797
/*!Read a special purpose register from the target
2798
 
2799
   This has to be done using the target remote command "readspr"
2800
 
2801
   @param[in] regnum  The register to read
2802
 
2803
   @return  The value read */
2804
/*---------------------------------------------------------------------------*/
2805
 
2806
static ULONGEST
2807
or1k_read_spr (unsigned int  regnum)
2808
{
2809
  struct ui_file    *uibuf = mem_fileopen ();
2810
  char               cmd[sizeof ("readspr ffff")];
2811
  unsigned long int  data;
2812
  char              *res;
2813
  long int           len;
2814
 
2815
  /* Create the command string and pass it to target remote command function */
2816
  sprintf (cmd, "readspr %4x", regnum);
2817
  target_rcmd (cmd, uibuf);
2818
 
2819
  /* Get the output for the UI file as a string */
2820
  res = ui_file_xstrdup (uibuf, &len);
2821
  sscanf (res, "%lx", &data);
2822
 
2823
  /* Tidy up */
2824
  xfree (res);
2825
  ui_file_delete (uibuf);
2826
 
2827
  return  (ULONGEST)data;
2828
 
2829
}       /* or1k_read_spr() */
2830
 
2831
 
2832
/*---------------------------------------------------------------------------*/
2833
/*!Write a special purpose register on the target
2834
 
2835
   This has to be done using the target remote command "writespr"
2836
 
2837
   Since the SPRs may map to GPR's or the other GDB register (PPC, NPC, SR),
2838
   any register cache is flushed.
2839
 
2840
   @param[in] regnum  The register to write
2841
   @param[in] data  The value to write */
2842
/*---------------------------------------------------------------------------*/
2843
 
2844
static void
2845
or1k_write_spr (unsigned int  regnum,
2846
                ULONGEST      data)
2847
{
2848
  struct ui_file    *uibuf = mem_fileopen ();
2849
  char               cmd[sizeof ("writespr ffff ffffffff")];
2850
  char              *res;
2851
  long int           len;
2852
 
2853
  /* Create the command string and pass it to target remote command function */
2854
  sprintf (cmd, "writespr %4x %8llx", regnum, (long long unsigned int)data);
2855
  target_rcmd (cmd, uibuf);
2856
 
2857
  /* Flush the register cache */
2858
  registers_changed ();
2859
 
2860
  /* We ignore the result - Rcmd can put out its own error messages. Just
2861
     tidy up */
2862
  ui_file_delete (uibuf);
2863
 
2864
}       /* or1k_write_spr() */
2865
 
2866
 
2867
/*----------------------------------------------------------------------------*/
2868
/*!Show the value of a special purpose register or group
2869
 
2870
   This is a custom extension to the GDB info command.
2871
 
2872
   @param[in] args
2873
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2874
   otherwise. */
2875
/*---------------------------------------------------------------------------*/
2876
 
2877
static void
2878
or1k_info_spr_command (char *args,
2879
                       int   from_tty)
2880
{
2881
  int  group;
2882
  int  index;
2883
 
2884
  char  spr_name[32];
2885
 
2886
  or1k_parse_spr_params (args, &group, &index, 0);
2887
 
2888
  if (group < 0)
2889
    {
2890
      return;                   /* Couldn't parse the args */
2891
    }
2892
 
2893
  if (index >= 0)
2894
    {
2895
      ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2896
 
2897
      ui_out_field_fmt (uiout, NULL, "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2898
                        or1k_spr_group_name (group),
2899
                        or1k_spr_register_name (group, index, spr_name), group,
2900
                        index, (long long unsigned int)value, (long long unsigned int)value);
2901
    }
2902
  else
2903
    {
2904
      /* Print all valid registers in the group */
2905
      for (index = 0; index < OR1K_SPG_SIZE; index++)
2906
        {
2907
          if (0 != strlen (or1k_spr_register_name (group, index, spr_name)))
2908
            {
2909
              ULONGEST  value = or1k_read_spr (OR1K_SPR (group, index));
2910
 
2911
              ui_out_field_fmt (uiout, NULL,
2912
                                "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2913
                                or1k_spr_group_name (group),
2914
                                or1k_spr_register_name (group, index, spr_name),
2915
                                group, index, (long long unsigned int)value, (long long unsigned int)value);
2916
            }
2917
        }
2918
    }
2919
}       /* or1k_info_spr_command() */
2920
 
2921
 
2922
/*----------------------------------------------------------------------------*/
2923
/*!Set a special purpose register
2924
 
2925
   This is a custom command added to GDB.
2926
 
2927
   @param[in] args
2928
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2929
   otherwise. */
2930
/*---------------------------------------------------------------------------*/
2931
 
2932
static void
2933
or1k_spr_command (char *args,
2934
                  int   from_tty)
2935
{
2936
  int   group;
2937
  int   index;
2938
  char *tmp_str;
2939
  char *nargs = or1k_parse_spr_params (args, &group, &index, 1);
2940
 
2941
  ULONGEST  old_val;
2942
  ULONGEST  new_val;
2943
 
2944
  char  spr_name[32];
2945
 
2946
  /* Do we have a valid register spec? */
2947
  if (index < 0)
2948
    {
2949
      return;           /* Parser will have printed the error message */
2950
    }
2951
 
2952
  /* Do we have a value to set? */
2953
 
2954
  errno = 0;
2955
  new_val = (ULONGEST)strtoul (nargs, &tmp_str, 0);
2956
 
2957
  if((0 != errno) || ('\0' != *tmp_str))
2958
    {
2959
      ui_out_message (uiout, 0, "Invalid value - register not changed\n");
2960
      return;
2961
    }
2962
 
2963
  old_val = or1k_read_spr (OR1K_SPR (group, index));
2964
 
2965
  or1k_write_spr (OR1K_SPR (group, index) , new_val);
2966
 
2967
  ui_out_field_fmt (uiout, NULL,
2968
                    "%s.%s (SPR%i_%i) set to %llu (0x%llx), "
2969
                    "was: %llu (0x%llx)\n",
2970
                    or1k_spr_group_name (group),
2971
                    or1k_spr_register_name (group, index, spr_name) , group,
2972
                    index, (long long unsigned int)new_val, (long long unsigned int)new_val, (long long unsigned int)old_val, (long long unsigned int)old_val);
2973
 
2974
}       /* or1k_spr_command() */
2975
 
2976
 
2977
/*----------------------------------------------------------------------------*/
2978
/*!Main entry point for target architecture initialization
2979
 
2980
   In this version initializes the architecture via
2981
   registers_gdbarch_init(). Add a command to set and show special purpose
2982
   registers. */
2983
/*---------------------------------------------------------------------------*/
2984
 
2985
void
2986
_initialize_or1k_tdep (void)
2987
{
2988
  /* Register this architecture. We should do this for or16 and or64 when
2989
     they have their BFD defined. */
2990
  gdbarch_register (bfd_arch_or32, or1k_gdbarch_init, or1k_dump_tdep);
2991
 
2992
  /* Initialize the automata for the assembler */
2993
  build_automata();
2994
 
2995
  /* Commands to show and set special purpose registers */
2996
  add_info ("spr", or1k_info_spr_command,
2997
            "Show the value of a special purpose register");
2998
  add_com ("spr", class_support, or1k_spr_command,
2999
           "Set a special purpose register");
3000
 
3001
}       /* _initialize_or1k_tdep() */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.