URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [regformats/] [reg-arm.dat] - Blame information for rev 157

Line No.	Rev	Author	Line
1	24	jeremybenn	`name:arm`
2			`expedite:r11,sp,pc`
3			`32:r0`
4			`32:r1`
5			`32:r2`
6			`32:r3`
7			`32:r4`
8			`32:r5`
9			`32:r6`
10			`32:r7`
11			`32:r8`
12			`32:r9`
13			`32:r10`
14			`32:r11`
15			`32:r12`
16			`32:sp`
17			`32:lr`
18			`32:pc`
19			`96:f0`
20			`96:f1`
21			`96:f2`
22			`96:f3`
23			`96:f4`
24			`96:f5`
25			`96:f6`
26			`96:f7`
27			`32:fps`
28			`32:cpsr`