OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [testsuite/] [gdb.mi/] [mi-regs.exp] - Blame information for rev 299

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# Copyright 1999, 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
2
 
3
# This program is free software; you can redistribute it and/or modify
4
# it under the terms of the GNU General Public License as published by
5
# the Free Software Foundation; either version 3 of the License, or
6
# (at your option) any later version.
7
#
8
# This program is distributed in the hope that it will be useful,
9
# but WITHOUT ANY WARRANTY; without even the implied warranty of
10
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
# GNU General Public License for more details.
12
#
13
# You should have received a copy of the GNU General Public License
14
# along with this program.  If not, see .
15
 
16
# Please email any bugs, comments, and/or additions to this file to:
17
# bug-gdb@prep.ai.mit.edu
18
#
19
# Test essential Machine interface (MI) operations
20
#
21
# Verify that, using the MI, we can run a simple program and look at registers.
22
#
23
# The goal is not to test gdb functionality, which is done by other tests,
24
# but to verify the correct output response to MI operations.
25
#
26
 
27
 
28
load_lib mi-support.exp
29
set MIFLAGS "-i=mi"
30
 
31
gdb_exit
32
if [mi_gdb_start] {
33
    continue
34
}
35
 
36
set testfile "basics"
37
set srcfile ${testfile}.c
38
set binfile ${objdir}/${subdir}/${testfile}
39
if  { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {debug additional_flags=-DFAKEARGV}] != "" } {
40
     untested mi-regs.exp
41
     return -1
42
}
43
 
44
proc sparc_register_tests_no_exec { } {
45
        # Test the generic IDT chip.
46
        mi_gdb_test "111-data-list-register-values" \
47
                ".*111\\^error,msg=\"mi_cmd_data_list_register_values: Usage: -data-list-register-values  \\\[...\\\]\"" \
48
                "wrong arguments"
49
 
50
        mi_gdb_test "111-data-list-register-values x" \
51
                ".*111\\^error,msg=\"No registers\.\"" \
52
                "no executable"
53
}
54
 
55
# These tests exercise IDT-specific MIPS registers for several
56
# different processor models.
57
 
58
# This should detect the actual processor in use and change
59
# the expected results appropriately.  FIXME
60
 
61
proc sparc_register_tests { } {
62
    global hex
63
    global decimal
64
    set octal "\[0-7\]+"
65
    set binary "\[0-1\]+"
66
    set float "\\-?((\[0-9\]+(\\.\[0-9\]+)?(e\[-+\]\[0-9\]+)?)|(nan\\($hex\\)))"
67
    set float2 "\\-?\[0-9\]+"
68
 
69
    mi_gdb_test "111-data-list-register-names" \
70
            "111\\^done,register-names=\\\[\"g0\",\"g1\",\"g2\",\"g3\",\"g4\",\"g5\",\"g6\",\"g7\",\"o0\",\"o1\",\"o2\",\"o3\",\"o4\",\"o5\",\"sp\",\"o7\",\"l0\",\"l1\",\"l2\",\"l3\",\"l4\",\"l5\",\"l6\",\"l7\",\"i0\",\"i1\",\"i2\",\"i3\",\"i4\",\"i5\",\"fp\",\"i7\",\"f0\",\"f1\",\"f2\",\"f3\",\"f4\",\"f5\",\"f6\",\"f7\",\"f8\",\"f9\",\"f10\",\"f11\",\"f12\",\"f13\",\"f14\",\"f15\",\"f16\",\"f17\",\"f18\",\"f19\",\"f20\",\"f21\",\"f22\",\"f23\",\"f24\",\"f25\",\"f26\",\"f27\",\"f28\",\"f29\",\"f30\",\"f31\",\"y\",\"psr\",\"wim\",\"tbr\",\"pc\",\"npc\",\"fsr\",\"csr\",\"d0\",\"d2\",\"d4\",\"d6\",\"d8\",\"d10\",\"d12\",\"d14\",\"d16\",\"d18\",\"d20\",\"d22\",\"d24\",\"d26\",\"d28\",\"d30\"\\\]" \
71
            "list register names"
72
 
73
    mi_gdb_test "222-data-list-register-values x" \
74
            "222\\^done,register-values=\\\[\{number=\"0\",value=\"$hex\"\}.*\{number=\"87\",value=\"$hex\"\}\\\]" \
75
            "register values x"
76
 
77
    mi_gdb_test "333-data-list-register-values f" \
78
            "333\\^done,register-values=\\\[\{number=\"0\",value=\"$float\"\},\{number=\"1\",value=\"$float\"\},.*\{number=\"87\",value=\"$float\"\}\\\]" \
79
            "register values f"
80
 
81
    mi_gdb_test "444-data-list-register-values d" \
82
            "444\\^done,register-values=\\\[\{number=\"0\",value=\"-?$decimal\"\}.*\{number=\"87\",value=\"-?$decimal\"\}\\\]" \
83
            "register values d"
84
 
85
    mi_gdb_test "555-data-list-register-values o" \
86
            "555\\^done,register-values=\\\[\{number=\"0\",value=\"$octal\"\}.*\{number=\"87\",value=\"$octal\"\}\\\]" \
87
            "register values o"
88
 
89
    mi_gdb_test "666-data-list-register-values t" \
90
            "666\\^done,register-values=\\\[\{number=\"0\",value=\"$binary\"\}.*\{number=\"87\",value=\"$binary\"\}\\\]" \
91
            "register values t"
92
 
93
    # On the sparc, registers 0-31 are int, 32-63 float, 64-71 int, 72-87 float
94
 
95
    mi_gdb_test "777-data-list-register-values N" \
96
            "777\\^done,register-values=\\\[\{number=\"0\",value=\"-?$decimal\"\}.*\{number=\"31\",value=\"-?$decimal\"\},\{number=\"32\",value=\"$float\"\}.*\{number=\"63\",value=\"$float\"\},\{number=\"64\",value=\"-?$decimal\"\}.*\{number=\"71\",value=\"-?$decimal\"\},\{number=\"72\",value=\"$float\"\}.*\{number=\"87\",value=\"$float\"\}\\\]" \
97
            "register values N"
98
 
99
    mi_gdb_test "888-data-list-register-values r" \
100
            "888\\^done,register-values=\\\[\{number=\"0\",value=\"$hex\"\}.*\{number=\"87\",value=\"$hex\"\}\\\]" \
101
            "register values r"
102
 
103
    mi_gdb_test "999-data-list-register-names 68 69 70 71" \
104
            "999\\^done,register-names=\\\[\"pc\",\"npc\",\"fsr\",\"csr\"\\\]" \
105
            "list names of some regs"
106
 
107
    mi_gdb_test "001-data-list-register-values x 68 69 70 71" \
108
            "001\\^done,register-values=\\\[\{number=\"68\",value=\"$hex\"\},\{number=\"69\",value=\"$hex\"\},\{number=\"70\",value=\"$hex\"\},\{number=\"71\",value=\"$hex\"\}\\\]" \
109
            "list values of some regs"
110
 
111
    mi_gdb_test "002-data-list-changed-registers" \
112
            "002\\^done,changed-registers=\\\[(\"${decimal}\"(,\"${decimal}\")*)?\\\]" \
113
            "list changed registers"
114
}
115
 
116
if [istarget "sparc-*-*"] then {
117
    sparc_register_tests_no_exec
118
    mi_run_to_main
119
    sparc_register_tests
120
} else {
121
    verbose "mi-regs.exp tests ignored for this target"
122
}
123
 
124
mi_gdb_exit
125
return 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.