OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [opcodes/] [avr-dis.c] - Blame information for rev 157

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Disassemble AVR instructions.
2
   Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007
3
   Free Software Foundation, Inc.
4
 
5
   Contributed by Denis Chertykov <denisc@overta.ru>
6
 
7
   This file is part of libopcodes.
8
 
9
   This library is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with this program; if not, write to the Free Software
21
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22
   MA 02110-1301, USA.  */
23
 
24
#include <assert.h>
25
#include "sysdep.h"
26
#include "dis-asm.h"
27
#include "opintl.h"
28
#include "libiberty.h"
29
 
30
struct avr_opcodes_s
31
{
32
  char *name;
33
  char *constraints;
34
  char *opcode;
35
  int insn_size;                /* In words.  */
36
  int isa;
37
  unsigned int bin_opcode;
38
};
39
 
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
 
43
const struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
 
49
static const char * comment_start = "0x";
50
 
51
static int
52
avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
53
             char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
54
{
55
  int ok = 1;
56
  *sym = 0;
57
 
58
  switch (constraint)
59
    {
60
      /* Any register operand.  */
61
    case 'r':
62
      if (regs)
63
        insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
64
      else
65
        insn = (insn & 0x01f0) >> 4; /* Destination register.  */
66
 
67
      sprintf (buf, "r%d", insn);
68
      break;
69
 
70
    case 'd':
71
      if (regs)
72
        sprintf (buf, "r%d", 16 + (insn & 0xf));
73
      else
74
        sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
75
      break;
76
 
77
    case 'w':
78
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
79
      break;
80
 
81
    case 'a':
82
      if (regs)
83
        sprintf (buf, "r%d", 16 + (insn & 7));
84
      else
85
        sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
86
      break;
87
 
88
    case 'v':
89
      if (regs)
90
        sprintf (buf, "r%d", (insn & 0xf) * 2);
91
      else
92
        sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
93
      break;
94
 
95
    case 'e':
96
      {
97
        char *xyz;
98
 
99
        switch (insn & 0x100f)
100
          {
101
            case 0x0000: xyz = "Z";  break;
102
            case 0x1001: xyz = "Z+"; break;
103
            case 0x1002: xyz = "-Z"; break;
104
            case 0x0008: xyz = "Y";  break;
105
            case 0x1009: xyz = "Y+"; break;
106
            case 0x100a: xyz = "-Y"; break;
107
            case 0x100c: xyz = "X";  break;
108
            case 0x100d: xyz = "X+"; break;
109
            case 0x100e: xyz = "-X"; break;
110
            default: xyz = "??"; ok = 0;
111
          }
112
        sprintf (buf, xyz);
113
 
114
        if (AVR_UNDEF_P (insn))
115
          sprintf (comment, _("undefined"));
116
      }
117
      break;
118
 
119
    case 'z':
120
      *buf++ = 'Z';
121
      if (insn & 0x1)
122
        *buf++ = '+';
123
      *buf = '\0';
124
      if (AVR_UNDEF_P (insn))
125
        sprintf (comment, _("undefined"));
126
      break;
127
 
128
    case 'b':
129
      {
130
        unsigned int x;
131
 
132
        x = (insn & 7);
133
        x |= (insn >> 7) & (3 << 3);
134
        x |= (insn >> 8) & (1 << 5);
135
 
136
        if (insn & 0x8)
137
          *buf++ = 'Y';
138
        else
139
          *buf++ = 'Z';
140
        sprintf (buf, "+%d", x);
141
        sprintf (comment, "0x%02x", x);
142
      }
143
      break;
144
 
145
    case 'h':
146
      *sym = 1;
147
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
148
      /* See PR binutils/2454.  Ideally we would like to display the hex
149
         value of the address only once, but this would mean recoding
150
         objdump_print_address() which would affect many targets.  */
151
      sprintf (buf, "%#lx", (unsigned long) *sym_addr);
152
      sprintf (comment, comment_start);
153
      break;
154
 
155
    case 'L':
156
      {
157
        int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
158
        sprintf (buf, ".%+-8d", rel_addr);
159
        *sym = 1;
160
        *sym_addr = pc + 2 + rel_addr;
161
        sprintf (comment, comment_start);
162
      }
163
      break;
164
 
165
    case 'l':
166
      {
167
        int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
168
 
169
        sprintf (buf, ".%+-8d", rel_addr);
170
        *sym = 1;
171
        *sym_addr = pc + 2 + rel_addr;
172
        sprintf (comment, comment_start);
173
      }
174
      break;
175
 
176
    case 'i':
177
      sprintf (buf, "0x%04X", insn2);
178
      break;
179
 
180
    case 'M':
181
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
182
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
183
      break;
184
 
185
    case 'n':
186
      sprintf (buf, "??");
187
      fprintf (stderr, _("Internal disassembler error"));
188
      ok = 0;
189
      break;
190
 
191
    case 'K':
192
      {
193
        unsigned int x;
194
 
195
        x = (insn & 0xf) | ((insn >> 2) & 0x30);
196
        sprintf (buf, "0x%02x", x);
197
        sprintf (comment, "%d", x);
198
      }
199
      break;
200
 
201
    case 's':
202
      sprintf (buf, "%d", insn & 7);
203
      break;
204
 
205
    case 'S':
206
      sprintf (buf, "%d", (insn >> 4) & 7);
207
      break;
208
 
209
    case 'P':
210
      {
211
        unsigned int x;
212
 
213
        x = (insn & 0xf);
214
        x |= (insn >> 5) & 0x30;
215
        sprintf (buf, "0x%02x", x);
216
        sprintf (comment, "%d", x);
217
      }
218
      break;
219
 
220
    case 'p':
221
      {
222
        unsigned int x;
223
 
224
        x = (insn >> 3) & 0x1f;
225
        sprintf (buf, "0x%02x", x);
226
        sprintf (comment, "%d", x);
227
      }
228
      break;
229
 
230
    case '?':
231
      *buf = '\0';
232
      break;
233
 
234
    default:
235
      sprintf (buf, "??");
236
      fprintf (stderr, _("unknown constraint `%c'"), constraint);
237
      ok = 0;
238
    }
239
 
240
    return ok;
241
}
242
 
243
static unsigned short
244
avrdis_opcode (bfd_vma addr, disassemble_info *info)
245
{
246
  bfd_byte buffer[2];
247
  int status;
248
 
249
  status = info->read_memory_func (addr, buffer, 2, info);
250
 
251
  if (status == 0)
252
    return bfd_getl16 (buffer);
253
 
254
  info->memory_error_func (status, addr, info);
255
  return -1;
256
}
257
 
258
 
259
int
260
print_insn_avr (bfd_vma addr, disassemble_info *info)
261
{
262
  unsigned int insn, insn2;
263
  const struct avr_opcodes_s *opcode;
264
  static unsigned int *maskptr;
265
  void *stream = info->stream;
266
  fprintf_ftype prin = info->fprintf_func;
267
  static unsigned int *avr_bin_masks;
268
  static int initialized;
269
  int cmd_len = 2;
270
  int ok = 0;
271
  char op1[20], op2[20], comment1[40], comment2[40];
272
  int sym_op1 = 0, sym_op2 = 0;
273
  bfd_vma sym_addr1, sym_addr2;
274
 
275
 
276
  if (!initialized)
277
    {
278
      unsigned int nopcodes;
279
 
280
      /* PR 4045: Try to avoid duplicating the 0x prefix that
281
         objdump_print_addr() will put on addresses when there
282
         is no symbol table available.  */
283
      if (info->symtab_size == 0)
284
        comment_start = " ";
285
 
286
      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
287
 
288
      avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
289
 
290
      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
291
           opcode->name;
292
           opcode++, maskptr++)
293
        {
294
          char * s;
295
          unsigned int bin = 0;
296
          unsigned int mask = 0;
297
 
298
          for (s = opcode->opcode; *s; ++s)
299
            {
300
              bin <<= 1;
301
              mask <<= 1;
302
              bin |= (*s == '1');
303
              mask |= (*s == '1' || *s == '0');
304
            }
305
          assert (s - opcode->opcode == 16);
306
          assert (opcode->bin_opcode == bin);
307
          *maskptr = mask;
308
        }
309
 
310
      initialized = 1;
311
    }
312
 
313
  insn = avrdis_opcode (addr, info);
314
 
315
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
316
       opcode->name;
317
       opcode++, maskptr++)
318
    if ((insn & *maskptr) == opcode->bin_opcode)
319
      break;
320
 
321
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
322
     `std b+0,r' as `st b,r' (next entry in the table).  */
323
 
324
  if (AVR_DISP0_P (insn))
325
    opcode++;
326
 
327
  op1[0] = 0;
328
  op2[0] = 0;
329
  comment1[0] = 0;
330
  comment2[0] = 0;
331
 
332
  if (opcode->name)
333
    {
334
      char *op = opcode->constraints;
335
 
336
      insn2 = 0;
337
      ok = 1;
338
 
339
      if (opcode->insn_size > 1)
340
        {
341
          insn2 = avrdis_opcode (addr + 2, info);
342
          cmd_len = 4;
343
        }
344
 
345
      if (*op && *op != '?')
346
        {
347
          int regs = REGISTER_P (*op);
348
 
349
          ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
350
 
351
          if (ok && *(++op) == ',')
352
            ok = avr_operand (insn, insn2, addr, *(++op), op2,
353
                              *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
354
        }
355
    }
356
 
357
  if (!ok)
358
    {
359
      /* Unknown opcode, or invalid combination of operands.  */
360
      sprintf (op1, "0x%04x", insn);
361
      op2[0] = 0;
362
      sprintf (comment1, "????");
363
      comment2[0] = 0;
364
    }
365
 
366
  (*prin) (stream, "%s", ok ? opcode->name : ".word");
367
 
368
  if (*op1)
369
      (*prin) (stream, "\t%s", op1);
370
 
371
  if (*op2)
372
    (*prin) (stream, ", %s", op2);
373
 
374
  if (*comment1)
375
    (*prin) (stream, "\t; %s", comment1);
376
 
377
  if (sym_op1)
378
    info->print_address_func (sym_addr1, info);
379
 
380
  if (*comment2)
381
    (*prin) (stream, " %s", comment2);
382
 
383
  if (sym_op2)
384
    info->print_address_func (sym_addr2, info);
385
 
386
  return cmd_len;
387
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.