OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [opcodes/] [disassemble.c] - Blame information for rev 628

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Select disassembly routine for specified architecture.
2
   Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 225 jeremybenn
   2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 24 jeremybenn
 
5
   This file is part of the GNU opcodes library.
6
 
7
   This library is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program; if not, write to the Free Software
19
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20
   MA 02110-1301, USA.  */
21
 
22
#include "sysdep.h"
23
#include "dis-asm.h"
24
 
25
#ifdef ARCH_all
26
#define ARCH_alpha
27
#define ARCH_arc
28
#define ARCH_arm
29
#define ARCH_avr
30
#define ARCH_bfin
31
#define ARCH_cr16
32
#define ARCH_cris
33
#define ARCH_crx
34
#define ARCH_d10v
35
#define ARCH_d30v
36
#define ARCH_dlx
37
#define ARCH_fr30
38
#define ARCH_frv
39
#define ARCH_h8300
40
#define ARCH_h8500
41
#define ARCH_hppa
42
#define ARCH_i370
43
#define ARCH_i386
44
#define ARCH_i860
45
#define ARCH_i960
46
#define ARCH_ia64
47
#define ARCH_ip2k
48
#define ARCH_iq2000
49 225 jeremybenn
#define ARCH_lm32
50 24 jeremybenn
#define ARCH_m32c
51
#define ARCH_m32r
52
#define ARCH_m68hc11
53
#define ARCH_m68hc12
54
#define ARCH_m68k
55
#define ARCH_m88k
56
#define ARCH_maxq
57
#define ARCH_mcore
58
#define ARCH_mep
59 225 jeremybenn
#define ARCH_microblaze
60 24 jeremybenn
#define ARCH_mips
61
#define ARCH_mmix
62
#define ARCH_mn10200
63
#define ARCH_mn10300
64 225 jeremybenn
#define ARCH_moxie
65 24 jeremybenn
#define ARCH_mt
66
#define ARCH_msp430
67
#define ARCH_ns32k
68
#define ARCH_or32
69
#define ARCH_pdp11
70
#define ARCH_pj
71
#define ARCH_powerpc
72
#define ARCH_rs6000
73
#define ARCH_s390
74
#define ARCH_score
75
#define ARCH_sh
76
#define ARCH_sparc
77
#define ARCH_spu
78
#define ARCH_tic30
79
#define ARCH_tic4x
80
#define ARCH_tic54x
81
#define ARCH_tic80
82
#define ARCH_v850
83
#define ARCH_vax
84
#define ARCH_w65
85
#define ARCH_xstormy16
86
#define ARCH_xc16x
87
#define ARCH_xtensa
88
#define ARCH_z80
89
#define ARCH_z8k
90
#define INCLUDE_SHMEDIA
91
#endif
92
 
93
#ifdef ARCH_m32c
94
#include "m32c-desc.h"
95
#endif
96
 
97
disassembler_ftype
98
disassembler (abfd)
99
     bfd *abfd;
100
{
101
  enum bfd_architecture a = bfd_get_arch (abfd);
102
  disassembler_ftype disassemble;
103
 
104
  switch (a)
105
    {
106
      /* If you add a case to this table, also add it to the
107
         ARCH_all definition right above this function.  */
108
#ifdef ARCH_alpha
109
    case bfd_arch_alpha:
110
      disassemble = print_insn_alpha;
111
      break;
112
#endif
113
#ifdef ARCH_arc
114
    case bfd_arch_arc:
115
      {
116
        disassemble = arc_get_disassembler (abfd);
117
        break;
118
      }
119
#endif
120
#ifdef ARCH_arm
121
    case bfd_arch_arm:
122
      if (bfd_big_endian (abfd))
123
        disassemble = print_insn_big_arm;
124
      else
125
        disassemble = print_insn_little_arm;
126
      break;
127
#endif
128
#ifdef ARCH_avr
129
    case bfd_arch_avr:
130
      disassemble = print_insn_avr;
131
      break;
132
#endif
133
#ifdef ARCH_bfin
134
    case bfd_arch_bfin:
135
      disassemble = print_insn_bfin;
136
      break;
137
#endif
138
#ifdef ARCH_cr16
139
    case bfd_arch_cr16:
140
      disassemble = print_insn_cr16;
141
      break;
142
#endif
143
#ifdef ARCH_cris
144
    case bfd_arch_cris:
145
      disassemble = cris_get_disassembler (abfd);
146
      break;
147
#endif
148
#ifdef ARCH_crx
149
    case bfd_arch_crx:
150
      disassemble = print_insn_crx;
151
      break;
152
#endif
153
#ifdef ARCH_d10v
154
    case bfd_arch_d10v:
155
      disassemble = print_insn_d10v;
156
      break;
157
#endif
158
#ifdef ARCH_d30v
159
    case bfd_arch_d30v:
160
      disassemble = print_insn_d30v;
161
      break;
162
#endif
163
#ifdef ARCH_dlx
164
    case bfd_arch_dlx:
165
      /* As far as I know we only handle big-endian DLX objects.  */
166
      disassemble = print_insn_dlx;
167
      break;
168
#endif
169
#ifdef ARCH_h8300
170
    case bfd_arch_h8300:
171
      if (bfd_get_mach (abfd) == bfd_mach_h8300h
172
          || bfd_get_mach (abfd) == bfd_mach_h8300hn)
173
        disassemble = print_insn_h8300h;
174
      else if (bfd_get_mach (abfd) == bfd_mach_h8300s
175
               || bfd_get_mach (abfd) == bfd_mach_h8300sn
176
               || bfd_get_mach (abfd) == bfd_mach_h8300sx
177
               || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
178
        disassemble = print_insn_h8300s;
179
      else
180
        disassemble = print_insn_h8300;
181
      break;
182
#endif
183
#ifdef ARCH_h8500
184
    case bfd_arch_h8500:
185
      disassemble = print_insn_h8500;
186
      break;
187
#endif
188
#ifdef ARCH_hppa
189
    case bfd_arch_hppa:
190
      disassemble = print_insn_hppa;
191
      break;
192
#endif
193
#ifdef ARCH_i370
194
    case bfd_arch_i370:
195
      disassemble = print_insn_i370;
196
      break;
197
#endif
198
#ifdef ARCH_i386
199
    case bfd_arch_i386:
200 225 jeremybenn
    case bfd_arch_l1om:
201 24 jeremybenn
      disassemble = print_insn_i386;
202
      break;
203
#endif
204
#ifdef ARCH_i860
205
    case bfd_arch_i860:
206
      disassemble = print_insn_i860;
207
      break;
208
#endif
209
#ifdef ARCH_i960
210
    case bfd_arch_i960:
211
      disassemble = print_insn_i960;
212
      break;
213
#endif
214
#ifdef ARCH_ia64
215
    case bfd_arch_ia64:
216
      disassemble = print_insn_ia64;
217
      break;
218
#endif
219
#ifdef ARCH_ip2k
220
    case bfd_arch_ip2k:
221
      disassemble = print_insn_ip2k;
222
      break;
223
#endif
224
#ifdef ARCH_fr30
225
    case bfd_arch_fr30:
226
      disassemble = print_insn_fr30;
227
      break;
228
#endif
229 225 jeremybenn
#ifdef ARCH_lm32
230
    case bfd_arch_lm32:
231
      disassemble = print_insn_lm32;
232
      break;
233
#endif
234 24 jeremybenn
#ifdef ARCH_m32r
235
    case bfd_arch_m32r:
236
      disassemble = print_insn_m32r;
237
      break;
238
#endif
239
#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
240
    case bfd_arch_m68hc11:
241
      disassemble = print_insn_m68hc11;
242
      break;
243
    case bfd_arch_m68hc12:
244
      disassemble = print_insn_m68hc12;
245
      break;
246
#endif
247
#ifdef ARCH_m68k
248
    case bfd_arch_m68k:
249
      disassemble = print_insn_m68k;
250
      break;
251
#endif
252
#ifdef ARCH_m88k
253
    case bfd_arch_m88k:
254
      disassemble = print_insn_m88k;
255
      break;
256
#endif
257
#ifdef ARCH_maxq
258
    case bfd_arch_maxq:
259
      disassemble = print_insn_maxq_little;
260
      break;
261
#endif
262
#ifdef ARCH_mt
263
    case bfd_arch_mt:
264
      disassemble = print_insn_mt;
265
      break;
266
#endif
267 225 jeremybenn
#ifdef ARCH_microblaze
268
    case bfd_arch_microblaze:
269
      disassemble = print_insn_microblaze;
270
      break;
271
#endif
272 24 jeremybenn
#ifdef ARCH_msp430
273
    case bfd_arch_msp430:
274
      disassemble = print_insn_msp430;
275
      break;
276
#endif
277
#ifdef ARCH_ns32k
278
    case bfd_arch_ns32k:
279
      disassemble = print_insn_ns32k;
280
      break;
281
#endif
282
#ifdef ARCH_mcore
283
    case bfd_arch_mcore:
284
      disassemble = print_insn_mcore;
285
      break;
286
#endif
287
#ifdef ARCH_mep
288
    case bfd_arch_mep:
289
      disassemble = print_insn_mep;
290
      break;
291
#endif
292
#ifdef ARCH_mips
293
    case bfd_arch_mips:
294
      if (bfd_big_endian (abfd))
295
        disassemble = print_insn_big_mips;
296
      else
297
        disassemble = print_insn_little_mips;
298
      break;
299
#endif
300
#ifdef ARCH_mmix
301
    case bfd_arch_mmix:
302
      disassemble = print_insn_mmix;
303
      break;
304
#endif
305
#ifdef ARCH_mn10200
306
    case bfd_arch_mn10200:
307
      disassemble = print_insn_mn10200;
308
      break;
309
#endif
310
#ifdef ARCH_mn10300
311
    case bfd_arch_mn10300:
312
      disassemble = print_insn_mn10300;
313
      break;
314
#endif
315
#ifdef ARCH_or32
316
    case bfd_arch_or32:
317
      if (bfd_big_endian (abfd))
318
        disassemble = print_insn_big_or32;
319
      else
320
        disassemble = print_insn_little_or32;
321
      break;
322
#endif
323
#ifdef ARCH_pdp11
324
    case bfd_arch_pdp11:
325
      disassemble = print_insn_pdp11;
326
      break;
327
#endif
328
#ifdef ARCH_pj
329
    case bfd_arch_pj:
330
      disassemble = print_insn_pj;
331
      break;
332
#endif
333
#ifdef ARCH_powerpc
334
    case bfd_arch_powerpc:
335
      if (bfd_big_endian (abfd))
336
        disassemble = print_insn_big_powerpc;
337
      else
338
        disassemble = print_insn_little_powerpc;
339
      break;
340
#endif
341
#ifdef ARCH_rs6000
342
    case bfd_arch_rs6000:
343
      if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
344
        disassemble = print_insn_big_powerpc;
345
      else
346
        disassemble = print_insn_rs6000;
347
      break;
348
#endif
349
#ifdef ARCH_s390
350
    case bfd_arch_s390:
351
      disassemble = print_insn_s390;
352
      break;
353
#endif
354
#ifdef ARCH_score
355
    case bfd_arch_score:
356
      if (bfd_big_endian (abfd))
357
        disassemble = print_insn_big_score;
358
      else
359
        disassemble = print_insn_little_score;
360
     break;
361
#endif
362
#ifdef ARCH_sh
363
    case bfd_arch_sh:
364
      disassemble = print_insn_sh;
365
      break;
366
#endif
367
#ifdef ARCH_sparc
368
    case bfd_arch_sparc:
369
      disassemble = print_insn_sparc;
370
      break;
371
#endif
372
#ifdef ARCH_spu
373
    case bfd_arch_spu:
374
      disassemble = print_insn_spu;
375
      break;
376
#endif
377
#ifdef ARCH_tic30
378
    case bfd_arch_tic30:
379
      disassemble = print_insn_tic30;
380
      break;
381
#endif
382
#ifdef ARCH_tic4x
383
    case bfd_arch_tic4x:
384
      disassemble = print_insn_tic4x;
385
      break;
386
#endif
387
#ifdef ARCH_tic54x
388
    case bfd_arch_tic54x:
389
      disassemble = print_insn_tic54x;
390
      break;
391
#endif
392
#ifdef ARCH_tic80
393
    case bfd_arch_tic80:
394
      disassemble = print_insn_tic80;
395
      break;
396
#endif
397
#ifdef ARCH_v850
398
    case bfd_arch_v850:
399
      disassemble = print_insn_v850;
400
      break;
401
#endif
402
#ifdef ARCH_w65
403
    case bfd_arch_w65:
404
      disassemble = print_insn_w65;
405
      break;
406
#endif
407
#ifdef ARCH_xstormy16
408
    case bfd_arch_xstormy16:
409
      disassemble = print_insn_xstormy16;
410
      break;
411
#endif
412
#ifdef ARCH_xc16x
413
    case bfd_arch_xc16x:
414
      disassemble = print_insn_xc16x;
415
      break;
416
#endif
417
#ifdef ARCH_xtensa
418
    case bfd_arch_xtensa:
419
      disassemble = print_insn_xtensa;
420
      break;
421
#endif
422
#ifdef ARCH_z80
423
    case bfd_arch_z80:
424
      disassemble = print_insn_z80;
425
      break;
426
#endif
427
#ifdef ARCH_z8k
428
    case bfd_arch_z8k:
429
      if (bfd_get_mach(abfd) == bfd_mach_z8001)
430
        disassemble = print_insn_z8001;
431
      else
432
        disassemble = print_insn_z8002;
433
      break;
434
#endif
435
#ifdef ARCH_vax
436
    case bfd_arch_vax:
437
      disassemble = print_insn_vax;
438
      break;
439
#endif
440
#ifdef ARCH_frv
441
    case bfd_arch_frv:
442
      disassemble = print_insn_frv;
443
      break;
444
#endif
445 225 jeremybenn
#ifdef ARCH_moxie
446
    case bfd_arch_moxie:
447
      disassemble = print_insn_moxie;
448
      break;
449
#endif
450 24 jeremybenn
#ifdef ARCH_iq2000
451
    case bfd_arch_iq2000:
452
      disassemble = print_insn_iq2000;
453
      break;
454
#endif
455
#ifdef ARCH_m32c
456
    case bfd_arch_m32c:
457
      disassemble = print_insn_m32c;
458
      break;
459
#endif
460
    default:
461
      return 0;
462
    }
463
  return disassemble;
464
}
465
 
466
void
467
disassembler_usage (stream)
468
     FILE * stream ATTRIBUTE_UNUSED;
469
{
470
#ifdef ARCH_arm
471
  print_arm_disassembler_options (stream);
472
#endif
473
#ifdef ARCH_mips
474
  print_mips_disassembler_options (stream);
475
#endif
476
#ifdef ARCH_powerpc
477
  print_ppc_disassembler_options (stream);
478
#endif
479
#ifdef ARCH_i386
480
  print_i386_disassembler_options (stream);
481
#endif
482 225 jeremybenn
#ifdef ARCH_s390
483
  print_s390_disassembler_options (stream);
484
#endif
485 24 jeremybenn
 
486
  return;
487
}
488
 
489
void
490
disassemble_init_for_target (struct disassemble_info * info)
491
{
492
  if (info == NULL)
493
    return;
494
 
495
  switch (info->arch)
496
    {
497
#ifdef ARCH_arm
498
    case bfd_arch_arm:
499
      info->symbol_is_valid = arm_symbol_is_valid;
500
      info->disassembler_needs_relocs = TRUE;
501
      break;
502
#endif
503
#ifdef ARCH_ia64
504
    case bfd_arch_ia64:
505
      info->skip_zeroes = 16;
506
      break;
507
#endif
508
#ifdef ARCH_tic4x
509
    case bfd_arch_tic4x:
510
      info->skip_zeroes = 32;
511
      break;
512
#endif
513
#ifdef ARCH_mep
514
    case bfd_arch_mep:
515
      info->skip_zeroes = 256;
516
      info->skip_zeroes_at_end = 0;
517
      break;
518
#endif
519
#ifdef ARCH_m32c
520
    case bfd_arch_m32c:
521
      info->endian = BFD_ENDIAN_BIG;
522
      if (! info->insn_sets)
523
        {
524
          info->insn_sets = cgen_bitset_create (ISA_MAX);
525
          if (info->mach == bfd_mach_m16c)
526
            cgen_bitset_set (info->insn_sets, ISA_M16C);
527
          else
528
            cgen_bitset_set (info->insn_sets, ISA_M32C);
529
        }
530
      break;
531
#endif
532
    default:
533
      break;
534
    }
535
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.