OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [opcodes/] [ia64-opc-a.c] - Blame information for rev 157

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn 
/* ia64-opc-a.c -- IA-64 `A' opcode table.
2 
   Copyright 1998, 1999, 2000, 2001, 2002, 2004, 2007
3 
   Free Software Foundation, Inc.
4 
   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 
 
6 
   This file is part of the GNU opcodes library.
7 
 
8 
   This library is free software; you can redistribute it and/or modify
9 
   it under the terms of the GNU General Public License as published by
10 
   the Free Software Foundation; either version 3, or (at your option)
11 
   any later version.
12 
 
13 
   It is distributed in the hope that it will be useful, but WITHOUT
14 
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16 
   License for more details.
17 
 
18 
   You should have received a copy of the GNU General Public License
19 
   along with this file; see the file COPYING.  If not, write to the
20 
   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 
   MA 02110-1301, USA.  */
22 
 
23 
#include "ia64-opc.h"
24 
 
25 
#define A       IA64_TYPE_A, 1
26 
#define A2      IA64_TYPE_A, 2
27 
 
28 
/* instruction bit fields: */
29 
#define bC(x)           (((ia64_insn) ((x) & 0x1)) << 12)
30 
#define bImm14(x)       ((((ia64_insn) (((x) >>  0) & 0x7f)) << 13) | \
31 
                         (((ia64_insn) (((x) >>  7) & 0x3f)) << 27) | \
32 
                         (((ia64_insn) (((x) >> 13) & 0x01)) << 36))
33 
#define bR3a(x)         (((ia64_insn) ((x) & 0x7f)) << 20)
34 
#define bR3b(x)         (((ia64_insn) ((x) & 0x3)) << 20)
35 
#define bTa(x)          (((ia64_insn) ((x) & 0x1)) << 33)
36 
#define bTb(x)          (((ia64_insn) ((x) & 0x1)) << 36)
37 
#define bVe(x)          (((ia64_insn) ((x) & 0x1)) << 33)
38 
#define bX(x)           (((ia64_insn) ((x) & 0x1)) << 33)
39 
#define bX2(x)          (((ia64_insn) ((x) & 0x3)) << 34)
40 
#define bX2a(x)         (((ia64_insn) ((x) & 0x3)) << 34)
41 
#define bX2b(x)         (((ia64_insn) ((x) & 0x3)) << 27)
42 
#define bX4(x)          (((ia64_insn) ((x) & 0xf)) << 29)
43 
#define bZa(x)          (((ia64_insn) ((x) & 0x1)) << 36)
44 
#define bZb(x)          (((ia64_insn) ((x) & 0x1)) << 33)
45 
 
46 
/* instruction bit masks: */
47 
#define mC      bC (-1)
48 
#define mImm14  bImm14 (-1)
49 
#define mR3a    bR3a (-1)
50 
#define mR3b    bR3b (-1)
51 
#define mTa     bTa (-1)
52 
#define mTb     bTb (-1)
53 
#define mVe     bVe (-1)
54 
#define mX      bX (-1)
55 
#define mX2     bX2 (-1)
56 
#define mX2a    bX2a (-1)
57 
#define mX2b    bX2b (-1)
58 
#define mX4     bX4 (-1)
59 
#define mZa     bZa (-1)
60 
#define mZb     bZb (-1)
61 
 
62 
#define OpR3b(a,b)              (bOp (a) | bR3b (b)), (mOp | mR3b)
63 
#define OpX2aVe(a,b,c)          (bOp (a) | bX2a (b) | bVe (c)), \
64 
                                (mOp | mX2a | mVe)
65 
#define OpX2aVeR3a(a,b,c,d)     (bOp (a) | bX2a (b) | bVe (c) | bR3a (d)), \
66 
                                (mOp | mX2a | mVe | mR3a)
67 
#define OpX2aVeImm14(a,b,c,d)   (bOp (a) | bX2a (b) | bVe (c) | bImm14 (d)), \
68 
                                (mOp | mX2a | mVe | mImm14)
69 
#define OpX2aVeX4(a,b,c,d)      (bOp (a) | bX2a (b) | bVe (c) | bX4 (d)), \
70 
                                (mOp | mX2a | mVe | mX4)
71 
#define OpX2aVeX4X2b(a,b,c,d,e) \
72 
        (bOp (a) | bX2a (b) | bVe (c) | bX4 (d) | bX2b (e)), \
73 
        (mOp | mX2a | mVe | mX4 | mX2b)
74 
#define OpX2TbTaC(a,b,c,d,e) \
75 
        (bOp (a) | bX2 (b) | bTb (c) | bTa (d) | bC (e)), \
76 
        (mOp | mX2 | mTb | mTa | mC)
77 
#define OpX2TaC(a,b,c,d)        (bOp (a) | bX2 (b) | bTa (c) | bC (d)), \
78 
                                (mOp | mX2 | mTa | mC)
79 
#define OpX2aZaZbX4(a,b,c,d,e) \
80 
        (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e)), \
81 
        (mOp | mX2a | mZa | mZb | mX4)
82 
#define OpX2aZaZbX4X2b(a,b,c,d,e,f) \
83 
        (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e) | bX2b (f)), \
84 
        (mOp | mX2a | mZa | mZb | mX4 | mX2b)
85 
 
86 
/* Used to initialise unused fields in ia64_opcode struct,
87 
   in order to stop gcc from complaining.  */
88 
#define EMPTY 0,0,NULL
89 
 
90 
struct ia64_opcode ia64_opcodes_a[] =
91 
  {
92 
    /* A-type instruction encodings (sorted according to major opcode).  */
93 
 
94 
    {"add",      A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
95 
    {"add",      A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY},
96 
    {"sub",      A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
97 
    {"sub",      A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY},
98 
    {"addp4",    A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY},
99 
    {"and",      A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY},
100 
    {"andcm",    A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY},
101 
    {"or",       A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
102 
    {"xor",      A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY},
103 
    {"shladd",   A, OpX2aVeX4 (8, 0, 0, 4), {R1, R2, CNT2a, R3}, EMPTY},
104 
    {"shladdp4", A, OpX2aVeX4 (8, 0, 0, 6), {R1, R2, CNT2a, R3}, EMPTY},
105 
    {"sub",      A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}, EMPTY},
106 
    {"and",      A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}, EMPTY},
107 
    {"andcm",    A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}, EMPTY},
108 
    {"or",       A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY},
109 
    {"xor",      A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY},
110 
    {"mov",      A, OpX2aVeImm14 (8, 2, 0, 0), {R1, R3}, EMPTY},
111 
    /* A mov immediate pseudo for adds was deleted.  It failed for immediate
112 
       operands requiring relocs, e.g. @pltoff(a).  */
113 
    {"adds",     A, OpX2aVe (8, 2, 0), {R1, IMM14, R3}, EMPTY},
114 
    {"addp4",    A, OpX2aVe (8, 3, 0), {R1, IMM14, R3}, EMPTY},
115 
    {"padd1",            A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
116 
    {"padd2",            A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 0), {R1, R2, R3}, EMPTY},
117 
    {"padd4",            A, OpX2aZaZbX4X2b (8, 1, 1, 0, 0, 0), {R1, R2, R3}, EMPTY},
118 
    {"padd1.sss",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 1), {R1, R2, R3}, EMPTY},
119 
    {"padd2.sss",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 1), {R1, R2, R3}, EMPTY},
120 
    {"padd1.uuu",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 2), {R1, R2, R3}, EMPTY},
121 
    {"padd2.uuu",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 2), {R1, R2, R3}, EMPTY},
122 
    {"padd1.uus",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 3), {R1, R2, R3}, EMPTY},
123 
    {"padd2.uus",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 3), {R1, R2, R3}, EMPTY},
124 
    {"psub1",            A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 0), {R1, R2, R3}, EMPTY},
125 
    {"psub2",            A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 0), {R1, R2, R3}, EMPTY},
126 
    {"psub4",            A, OpX2aZaZbX4X2b (8, 1, 1, 0, 1, 0), {R1, R2, R3}, EMPTY},
127 
    {"psub1.sss",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
128 
    {"psub2.sss",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 1), {R1, R2, R3}, EMPTY},
129 
    {"psub1.uuu",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 2), {R1, R2, R3}, EMPTY},
130 
    {"psub2.uuu",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 2), {R1, R2, R3}, EMPTY},
131 
    {"psub1.uus",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 3), {R1, R2, R3}, EMPTY},
132 
    {"psub2.uus",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 3), {R1, R2, R3}, EMPTY},
133 
    {"pavg1",            A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 2), {R1, R2, R3}, EMPTY},
134 
    {"pavg2",            A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 2), {R1, R2, R3}, EMPTY},
135 
    {"pavg1.raz",        A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 3), {R1, R2, R3}, EMPTY},
136 
    {"pavg2.raz",        A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 3), {R1, R2, R3}, EMPTY},
137 
    {"pavgsub1",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
138 
    {"pavgsub2",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 3, 2), {R1, R2, R3}, EMPTY},
139 
    {"pcmp1.eq",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 0), {R1, R2, R3}, EMPTY},
140 
    {"pcmp2.eq",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 0), {R1, R2, R3}, EMPTY},
141 
    {"pcmp4.eq",         A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 0), {R1, R2, R3}, EMPTY},
142 
    {"pcmp1.gt",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 1), {R1, R2, R3}, EMPTY},
143 
    {"pcmp2.gt",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 1), {R1, R2, R3}, EMPTY},
144 
    {"pcmp4.gt",         A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 1), {R1, R2, R3}, EMPTY},
145 
    {"pshladd2",         A, OpX2aZaZbX4 (8, 1, 0, 1, 4), {R1, R2, CNT2b, R3}, EMPTY},
146 
    {"pshradd2",         A, OpX2aZaZbX4 (8, 1, 0, 1, 6), {R1, R2, CNT2b, R3}, EMPTY},
147 
 
148 
    {"mov",              A, OpR3b (9, 0), {R1, IMM22}, PSEUDO, 0, NULL},
149 
    {"addl",             A, Op    (9),    {R1, IMM22, R3_2}, EMPTY},
150 
 
151 
    {"cmp.lt",           A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
152 
    {"cmp.le",           A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
153 
    {"cmp.gt",           A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
154 
    {"cmp.ge",           A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
155 
    {"cmp.lt.unc",       A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
156 
    {"cmp.le.unc",       A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
157 
    {"cmp.gt.unc",       A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
158 
    {"cmp.ge.unc",       A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
159 
    {"cmp.eq.and",       A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
160 
    {"cmp.ne.andcm",     A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
161 
    {"cmp.ne.and",       A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
162 
    {"cmp.eq.andcm",     A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
163 
    {"cmp4.lt",          A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
164 
    {"cmp4.le",          A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
165 
    {"cmp4.gt",          A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
166 
    {"cmp4.ge",          A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
167 
    {"cmp4.lt.unc",      A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
168 
    {"cmp4.le.unc",      A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
169 
    {"cmp4.gt.unc",      A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
170 
    {"cmp4.ge.unc",      A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
171 
    {"cmp4.eq.and",      A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
172 
    {"cmp4.ne.andcm",    A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
173 
    {"cmp4.ne.and",      A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
174 
    {"cmp4.eq.andcm",    A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
175 
    {"cmp.gt.and",       A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
176 
    {"cmp.lt.and",       A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
177 
    {"cmp.le.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
178 
    {"cmp.ge.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
179 
    {"cmp.le.and",       A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
180 
    {"cmp.ge.and",       A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
181 
    {"cmp.gt.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
182 
    {"cmp.lt.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
183 
    {"cmp.ge.and",       A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
184 
    {"cmp.le.and",       A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
185 
    {"cmp.lt.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
186 
    {"cmp.gt.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
187 
    {"cmp.lt.and",       A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
188 
    {"cmp.gt.and",       A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
189 
    {"cmp.ge.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
190 
    {"cmp.le.andcm",     A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
191 
    {"cmp4.gt.and",      A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
192 
    {"cmp4.lt.and",      A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
193 
    {"cmp4.le.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
194 
    {"cmp4.ge.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
195 
    {"cmp4.le.and",      A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
196 
    {"cmp4.ge.and",      A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
197 
    {"cmp4.gt.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
198 
    {"cmp4.lt.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
199 
    {"cmp4.ge.and",      A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
200 
    {"cmp4.le.and",      A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
201 
    {"cmp4.lt.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
202 
    {"cmp4.gt.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
203 
    {"cmp4.lt.and",      A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
204 
    {"cmp4.gt.and",      A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
205 
    {"cmp4.ge.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
206 
    {"cmp4.le.andcm",    A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
207 
    {"cmp.lt",           A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
208 
    {"cmp.le",           A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
209 
    {"cmp.gt",           A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
210 
    {"cmp.ge",           A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
211 
    {"cmp.lt.unc",       A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
212 
    {"cmp.le.unc",       A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
213 
    {"cmp.gt.unc",       A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
214 
    {"cmp.ge.unc",       A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
215 
    {"cmp.eq.and",       A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
216 
    {"cmp.ne.andcm",     A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
217 
    {"cmp.ne.and",       A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
218 
    {"cmp.eq.andcm",     A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
219 
    {"cmp4.lt",          A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
220 
    {"cmp4.le",          A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
221 
    {"cmp4.gt",          A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
222 
    {"cmp4.ge",          A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
223 
    {"cmp4.lt.unc",      A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
224 
    {"cmp4.le.unc",      A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
225 
    {"cmp4.gt.unc",      A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
226 
    {"cmp4.ge.unc",      A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
227 
    {"cmp4.eq.and",      A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
228 
    {"cmp4.ne.andcm",    A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
229 
    {"cmp4.ne.and",      A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
230 
    {"cmp4.eq.andcm",    A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
231 
    {"cmp.ltu",          A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
232 
    {"cmp.leu",          A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
233 
    {"cmp.gtu",          A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
234 
    {"cmp.geu",          A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
235 
    {"cmp.ltu.unc",      A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
236 
    {"cmp.leu.unc",      A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
237 
    {"cmp.gtu.unc",      A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
238 
    {"cmp.geu.unc",      A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
239 
    {"cmp.eq.or",        A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
240 
    {"cmp.ne.orcm",      A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
241 
    {"cmp.ne.or",        A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
242 
    {"cmp.eq.orcm",      A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
243 
    {"cmp4.ltu",         A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
244 
    {"cmp4.leu",         A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
245 
    {"cmp4.gtu",         A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
246 
    {"cmp4.geu",         A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
247 
    {"cmp4.ltu.unc",     A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
248 
    {"cmp4.leu.unc",     A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
249 
    {"cmp4.gtu.unc",     A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
250 
    {"cmp4.geu.unc",     A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
251 
    {"cmp4.eq.or",       A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
252 
    {"cmp4.ne.orcm",     A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
253 
    {"cmp4.ne.or",       A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
254 
    {"cmp4.eq.orcm",     A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
255 
    {"cmp.gt.or",        A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
256 
    {"cmp.lt.or",        A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
257 
    {"cmp.le.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
258 
    {"cmp.ge.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
259 
    {"cmp.le.or",        A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
260 
    {"cmp.ge.or",        A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
261 
    {"cmp.gt.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
262 
    {"cmp.lt.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
263 
    {"cmp.ge.or",        A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
264 
    {"cmp.le.or",        A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
265 
    {"cmp.lt.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
266 
    {"cmp.gt.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
267 
    {"cmp.lt.or",        A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
268 
    {"cmp.gt.or",        A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
269 
    {"cmp.ge.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
270 
    {"cmp.le.orcm",      A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
271 
    {"cmp4.gt.or",       A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
272 
    {"cmp4.lt.or",       A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
273 
    {"cmp4.le.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
274 
    {"cmp4.ge.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
275 
    {"cmp4.le.or",       A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
276 
    {"cmp4.ge.or",       A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
277 
    {"cmp4.gt.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
278 
    {"cmp4.lt.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
279 
    {"cmp4.ge.or",       A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
280 
    {"cmp4.le.or",       A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
281 
    {"cmp4.lt.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
282 
    {"cmp4.gt.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
283 
    {"cmp4.lt.or",       A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
284 
    {"cmp4.gt.or",       A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
285 
    {"cmp4.ge.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
286 
    {"cmp4.le.orcm",     A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
287 
    {"cmp.ltu",          A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
288 
    {"cmp.leu",          A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8M1U8, R3}, EMPTY},
289 
    {"cmp.gtu",          A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8M1U8, R3}, EMPTY},
290 
    {"cmp.geu",          A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
291 
    {"cmp.ltu.unc",      A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
292 
    {"cmp.leu.unc",      A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8M1U8, R3}, EMPTY},
293 
    {"cmp.gtu.unc",      A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8M1U8, R3}, EMPTY},
294 
    {"cmp.geu.unc",      A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
295 
    {"cmp.eq.or",        A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
296 
    {"cmp.ne.orcm",      A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
297 
    {"cmp.ne.or",        A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
298 
    {"cmp.eq.orcm",      A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
299 
    {"cmp4.ltu",         A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8U4, R3}, EMPTY},
300 
    {"cmp4.leu",         A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8M1U4, R3}, EMPTY},
301 
    {"cmp4.gtu",         A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8M1U4, R3}, EMPTY},
302 
    {"cmp4.geu",         A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8U4, R3}, EMPTY},
303 
    {"cmp4.ltu.unc",     A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8U4, R3}, EMPTY},
304 
    {"cmp4.leu.unc",     A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8M1U4, R3}, EMPTY},
305 
    {"cmp4.gtu.unc",     A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8M1U4, R3}, EMPTY},
306 
    {"cmp4.geu.unc",     A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8U4, R3}, EMPTY},
307 
    {"cmp4.eq.or",       A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
308 
    {"cmp4.ne.orcm",     A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
309 
    {"cmp4.ne.or",       A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
310 
    {"cmp4.eq.orcm",     A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
311 
    {"cmp.eq",           A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
312 
    {"cmp.ne",           A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
313 
    {"cmp.eq.unc",       A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
314 
    {"cmp.ne.unc",       A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
315 
    {"cmp.eq.or.andcm",  A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
316 
    {"cmp.ne.and.orcm",  A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
317 
    {"cmp.ne.or.andcm",  A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
318 
    {"cmp.eq.and.orcm",  A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
319 
    {"cmp4.eq",          A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
320 
    {"cmp4.ne",          A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
321 
    {"cmp4.eq.unc",      A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
322 
    {"cmp4.ne.unc",      A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
323 
    {"cmp4.eq.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
324 
    {"cmp4.ne.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
325 
    {"cmp4.ne.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
326 
    {"cmp4.eq.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
327 
    {"cmp.gt.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
328 
    {"cmp.lt.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
329 
    {"cmp.le.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
330 
    {"cmp.ge.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
331 
    {"cmp.le.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
332 
    {"cmp.ge.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
333 
    {"cmp.gt.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
334 
    {"cmp.lt.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
335 
    {"cmp.ge.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
336 
    {"cmp.le.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
337 
    {"cmp.lt.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
338 
    {"cmp.gt.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
339 
    {"cmp.lt.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
340 
    {"cmp.gt.or.andcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
341 
    {"cmp.ge.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
342 
    {"cmp.le.and.orcm",  A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
343 
    {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
344 
    {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
345 
    {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
346 
    {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
347 
    {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
348 
    {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
349 
    {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
350 
    {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
351 
    {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
352 
    {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
353 
    {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
354 
    {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
355 
    {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
356 
    {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
357 
    {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
358 
    {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
359 
    {"cmp.eq",           A2, OpX2TaC   (0xe, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
360 
    {"cmp.ne",           A2, OpX2TaC   (0xe, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
361 
    {"cmp.eq.unc",       A2, OpX2TaC   (0xe, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
362 
    {"cmp.ne.unc",       A2, OpX2TaC   (0xe, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
363 
    {"cmp.eq.or.andcm",  A2, OpX2TaC   (0xe, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
364 
    {"cmp.ne.and.orcm",  A2, OpX2TaC   (0xe, 2, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
365 
    {"cmp.ne.or.andcm",  A2, OpX2TaC   (0xe, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
366 
    {"cmp.eq.and.orcm",  A2, OpX2TaC   (0xe, 2, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
367 
    {"cmp4.eq",          A2, OpX2TaC   (0xe, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
368 
    {"cmp4.ne",          A2, OpX2TaC   (0xe, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
369 
    {"cmp4.eq.unc",      A2, OpX2TaC   (0xe, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
370 
    {"cmp4.ne.unc",      A2, OpX2TaC   (0xe, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
371 
    {"cmp4.eq.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
372 
    {"cmp4.ne.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
373 
    {"cmp4.ne.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
374 
    {"cmp4.eq.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
375 
 
376 
    {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
377 
  };
378 
 
379 
#undef A
380 
#undef A2
381 
#undef bC
382 
#undef bImm14
383 
#undef bR3a
384 
#undef bR3b
385 
#undef bTa
386 
#undef bTb
387 
#undef bVe
388 
#undef bX
389 
#undef bX2
390 
#undef bX2a
391 
#undef bX2b
392 
#undef bX4
393 
#undef bZa
394 
#undef bZb
395 
#undef mC
396 
#undef mImm14
397 
#undef mR3a
398 
#undef mR3b
399 
#undef mTa
400 
#undef mTb
401 
#undef mVe
402 
#undef mX
403 
#undef mX2
404 
#undef mX2a
405 
#undef mX2b
406 
#undef mX4
407 
#undef mZa
408 
#undef mZb
409 
#undef OpR3a
410 
#undef OpR3b
411 
#undef OpX2aVe
412 
#undef OpX2aVeImm14
413 
#undef OpX2aVeX4
414 
#undef OpX2aVeX4X2b
415 
#undef OpX2TbTaC
416 
#undef OpX2TaC
417 
#undef OpX2aZaZbX4
418 
#undef OpX2aZaZbX4X2b
419 
#undef EMPTY

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.