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jeremybenn |
/* Instruction opcode header for mep.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2007 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef MEP_OPC_H
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#define MEP_OPC_H
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/* -- opc.h */
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#undef CGEN_DIS_HASH_SIZE
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#define CGEN_DIS_HASH_SIZE 1
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#undef CGEN_DIS_HASH
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#define CGEN_DIS_HASH(buffer, insn) 0
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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typedef struct
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{
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char * name;
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int config_enum;
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unsigned cpu_flag;
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int big_endian;
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int vliw_bits;
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CGEN_ATTR_VALUE_BITSET_TYPE cop16_isa;
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CGEN_ATTR_VALUE_BITSET_TYPE cop32_isa;
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CGEN_ATTR_VALUE_BITSET_TYPE cop48_isa;
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CGEN_ATTR_VALUE_BITSET_TYPE cop64_isa;
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CGEN_ATTR_VALUE_BITSET_TYPE cop_isa;
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CGEN_ATTR_VALUE_BITSET_TYPE core_isa;
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unsigned int option_mask;
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} mep_config_map_struct;
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extern mep_config_map_struct mep_config_map[];
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extern int mep_config_index;
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extern void init_mep_all_core_isas_mask (void);
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extern void init_mep_all_cop_isas_mask (void);
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extern CGEN_ATTR_VALUE_BITSET_TYPE mep_cop_isa (void);
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#define MEP_CONFIG (mep_config_map[mep_config_index].config_enum)
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#define MEP_CPU (mep_config_map[mep_config_index].cpu_flag)
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#define MEP_OMASK (mep_config_map[mep_config_index].option_mask)
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#define MEP_VLIW (mep_config_map[mep_config_index].vliw_bits > 0)
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#define MEP_VLIW32 (mep_config_map[mep_config_index].vliw_bits == 32)
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#define MEP_VLIW64 (mep_config_map[mep_config_index].vliw_bits == 64)
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#define MEP_COP16_ISA (mep_config_map[mep_config_index].cop16_isa)
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#define MEP_COP32_ISA (mep_config_map[mep_config_index].cop32_isa)
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#define MEP_COP48_ISA (mep_config_map[mep_config_index].cop48_isa)
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#define MEP_COP64_ISA (mep_config_map[mep_config_index].cop64_isa)
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#define MEP_COP_ISA (mep_config_map[mep_config_index].cop_isa)
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#define MEP_CORE_ISA (mep_config_map[mep_config_index].core_isa)
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extern int mep_insn_supported_by_isa (const CGEN_INSN *, CGEN_ATTR_VALUE_BITSET_TYPE *);
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/* A mask for all ISAs executed by the core. */
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#define MEP_ALL_CORE_ISAS_MASK mep_all_core_isas_mask
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extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask;
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#define MEP_INSN_CORE_P(insn) ( \
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init_mep_all_core_isas_mask (), \
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mep_insn_supported_by_isa (insn, & MEP_ALL_CORE_ISAS_MASK) \
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)
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/* A mask for all ISAs executed by a VLIW coprocessor. */
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#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask
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extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
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#define MEP_INSN_COP_P(insn) ( \
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init_mep_all_cop_isas_mask (), \
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mep_insn_supported_by_isa (insn, & MEP_ALL_COP_ISAS_MASK) \
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)
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extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
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/* -- asm.c */
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/* Enum declaration for mep instruction types. */
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typedef enum cgen_insn_type {
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MEP_INSN_INVALID, MEP_INSN_SB, MEP_INSN_SH, MEP_INSN_SW
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, MEP_INSN_LB, MEP_INSN_LH, MEP_INSN_LW, MEP_INSN_LBU
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, MEP_INSN_LHU, MEP_INSN_SW_SP, MEP_INSN_LW_SP, MEP_INSN_SB_TP
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, MEP_INSN_SH_TP, MEP_INSN_SW_TP, MEP_INSN_LB_TP, MEP_INSN_LH_TP
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, MEP_INSN_LW_TP, MEP_INSN_LBU_TP, MEP_INSN_LHU_TP, MEP_INSN_SB16
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, MEP_INSN_SH16, MEP_INSN_SW16, MEP_INSN_LB16, MEP_INSN_LH16
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, MEP_INSN_LW16, MEP_INSN_LBU16, MEP_INSN_LHU16, MEP_INSN_SW24
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, MEP_INSN_LW24, MEP_INSN_EXTB, MEP_INSN_EXTH, MEP_INSN_EXTUB
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, MEP_INSN_EXTUH, MEP_INSN_SSARB, MEP_INSN_MOV, MEP_INSN_MOVI8
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, MEP_INSN_MOVI16, MEP_INSN_MOVU24, MEP_INSN_MOVU16, MEP_INSN_MOVH
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, MEP_INSN_ADD3, MEP_INSN_ADD, MEP_INSN_ADD3I, MEP_INSN_ADVCK3
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, MEP_INSN_SUB, MEP_INSN_SBVCK3, MEP_INSN_NEG, MEP_INSN_SLT3
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, MEP_INSN_SLTU3, MEP_INSN_SLT3I, MEP_INSN_SLTU3I, MEP_INSN_SL1AD3
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, MEP_INSN_SL2AD3, MEP_INSN_ADD3X, MEP_INSN_SLT3X, MEP_INSN_SLTU3X
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, MEP_INSN_OR, MEP_INSN_AND, MEP_INSN_XOR, MEP_INSN_NOR
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, MEP_INSN_OR3, MEP_INSN_AND3, MEP_INSN_XOR3, MEP_INSN_SRA
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, MEP_INSN_SRL, MEP_INSN_SLL, MEP_INSN_SRAI, MEP_INSN_SRLI
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, MEP_INSN_SLLI, MEP_INSN_SLL3, MEP_INSN_FSFT, MEP_INSN_BRA
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, MEP_INSN_BEQZ, MEP_INSN_BNEZ, MEP_INSN_BEQI, MEP_INSN_BNEI
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, MEP_INSN_BLTI, MEP_INSN_BGEI, MEP_INSN_BEQ, MEP_INSN_BNE
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, MEP_INSN_BSR12, MEP_INSN_BSR24, MEP_INSN_JMP, MEP_INSN_JMP24
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, MEP_INSN_JSR, MEP_INSN_RET, MEP_INSN_REPEAT, MEP_INSN_EREPEAT
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, MEP_INSN_STC_LP, MEP_INSN_STC_HI, MEP_INSN_STC_LO, MEP_INSN_STC
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, MEP_INSN_LDC_LP, MEP_INSN_LDC_HI, MEP_INSN_LDC_LO, MEP_INSN_LDC
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, MEP_INSN_DI, MEP_INSN_EI, MEP_INSN_RETI, MEP_INSN_HALT
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, MEP_INSN_SLEEP, MEP_INSN_SWI, MEP_INSN_BREAK, MEP_INSN_SYNCM
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, MEP_INSN_STCB, MEP_INSN_LDCB, MEP_INSN_BSETM, MEP_INSN_BCLRM
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, MEP_INSN_BNOTM, MEP_INSN_BTSTM, MEP_INSN_TAS, MEP_INSN_CACHE
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, MEP_INSN_MUL, MEP_INSN_MULU, MEP_INSN_MULR, MEP_INSN_MULRU
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, MEP_INSN_MADD, MEP_INSN_MADDU, MEP_INSN_MADDR, MEP_INSN_MADDRU
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, MEP_INSN_DIV, MEP_INSN_DIVU, MEP_INSN_DRET, MEP_INSN_DBREAK
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, MEP_INSN_LDZ, MEP_INSN_ABS, MEP_INSN_AVE, MEP_INSN_MIN
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, MEP_INSN_MAX, MEP_INSN_MINU, MEP_INSN_MAXU, MEP_INSN_CLIP
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, MEP_INSN_CLIPU, MEP_INSN_SADD, MEP_INSN_SSUB, MEP_INSN_SADDU
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, MEP_INSN_SSUBU, MEP_INSN_SWCP, MEP_INSN_LWCP, MEP_INSN_SMCP
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, MEP_INSN_LMCP, MEP_INSN_SWCPI, MEP_INSN_LWCPI, MEP_INSN_SMCPI
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, MEP_INSN_LMCPI, MEP_INSN_SWCP16, MEP_INSN_LWCP16, MEP_INSN_SMCP16
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, MEP_INSN_LMCP16, MEP_INSN_SBCPA, MEP_INSN_LBCPA, MEP_INSN_SHCPA
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, MEP_INSN_LHCPA, MEP_INSN_SWCPA, MEP_INSN_LWCPA, MEP_INSN_SMCPA
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, MEP_INSN_LMCPA, MEP_INSN_SBCPM0, MEP_INSN_LBCPM0, MEP_INSN_SHCPM0
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, MEP_INSN_LHCPM0, MEP_INSN_SWCPM0, MEP_INSN_LWCPM0, MEP_INSN_SMCPM0
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, MEP_INSN_LMCPM0, MEP_INSN_SBCPM1, MEP_INSN_LBCPM1, MEP_INSN_SHCPM1
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, MEP_INSN_LHCPM1, MEP_INSN_SWCPM1, MEP_INSN_LWCPM1, MEP_INSN_SMCPM1
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, MEP_INSN_LMCPM1, MEP_INSN_BCPEQ, MEP_INSN_BCPNE, MEP_INSN_BCPAT
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, MEP_INSN_BCPAF, MEP_INSN_SYNCCP, MEP_INSN_JSRV, MEP_INSN_BSRV
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, MEP_INSN_SIM_SYSCALL, MEP_INSN_RI_0, MEP_INSN_RI_1, MEP_INSN_RI_2
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, MEP_INSN_RI_3, MEP_INSN_RI_4, MEP_INSN_RI_5, MEP_INSN_RI_6
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, MEP_INSN_RI_7, MEP_INSN_RI_8, MEP_INSN_RI_9, MEP_INSN_RI_10
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, MEP_INSN_RI_11, MEP_INSN_RI_12, MEP_INSN_RI_13, MEP_INSN_RI_14
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, MEP_INSN_RI_15, MEP_INSN_RI_17, MEP_INSN_RI_20, MEP_INSN_RI_21
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, MEP_INSN_RI_22, MEP_INSN_RI_23, MEP_INSN_RI_24, MEP_INSN_RI_25
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, MEP_INSN_RI_26, MEP_INSN_RI_16, MEP_INSN_RI_18, MEP_INSN_RI_19
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, MEP_INSN_FADDS, MEP_INSN_FSUBS, MEP_INSN_FMULS, MEP_INSN_FDIVS
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, MEP_INSN_FSQRTS, MEP_INSN_FABSS, MEP_INSN_FNEGS, MEP_INSN_FMOVS
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, MEP_INSN_FROUNDWS, MEP_INSN_FTRUNCWS, MEP_INSN_FCEILWS, MEP_INSN_FFLOORWS
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, MEP_INSN_FCVTWS, MEP_INSN_FCVTSW, MEP_INSN_FCMPFS, MEP_INSN_FCMPUS
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, MEP_INSN_FCMPES, MEP_INSN_FCMPUES, MEP_INSN_FCMPLS, MEP_INSN_FCMPULS
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, MEP_INSN_FCMPLES, MEP_INSN_FCMPULES, MEP_INSN_FCMPFIS, MEP_INSN_FCMPUIS
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, MEP_INSN_FCMPEIS, MEP_INSN_FCMPUEIS, MEP_INSN_FCMPLIS, MEP_INSN_FCMPULIS
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, MEP_INSN_FCMPLEIS, MEP_INSN_FCMPULEIS, MEP_INSN_CMOV_FRN_RM, MEP_INSN_CMOV_RM_FRN
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, MEP_INSN_CMOVC_CCRN_RM, MEP_INSN_CMOVC_RM_CCRN
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} CGEN_INSN_TYPE;
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/* Index of `invalid' insn place holder. */
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#define CGEN_INSN_INVALID MEP_INSN_INVALID
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/* Total number of insns in table. */
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#define MAX_INSNS ((int) MEP_INSN_CMOVC_RM_CCRN + 1)
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/* This struct records data prior to insertion or after extraction. */
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struct cgen_fields
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{
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int length;
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long f_nil;
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long f_anyof;
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long f_major;
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long f_rn;
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long f_rn3;
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long f_rm;
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long f_rl;
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long f_sub2;
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long f_sub3;
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long f_sub4;
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long f_ext;
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| 183 |
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long f_crn;
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long f_csrn_hi;
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| 185 |
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long f_csrn_lo;
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| 186 |
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long f_csrn;
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| 187 |
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long f_crnx_hi;
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| 188 |
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long f_crnx_lo;
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long f_crnx;
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| 190 |
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long f_0;
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| 191 |
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long f_1;
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| 192 |
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long f_2;
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| 193 |
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long f_3;
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| 194 |
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long f_4;
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| 195 |
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long f_5;
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| 196 |
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long f_6;
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| 197 |
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long f_7;
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| 198 |
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long f_8;
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| 199 |
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long f_9;
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| 200 |
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long f_10;
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| 201 |
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long f_11;
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| 202 |
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long f_12;
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| 203 |
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long f_13;
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| 204 |
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long f_14;
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| 205 |
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long f_15;
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| 206 |
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long f_16;
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| 207 |
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long f_17;
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| 208 |
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long f_18;
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| 209 |
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long f_19;
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| 210 |
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long f_20;
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| 211 |
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long f_21;
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| 212 |
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long f_22;
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| 213 |
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long f_23;
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| 214 |
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long f_24;
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| 215 |
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long f_25;
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| 216 |
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long f_26;
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| 217 |
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long f_27;
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| 218 |
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long f_28;
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| 219 |
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long f_29;
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| 220 |
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long f_30;
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| 221 |
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long f_31;
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| 222 |
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long f_8s8a2;
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| 223 |
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long f_12s4a2;
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| 224 |
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long f_17s16a2;
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| 225 |
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long f_24s5a2n_hi;
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| 226 |
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long f_24s5a2n_lo;
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| 227 |
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long f_24s5a2n;
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| 228 |
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long f_24u5a2n_hi;
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| 229 |
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long f_24u5a2n_lo;
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| 230 |
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long f_24u5a2n;
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| 231 |
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long f_2u6;
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| 232 |
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long f_7u9;
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| 233 |
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long f_7u9a2;
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| 234 |
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long f_7u9a4;
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| 235 |
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long f_16s16;
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| 236 |
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long f_2u10;
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| 237 |
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long f_3u5;
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| 238 |
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long f_4u8;
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| 239 |
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long f_5u8;
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| 240 |
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long f_5u24;
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| 241 |
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long f_6s8;
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| 242 |
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long f_8s8;
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| 243 |
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long f_16u16;
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| 244 |
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long f_12u16;
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| 245 |
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long f_3u29;
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| 246 |
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long f_8s24;
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| 247 |
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long f_8s24a2;
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| 248 |
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long f_8s24a4;
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| 249 |
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long f_8s24a8;
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| 250 |
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long f_24u8a4n_hi;
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| 251 |
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long f_24u8a4n_lo;
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| 252 |
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long f_24u8a4n;
|
| 253 |
|
|
long f_24u8n_hi;
|
| 254 |
|
|
long f_24u8n_lo;
|
| 255 |
|
|
long f_24u8n;
|
| 256 |
|
|
long f_24u4n_hi;
|
| 257 |
|
|
long f_24u4n_lo;
|
| 258 |
|
|
long f_24u4n;
|
| 259 |
|
|
long f_callnum;
|
| 260 |
|
|
long f_ccrn_hi;
|
| 261 |
|
|
long f_ccrn_lo;
|
| 262 |
|
|
long f_ccrn;
|
| 263 |
|
|
long f_fmax_0_4;
|
| 264 |
|
|
long f_fmax_4_4;
|
| 265 |
|
|
long f_fmax_8_4;
|
| 266 |
|
|
long f_fmax_12_4;
|
| 267 |
|
|
long f_fmax_16_4;
|
| 268 |
|
|
long f_fmax_20_4;
|
| 269 |
|
|
long f_fmax_24_4;
|
| 270 |
|
|
long f_fmax_28_1;
|
| 271 |
|
|
long f_fmax_29_1;
|
| 272 |
|
|
long f_fmax_30_1;
|
| 273 |
|
|
long f_fmax_31_1;
|
| 274 |
|
|
long f_fmax_frd;
|
| 275 |
|
|
long f_fmax_frn;
|
| 276 |
|
|
long f_fmax_frm;
|
| 277 |
|
|
long f_fmax_rm;
|
| 278 |
|
|
};
|
| 279 |
|
|
|
| 280 |
|
|
#define CGEN_INIT_PARSE(od) \
|
| 281 |
|
|
{\
|
| 282 |
|
|
}
|
| 283 |
|
|
#define CGEN_INIT_INSERT(od) \
|
| 284 |
|
|
{\
|
| 285 |
|
|
}
|
| 286 |
|
|
#define CGEN_INIT_EXTRACT(od) \
|
| 287 |
|
|
{\
|
| 288 |
|
|
}
|
| 289 |
|
|
#define CGEN_INIT_PRINT(od) \
|
| 290 |
|
|
{\
|
| 291 |
|
|
}
|
| 292 |
|
|
|
| 293 |
|
|
|
| 294 |
|
|
#endif /* MEP_OPC_H */
|
