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jeremybenn |
/* Instruction opcode table for openrisc.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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225 |
jeremybenn |
Copyright 1996-2009 Free Software Foundation, Inc.
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24 |
jeremybenn |
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include "sysdep.h"
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "openrisc-desc.h"
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#include "openrisc-opc.h"
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#include "libiberty.h"
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/* -- opc.c */
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/* -- */
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/* The hash functions are recorded here to help keep assembler code out of
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the disassembler and vice versa. */
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static int asm_hash_insn_p (const CGEN_INSN *);
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static unsigned int asm_hash_insn (const char *);
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static int dis_hash_insn_p (const CGEN_INSN *);
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static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
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/* Instruction formats. */
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#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
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#define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
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#else
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#define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
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#endif
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static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
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0, 0, 0x0, { { 0 } }
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};
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static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_ABS26) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED = {
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32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_bal ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_DISP26) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_mfsr ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_mtsr ATTRIBUTE_UNUSED = {
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32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_I16_1) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_lw ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R3) }, { F (F_I16NC) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = {
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32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_3) }, { F (F_OP6) }, { F (F_F_4_1) }, { F (F_OP7) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00ffe0, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_F_15_8) }, { F (F_OP6) }, { F (F_UIMM5) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_add ATTRIBUTE_UNUSED = {
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32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_7) }, { F (F_OP7) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_addi ATTRIBUTE_UNUSED = {
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32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_LO16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED = {
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32, 32, 0xffe007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_11) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED = {
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32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_l_sfgtui ATTRIBUTE_UNUSED = {
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32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
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};
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#undef F
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#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
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#define A(a) (1 << CGEN_INSN_##a)
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#else
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#define A(a) (1 << CGEN_INSN_/**/a)
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#endif
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#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
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#define OPERAND(op) OPENRISC_OPERAND_##op
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#else
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#define OPERAND(op) OPENRISC_OPERAND_/**/op
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#endif
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#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
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#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
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/* The instruction table. */
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static const CGEN_OPCODE openrisc_cgen_insn_opcode_table[MAX_INSNS] =
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{
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/* Special null first entry.
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A `num' value of zero is thus invalid.
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Also, the special `invalid' insn resides here. */
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{ { 0, 0, 0, 0 }, {{0}}, 0, {0}},
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/* l.j ${abs-26} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (ABS_26), 0 } },
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& ifmt_l_j, { 0x0 }
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},
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/* l.jal ${abs-26} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (ABS_26), 0 } },
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& ifmt_l_j, { 0x4000000 }
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},
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/* l.jr $rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RA), 0 } },
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& ifmt_l_jr, { 0x14000000 }
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},
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/* l.jalr $rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RA), 0 } },
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& ifmt_l_jr, { 0x14200000 }
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},
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/* l.bal ${disp-26} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (DISP_26), 0 } },
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& ifmt_l_bal, { 0x8000000 }
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},
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/* l.bnf ${disp-26} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (DISP_26), 0 } },
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& ifmt_l_bal, { 0xc000000 }
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},
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/* l.bf ${disp-26} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (DISP_26), 0 } },
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& ifmt_l_bal, { 0x10000000 }
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},
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/* l.brk ${uimm-16} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (UIMM_16), 0 } },
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& ifmt_l_jr, { 0x17000000 }
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},
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/* l.rfe $rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RA), 0 } },
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& ifmt_l_jr, { 0x14400000 }
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},
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/* l.sys ${uimm-16} */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (UIMM_16), 0 } },
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& ifmt_l_jr, { 0x16000000 }
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},
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/* l.nop */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, 0 } },
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& ifmt_l_jr, { 0x15000000 }
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},
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/* l.movhi $rD,$hi16 */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RD), ',', OP (HI16), 0 } },
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& ifmt_l_movhi, { 0x18000000 }
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},
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/* l.mfsr $rD,$rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
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& ifmt_l_mfsr, { 0x1c000000 }
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},
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/* l.mtsr $rA,$rB */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
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& ifmt_l_mtsr, { 0x40000000 }
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},
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/* l.lw $rD,${simm-16}($rA) */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
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& ifmt_l_lw, { 0x80000000 }
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},
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/* l.lbz $rD,${simm-16}($rA) */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
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& ifmt_l_lw, { 0x84000000 }
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| 232 |
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},
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| 233 |
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/* l.lbs $rD,${simm-16}($rA) */
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{
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| 235 |
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
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| 237 |
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& ifmt_l_lw, { 0x88000000 }
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| 238 |
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},
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| 239 |
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/* l.lhz $rD,${simm-16}($rA) */
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| 240 |
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{
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| 241 |
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{ 0, 0, 0, 0 },
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| 242 |
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{ { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
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| 243 |
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& ifmt_l_lw, { 0x8c000000 }
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| 244 |
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},
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| 245 |
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/* l.lhs $rD,${simm-16}($rA) */
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| 246 |
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{
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| 247 |
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{ 0, 0, 0, 0 },
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| 248 |
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{ { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
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| 249 |
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& ifmt_l_lw, { 0x90000000 }
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| 250 |
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},
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| 251 |
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/* l.sw ${ui16nc}($rA),$rB */
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| 252 |
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{
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| 253 |
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{ 0, 0, 0, 0 },
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| 254 |
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{ { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
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| 255 |
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& ifmt_l_sw, { 0xd4000000 }
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| 256 |
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},
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| 257 |
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/* l.sb ${ui16nc}($rA),$rB */
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| 258 |
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{
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| 259 |
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{ 0, 0, 0, 0 },
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| 260 |
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{ { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
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| 261 |
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& ifmt_l_sw, { 0xd8000000 }
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| 262 |
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},
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| 263 |
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/* l.sh ${ui16nc}($rA),$rB */
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| 264 |
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{
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| 265 |
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{ 0, 0, 0, 0 },
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| 266 |
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{ { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
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| 267 |
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& ifmt_l_sw, { 0xdc000000 }
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| 268 |
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},
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| 269 |
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/* l.sll $rD,$rA,$rB */
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| 270 |
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{
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| 271 |
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{ 0, 0, 0, 0 },
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| 272 |
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{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
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| 273 |
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& ifmt_l_sll, { 0xe0000008 }
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| 274 |
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},
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| 275 |
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/* l.slli $rD,$rA,${uimm-5} */
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| 276 |
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{
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| 277 |
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{ 0, 0, 0, 0 },
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| 278 |
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{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
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| 279 |
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& ifmt_l_slli, { 0xb4000000 }
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| 280 |
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},
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| 281 |
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/* l.srl $rD,$rA,$rB */
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| 282 |
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{
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| 283 |
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{ 0, 0, 0, 0 },
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| 284 |
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{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
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| 285 |
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& ifmt_l_sll, { 0xe0000028 }
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| 286 |
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},
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| 287 |
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/* l.srli $rD,$rA,${uimm-5} */
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| 288 |
|
|
{
|
| 289 |
|
|
{ 0, 0, 0, 0 },
|
| 290 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
|
| 291 |
|
|
& ifmt_l_slli, { 0xb4000020 }
|
| 292 |
|
|
},
|
| 293 |
|
|
/* l.sra $rD,$rA,$rB */
|
| 294 |
|
|
{
|
| 295 |
|
|
{ 0, 0, 0, 0 },
|
| 296 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 297 |
|
|
& ifmt_l_sll, { 0xe0000048 }
|
| 298 |
|
|
},
|
| 299 |
|
|
/* l.srai $rD,$rA,${uimm-5} */
|
| 300 |
|
|
{
|
| 301 |
|
|
{ 0, 0, 0, 0 },
|
| 302 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
|
| 303 |
|
|
& ifmt_l_slli, { 0xb4000040 }
|
| 304 |
|
|
},
|
| 305 |
|
|
/* l.ror $rD,$rA,$rB */
|
| 306 |
|
|
{
|
| 307 |
|
|
{ 0, 0, 0, 0 },
|
| 308 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 309 |
|
|
& ifmt_l_sll, { 0xe0000088 }
|
| 310 |
|
|
},
|
| 311 |
|
|
/* l.rori $rD,$rA,${uimm-5} */
|
| 312 |
|
|
{
|
| 313 |
|
|
{ 0, 0, 0, 0 },
|
| 314 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
|
| 315 |
|
|
& ifmt_l_slli, { 0xb4000080 }
|
| 316 |
|
|
},
|
| 317 |
|
|
/* l.add $rD,$rA,$rB */
|
| 318 |
|
|
{
|
| 319 |
|
|
{ 0, 0, 0, 0 },
|
| 320 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 321 |
|
|
& ifmt_l_add, { 0xe0000000 }
|
| 322 |
|
|
},
|
| 323 |
|
|
/* l.addi $rD,$rA,$lo16 */
|
| 324 |
|
|
{
|
| 325 |
|
|
{ 0, 0, 0, 0 },
|
| 326 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 327 |
|
|
& ifmt_l_addi, { 0x94000000 }
|
| 328 |
|
|
},
|
| 329 |
|
|
/* l.sub $rD,$rA,$rB */
|
| 330 |
|
|
{
|
| 331 |
|
|
{ 0, 0, 0, 0 },
|
| 332 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 333 |
|
|
& ifmt_l_add, { 0xe0000002 }
|
| 334 |
|
|
},
|
| 335 |
|
|
/* l.subi $rD,$rA,$lo16 */
|
| 336 |
|
|
{
|
| 337 |
|
|
{ 0, 0, 0, 0 },
|
| 338 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 339 |
|
|
& ifmt_l_addi, { 0x9c000000 }
|
| 340 |
|
|
},
|
| 341 |
|
|
/* l.and $rD,$rA,$rB */
|
| 342 |
|
|
{
|
| 343 |
|
|
{ 0, 0, 0, 0 },
|
| 344 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 345 |
|
|
& ifmt_l_add, { 0xe0000003 }
|
| 346 |
|
|
},
|
| 347 |
|
|
/* l.andi $rD,$rA,$lo16 */
|
| 348 |
|
|
{
|
| 349 |
|
|
{ 0, 0, 0, 0 },
|
| 350 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 351 |
|
|
& ifmt_l_addi, { 0xa0000000 }
|
| 352 |
|
|
},
|
| 353 |
|
|
/* l.or $rD,$rA,$rB */
|
| 354 |
|
|
{
|
| 355 |
|
|
{ 0, 0, 0, 0 },
|
| 356 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 357 |
|
|
& ifmt_l_add, { 0xe0000004 }
|
| 358 |
|
|
},
|
| 359 |
|
|
/* l.ori $rD,$rA,$lo16 */
|
| 360 |
|
|
{
|
| 361 |
|
|
{ 0, 0, 0, 0 },
|
| 362 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 363 |
|
|
& ifmt_l_addi, { 0xa4000000 }
|
| 364 |
|
|
},
|
| 365 |
|
|
/* l.xor $rD,$rA,$rB */
|
| 366 |
|
|
{
|
| 367 |
|
|
{ 0, 0, 0, 0 },
|
| 368 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 369 |
|
|
& ifmt_l_add, { 0xe0000005 }
|
| 370 |
|
|
},
|
| 371 |
|
|
/* l.xori $rD,$rA,$lo16 */
|
| 372 |
|
|
{
|
| 373 |
|
|
{ 0, 0, 0, 0 },
|
| 374 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 375 |
|
|
& ifmt_l_addi, { 0xa8000000 }
|
| 376 |
|
|
},
|
| 377 |
|
|
/* l.mul $rD,$rA,$rB */
|
| 378 |
|
|
{
|
| 379 |
|
|
{ 0, 0, 0, 0 },
|
| 380 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 381 |
|
|
& ifmt_l_add, { 0xe0000006 }
|
| 382 |
|
|
},
|
| 383 |
|
|
/* l.muli $rD,$rA,$lo16 */
|
| 384 |
|
|
{
|
| 385 |
|
|
{ 0, 0, 0, 0 },
|
| 386 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
|
| 387 |
|
|
& ifmt_l_addi, { 0xac000000 }
|
| 388 |
|
|
},
|
| 389 |
|
|
/* l.div $rD,$rA,$rB */
|
| 390 |
|
|
{
|
| 391 |
|
|
{ 0, 0, 0, 0 },
|
| 392 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 393 |
|
|
& ifmt_l_add, { 0xe0000009 }
|
| 394 |
|
|
},
|
| 395 |
|
|
/* l.divu $rD,$rA,$rB */
|
| 396 |
|
|
{
|
| 397 |
|
|
{ 0, 0, 0, 0 },
|
| 398 |
|
|
{ { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
|
| 399 |
|
|
& ifmt_l_add, { 0xe000000a }
|
| 400 |
|
|
},
|
| 401 |
|
|
/* l.sfgts $rA,$rB */
|
| 402 |
|
|
{
|
| 403 |
|
|
{ 0, 0, 0, 0 },
|
| 404 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 405 |
|
|
& ifmt_l_sfgts, { 0xe4c00000 }
|
| 406 |
|
|
},
|
| 407 |
|
|
/* l.sfgtu $rA,$rB */
|
| 408 |
|
|
{
|
| 409 |
|
|
{ 0, 0, 0, 0 },
|
| 410 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 411 |
|
|
& ifmt_l_sfgts, { 0xe4400000 }
|
| 412 |
|
|
},
|
| 413 |
|
|
/* l.sfges $rA,$rB */
|
| 414 |
|
|
{
|
| 415 |
|
|
{ 0, 0, 0, 0 },
|
| 416 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 417 |
|
|
& ifmt_l_sfgts, { 0xe4e00000 }
|
| 418 |
|
|
},
|
| 419 |
|
|
/* l.sfgeu $rA,$rB */
|
| 420 |
|
|
{
|
| 421 |
|
|
{ 0, 0, 0, 0 },
|
| 422 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 423 |
|
|
& ifmt_l_sfgts, { 0xe4600000 }
|
| 424 |
|
|
},
|
| 425 |
|
|
/* l.sflts $rA,$rB */
|
| 426 |
|
|
{
|
| 427 |
|
|
{ 0, 0, 0, 0 },
|
| 428 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 429 |
|
|
& ifmt_l_sfgts, { 0xe5000000 }
|
| 430 |
|
|
},
|
| 431 |
|
|
/* l.sfltu $rA,$rB */
|
| 432 |
|
|
{
|
| 433 |
|
|
{ 0, 0, 0, 0 },
|
| 434 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 435 |
|
|
& ifmt_l_sfgts, { 0xe4800000 }
|
| 436 |
|
|
},
|
| 437 |
|
|
/* l.sfles $rA,$rB */
|
| 438 |
|
|
{
|
| 439 |
|
|
{ 0, 0, 0, 0 },
|
| 440 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 441 |
|
|
& ifmt_l_sfgts, { 0xe5200000 }
|
| 442 |
|
|
},
|
| 443 |
|
|
/* l.sfleu $rA,$rB */
|
| 444 |
|
|
{
|
| 445 |
|
|
{ 0, 0, 0, 0 },
|
| 446 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 447 |
|
|
& ifmt_l_sfgts, { 0xe4a00000 }
|
| 448 |
|
|
},
|
| 449 |
|
|
/* l.sfgtsi $rA,${simm-16} */
|
| 450 |
|
|
{
|
| 451 |
|
|
{ 0, 0, 0, 0 },
|
| 452 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 453 |
|
|
& ifmt_l_sfgtsi, { 0xb8c00000 }
|
| 454 |
|
|
},
|
| 455 |
|
|
/* l.sfgtui $rA,${uimm-16} */
|
| 456 |
|
|
{
|
| 457 |
|
|
{ 0, 0, 0, 0 },
|
| 458 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
|
| 459 |
|
|
& ifmt_l_sfgtui, { 0xb8400000 }
|
| 460 |
|
|
},
|
| 461 |
|
|
/* l.sfgesi $rA,${simm-16} */
|
| 462 |
|
|
{
|
| 463 |
|
|
{ 0, 0, 0, 0 },
|
| 464 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 465 |
|
|
& ifmt_l_sfgtsi, { 0xb8e00000 }
|
| 466 |
|
|
},
|
| 467 |
|
|
/* l.sfgeui $rA,${uimm-16} */
|
| 468 |
|
|
{
|
| 469 |
|
|
{ 0, 0, 0, 0 },
|
| 470 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
|
| 471 |
|
|
& ifmt_l_sfgtui, { 0xb8600000 }
|
| 472 |
|
|
},
|
| 473 |
|
|
/* l.sfltsi $rA,${simm-16} */
|
| 474 |
|
|
{
|
| 475 |
|
|
{ 0, 0, 0, 0 },
|
| 476 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 477 |
|
|
& ifmt_l_sfgtsi, { 0xb9000000 }
|
| 478 |
|
|
},
|
| 479 |
|
|
/* l.sfltui $rA,${uimm-16} */
|
| 480 |
|
|
{
|
| 481 |
|
|
{ 0, 0, 0, 0 },
|
| 482 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
|
| 483 |
|
|
& ifmt_l_sfgtui, { 0xb8800000 }
|
| 484 |
|
|
},
|
| 485 |
|
|
/* l.sflesi $rA,${simm-16} */
|
| 486 |
|
|
{
|
| 487 |
|
|
{ 0, 0, 0, 0 },
|
| 488 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 489 |
|
|
& ifmt_l_sfgtsi, { 0xb9200000 }
|
| 490 |
|
|
},
|
| 491 |
|
|
/* l.sfleui $rA,${uimm-16} */
|
| 492 |
|
|
{
|
| 493 |
|
|
{ 0, 0, 0, 0 },
|
| 494 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
|
| 495 |
|
|
& ifmt_l_sfgtui, { 0xb8a00000 }
|
| 496 |
|
|
},
|
| 497 |
|
|
/* l.sfeq $rA,$rB */
|
| 498 |
|
|
{
|
| 499 |
|
|
{ 0, 0, 0, 0 },
|
| 500 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 501 |
|
|
& ifmt_l_sfgts, { 0xe4000000 }
|
| 502 |
|
|
},
|
| 503 |
|
|
/* l.sfeqi $rA,${simm-16} */
|
| 504 |
|
|
{
|
| 505 |
|
|
{ 0, 0, 0, 0 },
|
| 506 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 507 |
|
|
& ifmt_l_sfgtsi, { 0xb8000000 }
|
| 508 |
|
|
},
|
| 509 |
|
|
/* l.sfne $rA,$rB */
|
| 510 |
|
|
{
|
| 511 |
|
|
{ 0, 0, 0, 0 },
|
| 512 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
|
| 513 |
|
|
& ifmt_l_sfgts, { 0xe4200000 }
|
| 514 |
|
|
},
|
| 515 |
|
|
/* l.sfnei $rA,${simm-16} */
|
| 516 |
|
|
{
|
| 517 |
|
|
{ 0, 0, 0, 0 },
|
| 518 |
|
|
{ { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
|
| 519 |
|
|
& ifmt_l_sfgtsi, { 0xb8200000 }
|
| 520 |
|
|
},
|
| 521 |
|
|
};
|
| 522 |
|
|
|
| 523 |
|
|
#undef A
|
| 524 |
|
|
#undef OPERAND
|
| 525 |
|
|
#undef MNEM
|
| 526 |
|
|
#undef OP
|
| 527 |
|
|
|
| 528 |
|
|
/* Formats for ALIAS macro-insns. */
|
| 529 |
|
|
|
| 530 |
|
|
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
|
| 531 |
|
|
#define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
|
| 532 |
|
|
#else
|
| 533 |
|
|
#define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
|
| 534 |
|
|
#endif
|
| 535 |
|
|
static const CGEN_IFMT ifmt_l_ret ATTRIBUTE_UNUSED = {
|
| 536 |
|
|
32, 32, 0xffffffff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
|
| 537 |
|
|
};
|
| 538 |
|
|
|
| 539 |
|
|
#undef F
|
| 540 |
|
|
|
| 541 |
|
|
/* Each non-simple macro entry points to an array of expansion possibilities. */
|
| 542 |
|
|
|
| 543 |
|
|
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
|
| 544 |
|
|
#define A(a) (1 << CGEN_INSN_##a)
|
| 545 |
|
|
#else
|
| 546 |
|
|
#define A(a) (1 << CGEN_INSN_/**/a)
|
| 547 |
|
|
#endif
|
| 548 |
|
|
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
|
| 549 |
|
|
#define OPERAND(op) OPENRISC_OPERAND_##op
|
| 550 |
|
|
#else
|
| 551 |
|
|
#define OPERAND(op) OPENRISC_OPERAND_/**/op
|
| 552 |
|
|
#endif
|
| 553 |
|
|
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
|
| 554 |
|
|
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
|
| 555 |
|
|
|
| 556 |
|
|
/* The macro instruction table. */
|
| 557 |
|
|
|
| 558 |
|
|
static const CGEN_IBASE openrisc_cgen_macro_insn_table[] =
|
| 559 |
|
|
{
|
| 560 |
|
|
/* l.ret */
|
| 561 |
|
|
{
|
| 562 |
|
|
-1, "l-ret", "l.ret", 32,
|
| 563 |
|
|
{ 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
|
| 564 |
|
|
},
|
| 565 |
|
|
};
|
| 566 |
|
|
|
| 567 |
|
|
/* The macro instruction opcode table. */
|
| 568 |
|
|
|
| 569 |
|
|
static const CGEN_OPCODE openrisc_cgen_macro_insn_opcode_table[] =
|
| 570 |
|
|
{
|
| 571 |
|
|
/* l.ret */
|
| 572 |
|
|
{
|
| 573 |
|
|
{ 0, 0, 0, 0 },
|
| 574 |
|
|
{ { MNEM, 0 } },
|
| 575 |
|
|
& ifmt_l_ret, { 0x140b0000 }
|
| 576 |
|
|
},
|
| 577 |
|
|
};
|
| 578 |
|
|
|
| 579 |
|
|
#undef A
|
| 580 |
|
|
#undef OPERAND
|
| 581 |
|
|
#undef MNEM
|
| 582 |
|
|
#undef OP
|
| 583 |
|
|
|
| 584 |
|
|
#ifndef CGEN_ASM_HASH_P
|
| 585 |
|
|
#define CGEN_ASM_HASH_P(insn) 1
|
| 586 |
|
|
#endif
|
| 587 |
|
|
|
| 588 |
|
|
#ifndef CGEN_DIS_HASH_P
|
| 589 |
|
|
#define CGEN_DIS_HASH_P(insn) 1
|
| 590 |
|
|
#endif
|
| 591 |
|
|
|
| 592 |
|
|
/* Return non-zero if INSN is to be added to the hash table.
|
| 593 |
|
|
Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
|
| 594 |
|
|
|
| 595 |
|
|
static int
|
| 596 |
|
|
asm_hash_insn_p (insn)
|
| 597 |
|
|
const CGEN_INSN *insn ATTRIBUTE_UNUSED;
|
| 598 |
|
|
{
|
| 599 |
|
|
return CGEN_ASM_HASH_P (insn);
|
| 600 |
|
|
}
|
| 601 |
|
|
|
| 602 |
|
|
static int
|
| 603 |
|
|
dis_hash_insn_p (insn)
|
| 604 |
|
|
const CGEN_INSN *insn;
|
| 605 |
|
|
{
|
| 606 |
|
|
/* If building the hash table and the NO-DIS attribute is present,
|
| 607 |
|
|
ignore. */
|
| 608 |
|
|
if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
|
| 609 |
|
|
return 0;
|
| 610 |
|
|
return CGEN_DIS_HASH_P (insn);
|
| 611 |
|
|
}
|
| 612 |
|
|
|
| 613 |
|
|
#ifndef CGEN_ASM_HASH
|
| 614 |
|
|
#define CGEN_ASM_HASH_SIZE 127
|
| 615 |
|
|
#ifdef CGEN_MNEMONIC_OPERANDS
|
| 616 |
|
|
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
|
| 617 |
|
|
#else
|
| 618 |
|
|
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
|
| 619 |
|
|
#endif
|
| 620 |
|
|
#endif
|
| 621 |
|
|
|
| 622 |
|
|
/* It doesn't make much sense to provide a default here,
|
| 623 |
|
|
but while this is under development we do.
|
| 624 |
|
|
BUFFER is a pointer to the bytes of the insn, target order.
|
| 625 |
|
|
VALUE is the first base_insn_bitsize bits as an int in host order. */
|
| 626 |
|
|
|
| 627 |
|
|
#ifndef CGEN_DIS_HASH
|
| 628 |
|
|
#define CGEN_DIS_HASH_SIZE 256
|
| 629 |
|
|
#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
|
| 630 |
|
|
#endif
|
| 631 |
|
|
|
| 632 |
|
|
/* The result is the hash value of the insn.
|
| 633 |
|
|
Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
|
| 634 |
|
|
|
| 635 |
|
|
static unsigned int
|
| 636 |
|
|
asm_hash_insn (mnem)
|
| 637 |
|
|
const char * mnem;
|
| 638 |
|
|
{
|
| 639 |
|
|
return CGEN_ASM_HASH (mnem);
|
| 640 |
|
|
}
|
| 641 |
|
|
|
| 642 |
|
|
/* BUF is a pointer to the bytes of the insn, target order.
|
| 643 |
|
|
VALUE is the first base_insn_bitsize bits as an int in host order. */
|
| 644 |
|
|
|
| 645 |
|
|
static unsigned int
|
| 646 |
|
|
dis_hash_insn (buf, value)
|
| 647 |
|
|
const char * buf ATTRIBUTE_UNUSED;
|
| 648 |
|
|
CGEN_INSN_INT value ATTRIBUTE_UNUSED;
|
| 649 |
|
|
{
|
| 650 |
|
|
return CGEN_DIS_HASH (buf, value);
|
| 651 |
|
|
}
|
| 652 |
|
|
|
| 653 |
|
|
/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
|
| 654 |
|
|
|
| 655 |
|
|
static void
|
| 656 |
|
|
set_fields_bitsize (CGEN_FIELDS *fields, int size)
|
| 657 |
|
|
{
|
| 658 |
|
|
CGEN_FIELDS_BITSIZE (fields) = size;
|
| 659 |
|
|
}
|
| 660 |
|
|
|
| 661 |
|
|
/* Function to call before using the operand instance table.
|
| 662 |
|
|
This plugs the opcode entries and macro instructions into the cpu table. */
|
| 663 |
|
|
|
| 664 |
|
|
void
|
| 665 |
|
|
openrisc_cgen_init_opcode_table (CGEN_CPU_DESC cd)
|
| 666 |
|
|
{
|
| 667 |
|
|
int i;
|
| 668 |
|
|
int num_macros = (sizeof (openrisc_cgen_macro_insn_table) /
|
| 669 |
|
|
sizeof (openrisc_cgen_macro_insn_table[0]));
|
| 670 |
|
|
const CGEN_IBASE *ib = & openrisc_cgen_macro_insn_table[0];
|
| 671 |
|
|
const CGEN_OPCODE *oc = & openrisc_cgen_macro_insn_opcode_table[0];
|
| 672 |
|
|
CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
|
| 673 |
|
|
|
| 674 |
225 |
jeremybenn |
/* This test has been added to avoid a warning generated
|
| 675 |
|
|
if memset is called with a third argument of value zero. */
|
| 676 |
|
|
if (num_macros >= 1)
|
| 677 |
|
|
memset (insns, 0, num_macros * sizeof (CGEN_INSN));
|
| 678 |
24 |
jeremybenn |
for (i = 0; i < num_macros; ++i)
|
| 679 |
|
|
{
|
| 680 |
|
|
insns[i].base = &ib[i];
|
| 681 |
|
|
insns[i].opcode = &oc[i];
|
| 682 |
|
|
openrisc_cgen_build_insn_regex (& insns[i]);
|
| 683 |
|
|
}
|
| 684 |
|
|
cd->macro_insn_table.init_entries = insns;
|
| 685 |
|
|
cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
|
| 686 |
|
|
cd->macro_insn_table.num_init_entries = num_macros;
|
| 687 |
|
|
|
| 688 |
|
|
oc = & openrisc_cgen_insn_opcode_table[0];
|
| 689 |
|
|
insns = (CGEN_INSN *) cd->insn_table.init_entries;
|
| 690 |
|
|
for (i = 0; i < MAX_INSNS; ++i)
|
| 691 |
|
|
{
|
| 692 |
|
|
insns[i].opcode = &oc[i];
|
| 693 |
|
|
openrisc_cgen_build_insn_regex (& insns[i]);
|
| 694 |
|
|
}
|
| 695 |
|
|
|
| 696 |
|
|
cd->sizeof_fields = sizeof (CGEN_FIELDS);
|
| 697 |
|
|
cd->set_fields_bitsize = set_fields_bitsize;
|
| 698 |
|
|
|
| 699 |
|
|
cd->asm_hash_p = asm_hash_insn_p;
|
| 700 |
|
|
cd->asm_hash = asm_hash_insn;
|
| 701 |
|
|
cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
|
| 702 |
|
|
|
| 703 |
|
|
cd->dis_hash_p = dis_hash_insn_p;
|
| 704 |
|
|
cd->dis_hash = dis_hash_insn;
|
| 705 |
|
|
cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
|
| 706 |
|
|
}
|