OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [arm/] [armos.h] - Blame information for rev 438

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/*  armos.h -- ARMulator OS definitions:  ARM6 Instruction Emulator.
2
    Copyright (C) 1994 Advanced RISC Machines Ltd.
3
 
4
    This program is free software; you can redistribute it and/or modify
5
    it under the terms of the GNU General Public License as published by
6
    the Free Software Foundation; either version 2 of the License, or
7
    (at your option) any later version.
8
 
9
    This program is distributed in the hope that it will be useful,
10
    but WITHOUT ANY WARRANTY; without even the implied warranty of
11
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
    GNU General Public License for more details.
13
 
14
    You should have received a copy of the GNU General Public License
15
    along with this program; if not, write to the Free Software
16
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
17
 
18
/* Define the initial layout of memory.  */
19
 
20
#define ADDRSUPERSTACK          0x800L  /* Supervisor stack space.  */
21
#define ADDRUSERSTACK           0x80000L/* Default user stack start.  */
22
#define ADDRSOFTVECTORS         0x840L  /* Soft vectors are here.  */
23
#define ADDRCMDLINE             0xf00L  /* Command line is here after a SWI GetEnv.  */
24
#define ADDRSOFHANDLERS         0xad0L  /* Address and workspace for installed handlers.  */
25
#define SOFTVECTORCODE          0xb80L  /* Default handlers.  */
26
 
27
/* SWI numbers.  */
28
 
29
#define SWI_WriteC                 0x0
30
#define SWI_Write0                 0x2
31
#define SWI_ReadC                  0x4
32
#define SWI_CLI                    0x5
33
#define SWI_GetEnv                 0x10
34
#define SWI_Exit                   0x11
35
#define SWI_EnterOS                0x16
36
 
37
#define SWI_GetErrno               0x60
38
#define SWI_Clock                  0x61
39
#define SWI_Time                   0x63
40
#define SWI_Remove                 0x64
41
#define SWI_Rename                 0x65
42
#define SWI_Open                   0x66
43
 
44
#define SWI_Close                  0x68
45
#define SWI_Write                  0x69
46
#define SWI_Read                   0x6a
47
#define SWI_Seek                   0x6b
48
#define SWI_Flen                   0x6c
49
 
50
#define SWI_IsTTY                  0x6e
51
#define SWI_TmpNam                 0x6f
52
#define SWI_InstallHandler         0x70
53
#define SWI_GenerateError          0x71
54
 
55
#define SWI_Breakpoint             0x180000     /* See gdb's tm-arm.h  */
56
 
57
#define AngelSWI_ARM               0x123456
58
#define AngelSWI_Thumb             0xAB
59
 
60
/* The reason codes:  */
61
#define AngelSWI_Reason_Open            0x01
62
#define AngelSWI_Reason_Close           0x02
63
#define AngelSWI_Reason_WriteC          0x03
64
#define AngelSWI_Reason_Write0          0x04
65
#define AngelSWI_Reason_Write           0x05
66
#define AngelSWI_Reason_Read            0x06
67
#define AngelSWI_Reason_ReadC           0x07
68
#define AngelSWI_Reason_IsTTY           0x09
69
#define AngelSWI_Reason_Seek            0x0A
70
#define AngelSWI_Reason_FLen            0x0C
71
#define AngelSWI_Reason_TmpNam          0x0D
72
#define AngelSWI_Reason_Remove          0x0E
73
#define AngelSWI_Reason_Rename          0x0F
74
#define AngelSWI_Reason_Clock           0x10
75
#define AngelSWI_Reason_Time            0x11
76
#define AngelSWI_Reason_System          0x12
77
#define AngelSWI_Reason_Errno           0x13
78
#define AngelSWI_Reason_GetCmdLine      0x15
79
#define AngelSWI_Reason_HeapInfo        0x16
80
#define AngelSWI_Reason_EnterSVC        0x17
81
#define AngelSWI_Reason_ReportException 0x18
82
#define ADP_Stopped_ApplicationExit     ((2 << 16) + 38)
83
#define ADP_Stopped_RunTimeError        ((2 << 16) + 35)
84
 
85
/* Floating Point Emulator address space.  */
86
#define FPESTART         0x2000L
87
#define FPEEND           0x8000L
88
#define FPEOLDVECT       FPESTART + 0x100L + 8L * 16L + 4L      /* Stack + 8 regs + fpsr.  */
89
#define FPENEWVECT(addr) 0xea000000L + ((addr) >> 2) - 3L       /* Branch from 4 to 0x2400.  */
90
 
91
extern unsigned long fpecode[];
92
extern unsigned long fpesize;
93
 
94
extern int SWI_vector_installed;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.