OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [common/] [sim-engine.c] - Blame information for rev 280

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Generic simulator halt/restart.
2
   Copyright (C) 1997, 1998, 2007, 2008 Free Software Foundation, Inc.
3
   Contributed by Cygnus Support.
4
 
5
This file is part of GDB, the GNU debugger.
6
 
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 3 of the License, or
10
(at your option) any later version.
11
 
12
This program is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
GNU General Public License for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
#include <stdio.h>
21
 
22
#include "sim-main.h"
23
#include "sim-assert.h"
24
 
25
/* Get the run state.
26
   REASON/SIGRC are the values returned by sim_stop_reason.
27
   ??? Should each cpu have its own copy?  */
28
 
29
void
30
sim_engine_get_run_state (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
31
{
32
  sim_engine *engine = STATE_ENGINE (sd);
33
  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
34
  *reason = engine->reason;
35
  *sigrc = engine->sigrc;
36
}
37
 
38
/* Set the run state to REASON/SIGRC.
39
   REASON/SIGRC are the values returned by sim_stop_reason.
40
   ??? Should each cpu have its own copy?  */
41
 
42
void
43
sim_engine_set_run_state (SIM_DESC sd, enum sim_stop reason, int sigrc)
44
{
45
  sim_engine *engine = STATE_ENGINE (sd);
46
  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
47
  engine->reason = reason;
48
  engine->sigrc = sigrc;
49
}
50
 
51
/* Generic halt */
52
 
53
void
54
sim_engine_halt (SIM_DESC sd,
55
                 sim_cpu *last_cpu,
56
                 sim_cpu *next_cpu, /* NULL - use default */
57
                 sim_cia cia,
58
                 enum sim_stop reason,
59
                 int sigrc)
60
{
61
  sim_engine *engine = STATE_ENGINE (sd);
62
  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
63
  if (engine->jmpbuf != NULL)
64
    {
65
      jmp_buf *halt_buf = engine->jmpbuf;
66
      engine->last_cpu = last_cpu;
67
      engine->next_cpu = next_cpu;
68
      engine->reason = reason;
69
      engine->sigrc = sigrc;
70
 
71
      SIM_ENGINE_HALT_HOOK (sd, last_cpu, cia);
72
 
73
#ifdef SIM_CPU_EXCEPTION_SUSPEND
74
      if (last_cpu != NULL && reason != sim_exited)
75
        SIM_CPU_EXCEPTION_SUSPEND (sd, last_cpu, sim_signal_to_host (sd, sigrc));
76
#endif
77
 
78
      longjmp (*halt_buf, sim_engine_halt_jmpval);
79
    }
80
  else
81
    {
82
      sim_io_error (sd, "sim_halt - bad long jump");
83
      abort ();
84
    }
85
}
86
 
87
 
88
/* Generic restart */
89
 
90
void
91
sim_engine_restart (SIM_DESC sd,
92
                    sim_cpu *last_cpu,
93
                    sim_cpu *next_cpu,
94
                    sim_cia cia)
95
{
96
  sim_engine *engine = STATE_ENGINE (sd);
97
  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
98
  if (engine->jmpbuf != NULL)
99
    {
100
      jmp_buf *halt_buf = engine->jmpbuf;
101
      engine->last_cpu = last_cpu;
102
      engine->next_cpu = next_cpu;
103
      SIM_ENGINE_RESTART_HOOK (sd, last_cpu, cia);
104
      longjmp (*halt_buf, sim_engine_restart_jmpval);
105
    }
106
  else
107
    sim_io_error (sd, "sim_restart - bad long jump");
108
}
109
 
110
 
111
/* Generic error code */
112
 
113
void
114
sim_engine_vabort (SIM_DESC sd,
115
                   sim_cpu *cpu,
116
                   sim_cia cia,
117
                   const char *fmt,
118
                   va_list ap)
119
{
120
  ASSERT (sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
121
  if (sd == NULL)
122
    {
123
      vfprintf (stderr, fmt, ap);
124
      fprintf (stderr, "\nQuit\n");
125
      abort ();
126
    }
127
  else if (STATE_ENGINE (sd)->jmpbuf == NULL)
128
    {
129
      sim_io_evprintf (sd, fmt, ap);
130
      sim_io_eprintf (sd, "\n");
131
      sim_io_error (sd, "Quit Simulator");
132
      abort ();
133
    }
134
  else
135
    {
136
      sim_io_evprintf (sd, fmt, ap);
137
      sim_io_eprintf (sd, "\n");
138
      sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGABRT);
139
    }
140
}
141
 
142
void
143
sim_engine_abort (SIM_DESC sd,
144
                  sim_cpu *cpu,
145
                  sim_cia cia,
146
                  const char *fmt,
147
                  ...)
148
{
149
  va_list ap;
150
  ASSERT (sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
151
  va_start(ap, fmt);
152
  sim_engine_vabort (sd, cpu, cia, fmt, ap);
153
  va_end (ap);
154
}
155
 
156
 
157
/* Generic next/last cpu */
158
 
159
int
160
sim_engine_last_cpu_nr (SIM_DESC sd)
161
{
162
  sim_engine *engine = STATE_ENGINE (sd);
163
  if (engine->last_cpu != NULL)
164
    return engine->last_cpu - STATE_CPU (sd, 0);
165
  else
166
    return MAX_NR_PROCESSORS;
167
}
168
 
169
int
170
sim_engine_next_cpu_nr (SIM_DESC sd)
171
{
172
  sim_engine *engine = STATE_ENGINE (sd);
173
  if (engine->next_cpu != NULL)
174
    return engine->next_cpu - STATE_CPU (sd, 0);
175
  else
176
    return sim_engine_last_cpu_nr (sd) + 1;
177
}
178
 
179
int
180
sim_engine_nr_cpus (SIM_DESC sd)
181
{
182
  sim_engine *engine = STATE_ENGINE (sd);
183
  return engine->nr_cpus;
184
}
185
 
186
 
187
 
188
 
189
/* Initialization */
190
 
191
static SIM_RC
192
sim_engine_init (SIM_DESC sd)
193
{
194
  /* initialize the start/stop/resume engine */
195
  sim_engine *engine = STATE_ENGINE (sd);
196
  engine->jmpbuf = NULL;
197
  engine->last_cpu = NULL;
198
  engine->next_cpu = NULL;
199
  engine->nr_cpus = MAX_NR_PROCESSORS;
200
  engine->reason = sim_running;
201
  engine->sigrc = 0;
202
  engine->stepper = NULL; /* sim_events_init will clean it up */
203
  return SIM_RC_OK;
204
}
205
 
206
 
207
SIM_RC
208
sim_engine_install (SIM_DESC sd)
209
{
210
  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
211
  sim_module_add_init_fn (sd, sim_engine_init);
212
  return SIM_RC_OK;
213
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.