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jeremybenn |
/* Simulator model support for crisv10f.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2007 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#define WANT_CPU crisv10f
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#define WANT_CPU_CRISV10F
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#include "sim-main.h"
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/* The profiling data is recorded here, but is accessed via the profiling
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mechanism. After all, this is information for profiling. */
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#if WITH_PROFILE_MODEL_P
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/* Model handlers for each insn. */
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static int
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model_crisv10_nop (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.fmt_empty.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_move_b_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_add_b_r.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_move_w_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_add_b_r.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_move_d_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_add_b_r.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movepcr (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_moveq.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_moveq (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_moveq.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movs_b_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_muls_b.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movs_w_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_muls_b.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movu_b_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_muls_b.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movu_w_r (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_muls_b.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movecbr (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcbr.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
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}
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movecwr (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcwr.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
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}
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movecdr (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_bound_cd.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
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}
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_crisv10_movscbr (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_bound_cb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
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}
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{
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273 |
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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return cycles;
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#undef FLD
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279 |
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}
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280 |
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281 |
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static int
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model_crisv10_movscwr (SIM_CPU *current_cpu, void *sem_arg)
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{
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284 |
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#define FLD(f) abuf->fields.sfmt_bound_cw.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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287 |
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int cycles = 0;
|
288 |
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{
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289 |
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int referenced = 0;
|
290 |
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
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}
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293 |
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{
|
294 |
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int referenced = 0;
|
295 |
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int UNUSED insn_referenced = abuf->written;
|
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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298 |
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return cycles;
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299 |
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#undef FLD
|
300 |
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}
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301 |
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302 |
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static int
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303 |
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model_crisv10_movucbr (SIM_CPU *current_cpu, void *sem_arg)
|
304 |
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{
|
305 |
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#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
306 |
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
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const IDESC * UNUSED idesc = abuf->idesc;
|
308 |
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int cycles = 0;
|
309 |
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{
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310 |
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int referenced = 0;
|
311 |
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int UNUSED insn_referenced = abuf->written;
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
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}
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314 |
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{
|
315 |
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int referenced = 0;
|
316 |
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int UNUSED insn_referenced = abuf->written;
|
317 |
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cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
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}
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return cycles;
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320 |
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#undef FLD
|
321 |
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}
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322 |
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323 |
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static int
|
324 |
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model_crisv10_movucwr (SIM_CPU *current_cpu, void *sem_arg)
|
325 |
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{
|
326 |
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#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
327 |
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
328 |
|
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const IDESC * UNUSED idesc = abuf->idesc;
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329 |
|
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int cycles = 0;
|
330 |
|
|
{
|
331 |
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int referenced = 0;
|
332 |
|
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int UNUSED insn_referenced = abuf->written;
|
333 |
|
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cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
334 |
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}
|
335 |
|
|
{
|
336 |
|
|
int referenced = 0;
|
337 |
|
|
int UNUSED insn_referenced = abuf->written;
|
338 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
339 |
|
|
}
|
340 |
|
|
return cycles;
|
341 |
|
|
#undef FLD
|
342 |
|
|
}
|
343 |
|
|
|
344 |
|
|
static int
|
345 |
|
|
model_crisv10_addq (SIM_CPU *current_cpu, void *sem_arg)
|
346 |
|
|
{
|
347 |
|
|
#define FLD(f) abuf->fields.sfmt_addq.f
|
348 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
349 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
350 |
|
|
int cycles = 0;
|
351 |
|
|
{
|
352 |
|
|
int referenced = 0;
|
353 |
|
|
int UNUSED insn_referenced = abuf->written;
|
354 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
355 |
|
|
}
|
356 |
|
|
return cycles;
|
357 |
|
|
#undef FLD
|
358 |
|
|
}
|
359 |
|
|
|
360 |
|
|
static int
|
361 |
|
|
model_crisv10_subq (SIM_CPU *current_cpu, void *sem_arg)
|
362 |
|
|
{
|
363 |
|
|
#define FLD(f) abuf->fields.sfmt_addq.f
|
364 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
365 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
366 |
|
|
int cycles = 0;
|
367 |
|
|
{
|
368 |
|
|
int referenced = 0;
|
369 |
|
|
int UNUSED insn_referenced = abuf->written;
|
370 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
371 |
|
|
}
|
372 |
|
|
return cycles;
|
373 |
|
|
#undef FLD
|
374 |
|
|
}
|
375 |
|
|
|
376 |
|
|
static int
|
377 |
|
|
model_crisv10_cmp_r_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
378 |
|
|
{
|
379 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
380 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
381 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
382 |
|
|
int cycles = 0;
|
383 |
|
|
{
|
384 |
|
|
int referenced = 0;
|
385 |
|
|
int UNUSED insn_referenced = abuf->written;
|
386 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
387 |
|
|
}
|
388 |
|
|
return cycles;
|
389 |
|
|
#undef FLD
|
390 |
|
|
}
|
391 |
|
|
|
392 |
|
|
static int
|
393 |
|
|
model_crisv10_cmp_r_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
394 |
|
|
{
|
395 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
396 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
397 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
398 |
|
|
int cycles = 0;
|
399 |
|
|
{
|
400 |
|
|
int referenced = 0;
|
401 |
|
|
int UNUSED insn_referenced = abuf->written;
|
402 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
403 |
|
|
}
|
404 |
|
|
return cycles;
|
405 |
|
|
#undef FLD
|
406 |
|
|
}
|
407 |
|
|
|
408 |
|
|
static int
|
409 |
|
|
model_crisv10_cmp_r_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
410 |
|
|
{
|
411 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
412 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
413 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
414 |
|
|
int cycles = 0;
|
415 |
|
|
{
|
416 |
|
|
int referenced = 0;
|
417 |
|
|
int UNUSED insn_referenced = abuf->written;
|
418 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
419 |
|
|
}
|
420 |
|
|
return cycles;
|
421 |
|
|
#undef FLD
|
422 |
|
|
}
|
423 |
|
|
|
424 |
|
|
static int
|
425 |
|
|
model_crisv10_cmp_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
426 |
|
|
{
|
427 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
428 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
429 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
430 |
|
|
int cycles = 0;
|
431 |
|
|
{
|
432 |
|
|
int referenced = 0;
|
433 |
|
|
int UNUSED insn_referenced = abuf->written;
|
434 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
435 |
|
|
}
|
436 |
|
|
{
|
437 |
|
|
int referenced = 0;
|
438 |
|
|
int UNUSED insn_referenced = abuf->written;
|
439 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
440 |
|
|
}
|
441 |
|
|
return cycles;
|
442 |
|
|
#undef FLD
|
443 |
|
|
}
|
444 |
|
|
|
445 |
|
|
static int
|
446 |
|
|
model_crisv10_cmp_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
447 |
|
|
{
|
448 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
449 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
450 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
451 |
|
|
int cycles = 0;
|
452 |
|
|
{
|
453 |
|
|
int referenced = 0;
|
454 |
|
|
int UNUSED insn_referenced = abuf->written;
|
455 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
456 |
|
|
}
|
457 |
|
|
{
|
458 |
|
|
int referenced = 0;
|
459 |
|
|
int UNUSED insn_referenced = abuf->written;
|
460 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
461 |
|
|
}
|
462 |
|
|
return cycles;
|
463 |
|
|
#undef FLD
|
464 |
|
|
}
|
465 |
|
|
|
466 |
|
|
static int
|
467 |
|
|
model_crisv10_cmp_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
468 |
|
|
{
|
469 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
470 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
471 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
472 |
|
|
int cycles = 0;
|
473 |
|
|
{
|
474 |
|
|
int referenced = 0;
|
475 |
|
|
int UNUSED insn_referenced = abuf->written;
|
476 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
477 |
|
|
}
|
478 |
|
|
{
|
479 |
|
|
int referenced = 0;
|
480 |
|
|
int UNUSED insn_referenced = abuf->written;
|
481 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
482 |
|
|
}
|
483 |
|
|
return cycles;
|
484 |
|
|
#undef FLD
|
485 |
|
|
}
|
486 |
|
|
|
487 |
|
|
static int
|
488 |
|
|
model_crisv10_cmpcbr (SIM_CPU *current_cpu, void *sem_arg)
|
489 |
|
|
{
|
490 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
491 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
492 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
493 |
|
|
int cycles = 0;
|
494 |
|
|
{
|
495 |
|
|
int referenced = 0;
|
496 |
|
|
int UNUSED insn_referenced = abuf->written;
|
497 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
498 |
|
|
}
|
499 |
|
|
{
|
500 |
|
|
int referenced = 0;
|
501 |
|
|
int UNUSED insn_referenced = abuf->written;
|
502 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
503 |
|
|
}
|
504 |
|
|
return cycles;
|
505 |
|
|
#undef FLD
|
506 |
|
|
}
|
507 |
|
|
|
508 |
|
|
static int
|
509 |
|
|
model_crisv10_cmpcwr (SIM_CPU *current_cpu, void *sem_arg)
|
510 |
|
|
{
|
511 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
512 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
513 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
514 |
|
|
int cycles = 0;
|
515 |
|
|
{
|
516 |
|
|
int referenced = 0;
|
517 |
|
|
int UNUSED insn_referenced = abuf->written;
|
518 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
519 |
|
|
}
|
520 |
|
|
{
|
521 |
|
|
int referenced = 0;
|
522 |
|
|
int UNUSED insn_referenced = abuf->written;
|
523 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
524 |
|
|
}
|
525 |
|
|
return cycles;
|
526 |
|
|
#undef FLD
|
527 |
|
|
}
|
528 |
|
|
|
529 |
|
|
static int
|
530 |
|
|
model_crisv10_cmpcdr (SIM_CPU *current_cpu, void *sem_arg)
|
531 |
|
|
{
|
532 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cd.f
|
533 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
534 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
535 |
|
|
int cycles = 0;
|
536 |
|
|
{
|
537 |
|
|
int referenced = 0;
|
538 |
|
|
int UNUSED insn_referenced = abuf->written;
|
539 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
540 |
|
|
}
|
541 |
|
|
{
|
542 |
|
|
int referenced = 0;
|
543 |
|
|
int UNUSED insn_referenced = abuf->written;
|
544 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
545 |
|
|
}
|
546 |
|
|
return cycles;
|
547 |
|
|
#undef FLD
|
548 |
|
|
}
|
549 |
|
|
|
550 |
|
|
static int
|
551 |
|
|
model_crisv10_cmpq (SIM_CPU *current_cpu, void *sem_arg)
|
552 |
|
|
{
|
553 |
|
|
#define FLD(f) abuf->fields.sfmt_andq.f
|
554 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
555 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
556 |
|
|
int cycles = 0;
|
557 |
|
|
{
|
558 |
|
|
int referenced = 0;
|
559 |
|
|
int UNUSED insn_referenced = abuf->written;
|
560 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
561 |
|
|
}
|
562 |
|
|
return cycles;
|
563 |
|
|
#undef FLD
|
564 |
|
|
}
|
565 |
|
|
|
566 |
|
|
static int
|
567 |
|
|
model_crisv10_cmps_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
568 |
|
|
{
|
569 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
570 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
571 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
572 |
|
|
int cycles = 0;
|
573 |
|
|
{
|
574 |
|
|
int referenced = 0;
|
575 |
|
|
int UNUSED insn_referenced = abuf->written;
|
576 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
577 |
|
|
}
|
578 |
|
|
{
|
579 |
|
|
int referenced = 0;
|
580 |
|
|
int UNUSED insn_referenced = abuf->written;
|
581 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
582 |
|
|
}
|
583 |
|
|
return cycles;
|
584 |
|
|
#undef FLD
|
585 |
|
|
}
|
586 |
|
|
|
587 |
|
|
static int
|
588 |
|
|
model_crisv10_cmps_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
589 |
|
|
{
|
590 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
591 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
592 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
593 |
|
|
int cycles = 0;
|
594 |
|
|
{
|
595 |
|
|
int referenced = 0;
|
596 |
|
|
int UNUSED insn_referenced = abuf->written;
|
597 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
598 |
|
|
}
|
599 |
|
|
{
|
600 |
|
|
int referenced = 0;
|
601 |
|
|
int UNUSED insn_referenced = abuf->written;
|
602 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
603 |
|
|
}
|
604 |
|
|
return cycles;
|
605 |
|
|
#undef FLD
|
606 |
|
|
}
|
607 |
|
|
|
608 |
|
|
static int
|
609 |
|
|
model_crisv10_cmpscbr (SIM_CPU *current_cpu, void *sem_arg)
|
610 |
|
|
{
|
611 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
612 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
613 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
614 |
|
|
int cycles = 0;
|
615 |
|
|
{
|
616 |
|
|
int referenced = 0;
|
617 |
|
|
int UNUSED insn_referenced = abuf->written;
|
618 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
619 |
|
|
}
|
620 |
|
|
{
|
621 |
|
|
int referenced = 0;
|
622 |
|
|
int UNUSED insn_referenced = abuf->written;
|
623 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
624 |
|
|
}
|
625 |
|
|
return cycles;
|
626 |
|
|
#undef FLD
|
627 |
|
|
}
|
628 |
|
|
|
629 |
|
|
static int
|
630 |
|
|
model_crisv10_cmpscwr (SIM_CPU *current_cpu, void *sem_arg)
|
631 |
|
|
{
|
632 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
633 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
634 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
635 |
|
|
int cycles = 0;
|
636 |
|
|
{
|
637 |
|
|
int referenced = 0;
|
638 |
|
|
int UNUSED insn_referenced = abuf->written;
|
639 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
640 |
|
|
}
|
641 |
|
|
{
|
642 |
|
|
int referenced = 0;
|
643 |
|
|
int UNUSED insn_referenced = abuf->written;
|
644 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
645 |
|
|
}
|
646 |
|
|
return cycles;
|
647 |
|
|
#undef FLD
|
648 |
|
|
}
|
649 |
|
|
|
650 |
|
|
static int
|
651 |
|
|
model_crisv10_cmpu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
652 |
|
|
{
|
653 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
654 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
655 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
656 |
|
|
int cycles = 0;
|
657 |
|
|
{
|
658 |
|
|
int referenced = 0;
|
659 |
|
|
int UNUSED insn_referenced = abuf->written;
|
660 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
661 |
|
|
}
|
662 |
|
|
{
|
663 |
|
|
int referenced = 0;
|
664 |
|
|
int UNUSED insn_referenced = abuf->written;
|
665 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
666 |
|
|
}
|
667 |
|
|
return cycles;
|
668 |
|
|
#undef FLD
|
669 |
|
|
}
|
670 |
|
|
|
671 |
|
|
static int
|
672 |
|
|
model_crisv10_cmpu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
673 |
|
|
{
|
674 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
675 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
676 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
677 |
|
|
int cycles = 0;
|
678 |
|
|
{
|
679 |
|
|
int referenced = 0;
|
680 |
|
|
int UNUSED insn_referenced = abuf->written;
|
681 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
682 |
|
|
}
|
683 |
|
|
{
|
684 |
|
|
int referenced = 0;
|
685 |
|
|
int UNUSED insn_referenced = abuf->written;
|
686 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
687 |
|
|
}
|
688 |
|
|
return cycles;
|
689 |
|
|
#undef FLD
|
690 |
|
|
}
|
691 |
|
|
|
692 |
|
|
static int
|
693 |
|
|
model_crisv10_cmpucbr (SIM_CPU *current_cpu, void *sem_arg)
|
694 |
|
|
{
|
695 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
696 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
697 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
698 |
|
|
int cycles = 0;
|
699 |
|
|
{
|
700 |
|
|
int referenced = 0;
|
701 |
|
|
int UNUSED insn_referenced = abuf->written;
|
702 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
703 |
|
|
}
|
704 |
|
|
{
|
705 |
|
|
int referenced = 0;
|
706 |
|
|
int UNUSED insn_referenced = abuf->written;
|
707 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
708 |
|
|
}
|
709 |
|
|
return cycles;
|
710 |
|
|
#undef FLD
|
711 |
|
|
}
|
712 |
|
|
|
713 |
|
|
static int
|
714 |
|
|
model_crisv10_cmpucwr (SIM_CPU *current_cpu, void *sem_arg)
|
715 |
|
|
{
|
716 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
717 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
718 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
719 |
|
|
int cycles = 0;
|
720 |
|
|
{
|
721 |
|
|
int referenced = 0;
|
722 |
|
|
int UNUSED insn_referenced = abuf->written;
|
723 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
724 |
|
|
}
|
725 |
|
|
{
|
726 |
|
|
int referenced = 0;
|
727 |
|
|
int UNUSED insn_referenced = abuf->written;
|
728 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
729 |
|
|
}
|
730 |
|
|
return cycles;
|
731 |
|
|
#undef FLD
|
732 |
|
|
}
|
733 |
|
|
|
734 |
|
|
static int
|
735 |
|
|
model_crisv10_move_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
736 |
|
|
{
|
737 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
738 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
739 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
740 |
|
|
int cycles = 0;
|
741 |
|
|
{
|
742 |
|
|
int referenced = 0;
|
743 |
|
|
int UNUSED insn_referenced = abuf->written;
|
744 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
745 |
|
|
}
|
746 |
|
|
{
|
747 |
|
|
int referenced = 0;
|
748 |
|
|
int UNUSED insn_referenced = abuf->written;
|
749 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
750 |
|
|
}
|
751 |
|
|
return cycles;
|
752 |
|
|
#undef FLD
|
753 |
|
|
}
|
754 |
|
|
|
755 |
|
|
static int
|
756 |
|
|
model_crisv10_move_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
757 |
|
|
{
|
758 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
759 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
760 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
761 |
|
|
int cycles = 0;
|
762 |
|
|
{
|
763 |
|
|
int referenced = 0;
|
764 |
|
|
int UNUSED insn_referenced = abuf->written;
|
765 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
766 |
|
|
}
|
767 |
|
|
{
|
768 |
|
|
int referenced = 0;
|
769 |
|
|
int UNUSED insn_referenced = abuf->written;
|
770 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
771 |
|
|
}
|
772 |
|
|
return cycles;
|
773 |
|
|
#undef FLD
|
774 |
|
|
}
|
775 |
|
|
|
776 |
|
|
static int
|
777 |
|
|
model_crisv10_move_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
778 |
|
|
{
|
779 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
780 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
781 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
782 |
|
|
int cycles = 0;
|
783 |
|
|
{
|
784 |
|
|
int referenced = 0;
|
785 |
|
|
int UNUSED insn_referenced = abuf->written;
|
786 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
787 |
|
|
}
|
788 |
|
|
{
|
789 |
|
|
int referenced = 0;
|
790 |
|
|
int UNUSED insn_referenced = abuf->written;
|
791 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
792 |
|
|
}
|
793 |
|
|
return cycles;
|
794 |
|
|
#undef FLD
|
795 |
|
|
}
|
796 |
|
|
|
797 |
|
|
static int
|
798 |
|
|
model_crisv10_movs_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
799 |
|
|
{
|
800 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
801 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
802 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
803 |
|
|
int cycles = 0;
|
804 |
|
|
{
|
805 |
|
|
int referenced = 0;
|
806 |
|
|
int UNUSED insn_referenced = abuf->written;
|
807 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
808 |
|
|
}
|
809 |
|
|
{
|
810 |
|
|
int referenced = 0;
|
811 |
|
|
int UNUSED insn_referenced = abuf->written;
|
812 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
813 |
|
|
}
|
814 |
|
|
return cycles;
|
815 |
|
|
#undef FLD
|
816 |
|
|
}
|
817 |
|
|
|
818 |
|
|
static int
|
819 |
|
|
model_crisv10_movs_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
820 |
|
|
{
|
821 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
822 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
823 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
824 |
|
|
int cycles = 0;
|
825 |
|
|
{
|
826 |
|
|
int referenced = 0;
|
827 |
|
|
int UNUSED insn_referenced = abuf->written;
|
828 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
829 |
|
|
}
|
830 |
|
|
{
|
831 |
|
|
int referenced = 0;
|
832 |
|
|
int UNUSED insn_referenced = abuf->written;
|
833 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
834 |
|
|
}
|
835 |
|
|
return cycles;
|
836 |
|
|
#undef FLD
|
837 |
|
|
}
|
838 |
|
|
|
839 |
|
|
static int
|
840 |
|
|
model_crisv10_movu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
841 |
|
|
{
|
842 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
843 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
844 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
845 |
|
|
int cycles = 0;
|
846 |
|
|
{
|
847 |
|
|
int referenced = 0;
|
848 |
|
|
int UNUSED insn_referenced = abuf->written;
|
849 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
850 |
|
|
}
|
851 |
|
|
{
|
852 |
|
|
int referenced = 0;
|
853 |
|
|
int UNUSED insn_referenced = abuf->written;
|
854 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
855 |
|
|
}
|
856 |
|
|
return cycles;
|
857 |
|
|
#undef FLD
|
858 |
|
|
}
|
859 |
|
|
|
860 |
|
|
static int
|
861 |
|
|
model_crisv10_movu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
862 |
|
|
{
|
863 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
864 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
865 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
866 |
|
|
int cycles = 0;
|
867 |
|
|
{
|
868 |
|
|
int referenced = 0;
|
869 |
|
|
int UNUSED insn_referenced = abuf->written;
|
870 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
871 |
|
|
}
|
872 |
|
|
{
|
873 |
|
|
int referenced = 0;
|
874 |
|
|
int UNUSED insn_referenced = abuf->written;
|
875 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
876 |
|
|
}
|
877 |
|
|
return cycles;
|
878 |
|
|
#undef FLD
|
879 |
|
|
}
|
880 |
|
|
|
881 |
|
|
static int
|
882 |
|
|
model_crisv10_move_r_sprv10 (SIM_CPU *current_cpu, void *sem_arg)
|
883 |
|
|
{
|
884 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
|
885 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
886 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
887 |
|
|
int cycles = 0;
|
888 |
|
|
{
|
889 |
|
|
int referenced = 0;
|
890 |
|
|
int UNUSED insn_referenced = abuf->written;
|
891 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
892 |
|
|
}
|
893 |
|
|
return cycles;
|
894 |
|
|
#undef FLD
|
895 |
|
|
}
|
896 |
|
|
|
897 |
|
|
static int
|
898 |
|
|
model_crisv10_move_spr_rv10 (SIM_CPU *current_cpu, void *sem_arg)
|
899 |
|
|
{
|
900 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
|
901 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
902 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
903 |
|
|
int cycles = 0;
|
904 |
|
|
{
|
905 |
|
|
int referenced = 0;
|
906 |
|
|
int UNUSED insn_referenced = abuf->written;
|
907 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
908 |
|
|
}
|
909 |
|
|
return cycles;
|
910 |
|
|
#undef FLD
|
911 |
|
|
}
|
912 |
|
|
|
913 |
|
|
static int
|
914 |
|
|
model_crisv10_ret_type (SIM_CPU *current_cpu, void *sem_arg)
|
915 |
|
|
{
|
916 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
|
917 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
918 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
919 |
|
|
int cycles = 0;
|
920 |
|
|
{
|
921 |
|
|
int referenced = 0;
|
922 |
|
|
int UNUSED insn_referenced = abuf->written;
|
923 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
924 |
|
|
}
|
925 |
|
|
return cycles;
|
926 |
|
|
#undef FLD
|
927 |
|
|
}
|
928 |
|
|
|
929 |
|
|
static int
|
930 |
|
|
model_crisv10_move_m_sprv10 (SIM_CPU *current_cpu, void *sem_arg)
|
931 |
|
|
{
|
932 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
|
933 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
934 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
935 |
|
|
int cycles = 0;
|
936 |
|
|
{
|
937 |
|
|
int referenced = 0;
|
938 |
|
|
int UNUSED insn_referenced = abuf->written;
|
939 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
940 |
|
|
}
|
941 |
|
|
{
|
942 |
|
|
int referenced = 0;
|
943 |
|
|
int UNUSED insn_referenced = abuf->written;
|
944 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
945 |
|
|
}
|
946 |
|
|
return cycles;
|
947 |
|
|
#undef FLD
|
948 |
|
|
}
|
949 |
|
|
|
950 |
|
|
static int
|
951 |
|
|
model_crisv10_move_c_sprv10_p5 (SIM_CPU *current_cpu, void *sem_arg)
|
952 |
|
|
{
|
953 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f
|
954 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
955 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
956 |
|
|
int cycles = 0;
|
957 |
|
|
{
|
958 |
|
|
int referenced = 0;
|
959 |
|
|
int UNUSED insn_referenced = abuf->written;
|
960 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
961 |
|
|
}
|
962 |
|
|
{
|
963 |
|
|
int referenced = 0;
|
964 |
|
|
int UNUSED insn_referenced = abuf->written;
|
965 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
966 |
|
|
}
|
967 |
|
|
return cycles;
|
968 |
|
|
#undef FLD
|
969 |
|
|
}
|
970 |
|
|
|
971 |
|
|
static int
|
972 |
|
|
model_crisv10_move_c_sprv10_p9 (SIM_CPU *current_cpu, void *sem_arg)
|
973 |
|
|
{
|
974 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
975 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
976 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
977 |
|
|
int cycles = 0;
|
978 |
|
|
{
|
979 |
|
|
int referenced = 0;
|
980 |
|
|
int UNUSED insn_referenced = abuf->written;
|
981 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
982 |
|
|
}
|
983 |
|
|
{
|
984 |
|
|
int referenced = 0;
|
985 |
|
|
int UNUSED insn_referenced = abuf->written;
|
986 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
987 |
|
|
}
|
988 |
|
|
return cycles;
|
989 |
|
|
#undef FLD
|
990 |
|
|
}
|
991 |
|
|
|
992 |
|
|
static int
|
993 |
|
|
model_crisv10_move_c_sprv10_p10 (SIM_CPU *current_cpu, void *sem_arg)
|
994 |
|
|
{
|
995 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
996 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
997 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
998 |
|
|
int cycles = 0;
|
999 |
|
|
{
|
1000 |
|
|
int referenced = 0;
|
1001 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1002 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1003 |
|
|
}
|
1004 |
|
|
{
|
1005 |
|
|
int referenced = 0;
|
1006 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1007 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1008 |
|
|
}
|
1009 |
|
|
return cycles;
|
1010 |
|
|
#undef FLD
|
1011 |
|
|
}
|
1012 |
|
|
|
1013 |
|
|
static int
|
1014 |
|
|
model_crisv10_move_c_sprv10_p11 (SIM_CPU *current_cpu, void *sem_arg)
|
1015 |
|
|
{
|
1016 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1017 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1018 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1019 |
|
|
int cycles = 0;
|
1020 |
|
|
{
|
1021 |
|
|
int referenced = 0;
|
1022 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1023 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1024 |
|
|
}
|
1025 |
|
|
{
|
1026 |
|
|
int referenced = 0;
|
1027 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1028 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1029 |
|
|
}
|
1030 |
|
|
return cycles;
|
1031 |
|
|
#undef FLD
|
1032 |
|
|
}
|
1033 |
|
|
|
1034 |
|
|
static int
|
1035 |
|
|
model_crisv10_move_c_sprv10_p12 (SIM_CPU *current_cpu, void *sem_arg)
|
1036 |
|
|
{
|
1037 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1038 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1039 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1040 |
|
|
int cycles = 0;
|
1041 |
|
|
{
|
1042 |
|
|
int referenced = 0;
|
1043 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1044 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1045 |
|
|
}
|
1046 |
|
|
{
|
1047 |
|
|
int referenced = 0;
|
1048 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1049 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1050 |
|
|
}
|
1051 |
|
|
return cycles;
|
1052 |
|
|
#undef FLD
|
1053 |
|
|
}
|
1054 |
|
|
|
1055 |
|
|
static int
|
1056 |
|
|
model_crisv10_move_c_sprv10_p13 (SIM_CPU *current_cpu, void *sem_arg)
|
1057 |
|
|
{
|
1058 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1059 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1060 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1061 |
|
|
int cycles = 0;
|
1062 |
|
|
{
|
1063 |
|
|
int referenced = 0;
|
1064 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1065 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1066 |
|
|
}
|
1067 |
|
|
{
|
1068 |
|
|
int referenced = 0;
|
1069 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1070 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1071 |
|
|
}
|
1072 |
|
|
return cycles;
|
1073 |
|
|
#undef FLD
|
1074 |
|
|
}
|
1075 |
|
|
|
1076 |
|
|
static int
|
1077 |
|
|
model_crisv10_move_c_sprv10_p7 (SIM_CPU *current_cpu, void *sem_arg)
|
1078 |
|
|
{
|
1079 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1080 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1081 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1082 |
|
|
int cycles = 0;
|
1083 |
|
|
{
|
1084 |
|
|
int referenced = 0;
|
1085 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1086 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1087 |
|
|
}
|
1088 |
|
|
{
|
1089 |
|
|
int referenced = 0;
|
1090 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1091 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1092 |
|
|
}
|
1093 |
|
|
return cycles;
|
1094 |
|
|
#undef FLD
|
1095 |
|
|
}
|
1096 |
|
|
|
1097 |
|
|
static int
|
1098 |
|
|
model_crisv10_move_c_sprv10_p14 (SIM_CPU *current_cpu, void *sem_arg)
|
1099 |
|
|
{
|
1100 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1101 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1102 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1103 |
|
|
int cycles = 0;
|
1104 |
|
|
{
|
1105 |
|
|
int referenced = 0;
|
1106 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1107 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1108 |
|
|
}
|
1109 |
|
|
{
|
1110 |
|
|
int referenced = 0;
|
1111 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1112 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1113 |
|
|
}
|
1114 |
|
|
return cycles;
|
1115 |
|
|
#undef FLD
|
1116 |
|
|
}
|
1117 |
|
|
|
1118 |
|
|
static int
|
1119 |
|
|
model_crisv10_move_c_sprv10_p15 (SIM_CPU *current_cpu, void *sem_arg)
|
1120 |
|
|
{
|
1121 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1122 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1123 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1124 |
|
|
int cycles = 0;
|
1125 |
|
|
{
|
1126 |
|
|
int referenced = 0;
|
1127 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1128 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1129 |
|
|
}
|
1130 |
|
|
{
|
1131 |
|
|
int referenced = 0;
|
1132 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1133 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1134 |
|
|
}
|
1135 |
|
|
return cycles;
|
1136 |
|
|
#undef FLD
|
1137 |
|
|
}
|
1138 |
|
|
|
1139 |
|
|
static int
|
1140 |
|
|
model_crisv10_move_spr_mv10 (SIM_CPU *current_cpu, void *sem_arg)
|
1141 |
|
|
{
|
1142 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
1143 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1144 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1145 |
|
|
int cycles = 0;
|
1146 |
|
|
{
|
1147 |
|
|
int referenced = 0;
|
1148 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1149 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1150 |
|
|
}
|
1151 |
|
|
{
|
1152 |
|
|
int referenced = 0;
|
1153 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1154 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1155 |
|
|
}
|
1156 |
|
|
return cycles;
|
1157 |
|
|
#undef FLD
|
1158 |
|
|
}
|
1159 |
|
|
|
1160 |
|
|
static int
|
1161 |
|
|
model_crisv10_sbfs (SIM_CPU *current_cpu, void *sem_arg)
|
1162 |
|
|
{
|
1163 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
1164 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1165 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1166 |
|
|
int cycles = 0;
|
1167 |
|
|
{
|
1168 |
|
|
int referenced = 0;
|
1169 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1170 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1171 |
|
|
}
|
1172 |
|
|
return cycles;
|
1173 |
|
|
#undef FLD
|
1174 |
|
|
}
|
1175 |
|
|
|
1176 |
|
|
static int
|
1177 |
|
|
model_crisv10_movem_r_m (SIM_CPU *current_cpu, void *sem_arg)
|
1178 |
|
|
{
|
1179 |
|
|
#define FLD(f) abuf->fields.sfmt_movem_r_m.f
|
1180 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1181 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1182 |
|
|
int cycles = 0;
|
1183 |
|
|
{
|
1184 |
|
|
int referenced = 0;
|
1185 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1186 |
|
|
INT in_Rd = -1;
|
1187 |
|
|
in_Rd = FLD (in_Rd);
|
1188 |
|
|
referenced |= 1 << 0;
|
1189 |
|
|
cycles += crisv10f_model_crisv10_u_movem (current_cpu, idesc, 0, referenced, in_Rd);
|
1190 |
|
|
}
|
1191 |
|
|
{
|
1192 |
|
|
int referenced = 0;
|
1193 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1194 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1195 |
|
|
}
|
1196 |
|
|
return cycles;
|
1197 |
|
|
#undef FLD
|
1198 |
|
|
}
|
1199 |
|
|
|
1200 |
|
|
static int
|
1201 |
|
|
model_crisv10_movem_m_r (SIM_CPU *current_cpu, void *sem_arg)
|
1202 |
|
|
{
|
1203 |
|
|
#define FLD(f) abuf->fields.sfmt_movem_m_r.f
|
1204 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1205 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1206 |
|
|
int cycles = 0;
|
1207 |
|
|
{
|
1208 |
|
|
int referenced = 0;
|
1209 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1210 |
|
|
INT in_Rd = -1;
|
1211 |
|
|
in_Rd = FLD (in_Rd);
|
1212 |
|
|
referenced |= 1 << 0;
|
1213 |
|
|
cycles += crisv10f_model_crisv10_u_movem (current_cpu, idesc, 0, referenced, in_Rd);
|
1214 |
|
|
}
|
1215 |
|
|
{
|
1216 |
|
|
int referenced = 0;
|
1217 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1218 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1219 |
|
|
}
|
1220 |
|
|
return cycles;
|
1221 |
|
|
#undef FLD
|
1222 |
|
|
}
|
1223 |
|
|
|
1224 |
|
|
static int
|
1225 |
|
|
model_crisv10_movem_m_pc (SIM_CPU *current_cpu, void *sem_arg)
|
1226 |
|
|
{
|
1227 |
|
|
#define FLD(f) abuf->fields.sfmt_movem_m_r.f
|
1228 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1229 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1230 |
|
|
int cycles = 0;
|
1231 |
|
|
{
|
1232 |
|
|
int referenced = 0;
|
1233 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1234 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1235 |
|
|
}
|
1236 |
|
|
{
|
1237 |
|
|
int referenced = 0;
|
1238 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1239 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1240 |
|
|
}
|
1241 |
|
|
return cycles;
|
1242 |
|
|
#undef FLD
|
1243 |
|
|
}
|
1244 |
|
|
|
1245 |
|
|
static int
|
1246 |
|
|
model_crisv10_add_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1247 |
|
|
{
|
1248 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1249 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1250 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1251 |
|
|
int cycles = 0;
|
1252 |
|
|
{
|
1253 |
|
|
int referenced = 0;
|
1254 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1255 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1256 |
|
|
}
|
1257 |
|
|
return cycles;
|
1258 |
|
|
#undef FLD
|
1259 |
|
|
}
|
1260 |
|
|
|
1261 |
|
|
static int
|
1262 |
|
|
model_crisv10_add_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
1263 |
|
|
{
|
1264 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1265 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1266 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1267 |
|
|
int cycles = 0;
|
1268 |
|
|
{
|
1269 |
|
|
int referenced = 0;
|
1270 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1271 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1272 |
|
|
}
|
1273 |
|
|
return cycles;
|
1274 |
|
|
#undef FLD
|
1275 |
|
|
}
|
1276 |
|
|
|
1277 |
|
|
static int
|
1278 |
|
|
model_crisv10_add_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
1279 |
|
|
{
|
1280 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1281 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1282 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1283 |
|
|
int cycles = 0;
|
1284 |
|
|
{
|
1285 |
|
|
int referenced = 0;
|
1286 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1287 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1288 |
|
|
}
|
1289 |
|
|
return cycles;
|
1290 |
|
|
#undef FLD
|
1291 |
|
|
}
|
1292 |
|
|
|
1293 |
|
|
static int
|
1294 |
|
|
model_crisv10_add_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
1295 |
|
|
{
|
1296 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1297 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1298 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1299 |
|
|
int cycles = 0;
|
1300 |
|
|
{
|
1301 |
|
|
int referenced = 0;
|
1302 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1303 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1304 |
|
|
}
|
1305 |
|
|
{
|
1306 |
|
|
int referenced = 0;
|
1307 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1308 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1309 |
|
|
}
|
1310 |
|
|
return cycles;
|
1311 |
|
|
#undef FLD
|
1312 |
|
|
}
|
1313 |
|
|
|
1314 |
|
|
static int
|
1315 |
|
|
model_crisv10_add_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
1316 |
|
|
{
|
1317 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1318 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1319 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1320 |
|
|
int cycles = 0;
|
1321 |
|
|
{
|
1322 |
|
|
int referenced = 0;
|
1323 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1324 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1325 |
|
|
}
|
1326 |
|
|
{
|
1327 |
|
|
int referenced = 0;
|
1328 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1329 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1330 |
|
|
}
|
1331 |
|
|
return cycles;
|
1332 |
|
|
#undef FLD
|
1333 |
|
|
}
|
1334 |
|
|
|
1335 |
|
|
static int
|
1336 |
|
|
model_crisv10_add_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
1337 |
|
|
{
|
1338 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1339 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1340 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1341 |
|
|
int cycles = 0;
|
1342 |
|
|
{
|
1343 |
|
|
int referenced = 0;
|
1344 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1345 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1346 |
|
|
}
|
1347 |
|
|
{
|
1348 |
|
|
int referenced = 0;
|
1349 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1350 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1351 |
|
|
}
|
1352 |
|
|
return cycles;
|
1353 |
|
|
#undef FLD
|
1354 |
|
|
}
|
1355 |
|
|
|
1356 |
|
|
static int
|
1357 |
|
|
model_crisv10_addcbr (SIM_CPU *current_cpu, void *sem_arg)
|
1358 |
|
|
{
|
1359 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
1360 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1361 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1362 |
|
|
int cycles = 0;
|
1363 |
|
|
{
|
1364 |
|
|
int referenced = 0;
|
1365 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1366 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1367 |
|
|
}
|
1368 |
|
|
{
|
1369 |
|
|
int referenced = 0;
|
1370 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1371 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1372 |
|
|
}
|
1373 |
|
|
return cycles;
|
1374 |
|
|
#undef FLD
|
1375 |
|
|
}
|
1376 |
|
|
|
1377 |
|
|
static int
|
1378 |
|
|
model_crisv10_addcwr (SIM_CPU *current_cpu, void *sem_arg)
|
1379 |
|
|
{
|
1380 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
1381 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1382 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1383 |
|
|
int cycles = 0;
|
1384 |
|
|
{
|
1385 |
|
|
int referenced = 0;
|
1386 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1387 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1388 |
|
|
}
|
1389 |
|
|
{
|
1390 |
|
|
int referenced = 0;
|
1391 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1392 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1393 |
|
|
}
|
1394 |
|
|
return cycles;
|
1395 |
|
|
#undef FLD
|
1396 |
|
|
}
|
1397 |
|
|
|
1398 |
|
|
static int
|
1399 |
|
|
model_crisv10_addcdr (SIM_CPU *current_cpu, void *sem_arg)
|
1400 |
|
|
{
|
1401 |
|
|
#define FLD(f) abuf->fields.sfmt_addcdr.f
|
1402 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1403 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1404 |
|
|
int cycles = 0;
|
1405 |
|
|
{
|
1406 |
|
|
int referenced = 0;
|
1407 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1408 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1409 |
|
|
}
|
1410 |
|
|
{
|
1411 |
|
|
int referenced = 0;
|
1412 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1413 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1414 |
|
|
}
|
1415 |
|
|
return cycles;
|
1416 |
|
|
#undef FLD
|
1417 |
|
|
}
|
1418 |
|
|
|
1419 |
|
|
static int
|
1420 |
|
|
model_crisv10_addcpc (SIM_CPU *current_cpu, void *sem_arg)
|
1421 |
|
|
{
|
1422 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
1423 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1424 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1425 |
|
|
int cycles = 0;
|
1426 |
|
|
{
|
1427 |
|
|
int referenced = 0;
|
1428 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1429 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1430 |
|
|
}
|
1431 |
|
|
{
|
1432 |
|
|
int referenced = 0;
|
1433 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1434 |
|
|
cycles += crisv10f_model_crisv10_u_stall (current_cpu, idesc, 1, referenced);
|
1435 |
|
|
}
|
1436 |
|
|
{
|
1437 |
|
|
int referenced = 0;
|
1438 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1439 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 2, referenced);
|
1440 |
|
|
}
|
1441 |
|
|
return cycles;
|
1442 |
|
|
#undef FLD
|
1443 |
|
|
}
|
1444 |
|
|
|
1445 |
|
|
static int
|
1446 |
|
|
model_crisv10_adds_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1447 |
|
|
{
|
1448 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1449 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1450 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1451 |
|
|
int cycles = 0;
|
1452 |
|
|
{
|
1453 |
|
|
int referenced = 0;
|
1454 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1455 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1456 |
|
|
}
|
1457 |
|
|
return cycles;
|
1458 |
|
|
#undef FLD
|
1459 |
|
|
}
|
1460 |
|
|
|
1461 |
|
|
static int
|
1462 |
|
|
model_crisv10_adds_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
1463 |
|
|
{
|
1464 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1465 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1466 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1467 |
|
|
int cycles = 0;
|
1468 |
|
|
{
|
1469 |
|
|
int referenced = 0;
|
1470 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1471 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1472 |
|
|
}
|
1473 |
|
|
return cycles;
|
1474 |
|
|
#undef FLD
|
1475 |
|
|
}
|
1476 |
|
|
|
1477 |
|
|
static int
|
1478 |
|
|
model_crisv10_adds_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
1479 |
|
|
{
|
1480 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1481 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1482 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1483 |
|
|
int cycles = 0;
|
1484 |
|
|
{
|
1485 |
|
|
int referenced = 0;
|
1486 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1487 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1488 |
|
|
}
|
1489 |
|
|
{
|
1490 |
|
|
int referenced = 0;
|
1491 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1492 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1493 |
|
|
}
|
1494 |
|
|
return cycles;
|
1495 |
|
|
#undef FLD
|
1496 |
|
|
}
|
1497 |
|
|
|
1498 |
|
|
static int
|
1499 |
|
|
model_crisv10_adds_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
1500 |
|
|
{
|
1501 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1502 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1503 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1504 |
|
|
int cycles = 0;
|
1505 |
|
|
{
|
1506 |
|
|
int referenced = 0;
|
1507 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1508 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1509 |
|
|
}
|
1510 |
|
|
{
|
1511 |
|
|
int referenced = 0;
|
1512 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1513 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1514 |
|
|
}
|
1515 |
|
|
return cycles;
|
1516 |
|
|
#undef FLD
|
1517 |
|
|
}
|
1518 |
|
|
|
1519 |
|
|
static int
|
1520 |
|
|
model_crisv10_addscbr (SIM_CPU *current_cpu, void *sem_arg)
|
1521 |
|
|
{
|
1522 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
1523 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1524 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1525 |
|
|
int cycles = 0;
|
1526 |
|
|
{
|
1527 |
|
|
int referenced = 0;
|
1528 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1529 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1530 |
|
|
}
|
1531 |
|
|
{
|
1532 |
|
|
int referenced = 0;
|
1533 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1534 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1535 |
|
|
}
|
1536 |
|
|
return cycles;
|
1537 |
|
|
#undef FLD
|
1538 |
|
|
}
|
1539 |
|
|
|
1540 |
|
|
static int
|
1541 |
|
|
model_crisv10_addscwr (SIM_CPU *current_cpu, void *sem_arg)
|
1542 |
|
|
{
|
1543 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
1544 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1545 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1546 |
|
|
int cycles = 0;
|
1547 |
|
|
{
|
1548 |
|
|
int referenced = 0;
|
1549 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1550 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1551 |
|
|
}
|
1552 |
|
|
{
|
1553 |
|
|
int referenced = 0;
|
1554 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1555 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1556 |
|
|
}
|
1557 |
|
|
return cycles;
|
1558 |
|
|
#undef FLD
|
1559 |
|
|
}
|
1560 |
|
|
|
1561 |
|
|
static int
|
1562 |
|
|
model_crisv10_addspcpc (SIM_CPU *current_cpu, void *sem_arg)
|
1563 |
|
|
{
|
1564 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
1565 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1566 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1567 |
|
|
int cycles = 0;
|
1568 |
|
|
{
|
1569 |
|
|
int referenced = 0;
|
1570 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1571 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1572 |
|
|
}
|
1573 |
|
|
{
|
1574 |
|
|
int referenced = 0;
|
1575 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1576 |
|
|
cycles += crisv10f_model_crisv10_u_stall (current_cpu, idesc, 1, referenced);
|
1577 |
|
|
}
|
1578 |
|
|
{
|
1579 |
|
|
int referenced = 0;
|
1580 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1581 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 2, referenced);
|
1582 |
|
|
}
|
1583 |
|
|
return cycles;
|
1584 |
|
|
#undef FLD
|
1585 |
|
|
}
|
1586 |
|
|
|
1587 |
|
|
static int
|
1588 |
|
|
model_crisv10_addu_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1589 |
|
|
{
|
1590 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1591 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1592 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1593 |
|
|
int cycles = 0;
|
1594 |
|
|
{
|
1595 |
|
|
int referenced = 0;
|
1596 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1597 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1598 |
|
|
}
|
1599 |
|
|
return cycles;
|
1600 |
|
|
#undef FLD
|
1601 |
|
|
}
|
1602 |
|
|
|
1603 |
|
|
static int
|
1604 |
|
|
model_crisv10_addu_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
1605 |
|
|
{
|
1606 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1607 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1608 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1609 |
|
|
int cycles = 0;
|
1610 |
|
|
{
|
1611 |
|
|
int referenced = 0;
|
1612 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1613 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1614 |
|
|
}
|
1615 |
|
|
return cycles;
|
1616 |
|
|
#undef FLD
|
1617 |
|
|
}
|
1618 |
|
|
|
1619 |
|
|
static int
|
1620 |
|
|
model_crisv10_addu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
1621 |
|
|
{
|
1622 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1623 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1624 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1625 |
|
|
int cycles = 0;
|
1626 |
|
|
{
|
1627 |
|
|
int referenced = 0;
|
1628 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1629 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1630 |
|
|
}
|
1631 |
|
|
{
|
1632 |
|
|
int referenced = 0;
|
1633 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1634 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1635 |
|
|
}
|
1636 |
|
|
return cycles;
|
1637 |
|
|
#undef FLD
|
1638 |
|
|
}
|
1639 |
|
|
|
1640 |
|
|
static int
|
1641 |
|
|
model_crisv10_addu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
1642 |
|
|
{
|
1643 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1644 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1645 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1646 |
|
|
int cycles = 0;
|
1647 |
|
|
{
|
1648 |
|
|
int referenced = 0;
|
1649 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1650 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1651 |
|
|
}
|
1652 |
|
|
{
|
1653 |
|
|
int referenced = 0;
|
1654 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1655 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1656 |
|
|
}
|
1657 |
|
|
return cycles;
|
1658 |
|
|
#undef FLD
|
1659 |
|
|
}
|
1660 |
|
|
|
1661 |
|
|
static int
|
1662 |
|
|
model_crisv10_adducbr (SIM_CPU *current_cpu, void *sem_arg)
|
1663 |
|
|
{
|
1664 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
1665 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1666 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1667 |
|
|
int cycles = 0;
|
1668 |
|
|
{
|
1669 |
|
|
int referenced = 0;
|
1670 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1671 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1672 |
|
|
}
|
1673 |
|
|
{
|
1674 |
|
|
int referenced = 0;
|
1675 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1676 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1677 |
|
|
}
|
1678 |
|
|
return cycles;
|
1679 |
|
|
#undef FLD
|
1680 |
|
|
}
|
1681 |
|
|
|
1682 |
|
|
static int
|
1683 |
|
|
model_crisv10_adducwr (SIM_CPU *current_cpu, void *sem_arg)
|
1684 |
|
|
{
|
1685 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
1686 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1687 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1688 |
|
|
int cycles = 0;
|
1689 |
|
|
{
|
1690 |
|
|
int referenced = 0;
|
1691 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1692 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1693 |
|
|
}
|
1694 |
|
|
{
|
1695 |
|
|
int referenced = 0;
|
1696 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1697 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1698 |
|
|
}
|
1699 |
|
|
return cycles;
|
1700 |
|
|
#undef FLD
|
1701 |
|
|
}
|
1702 |
|
|
|
1703 |
|
|
static int
|
1704 |
|
|
model_crisv10_sub_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1705 |
|
|
{
|
1706 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1707 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1708 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1709 |
|
|
int cycles = 0;
|
1710 |
|
|
{
|
1711 |
|
|
int referenced = 0;
|
1712 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1713 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1714 |
|
|
}
|
1715 |
|
|
return cycles;
|
1716 |
|
|
#undef FLD
|
1717 |
|
|
}
|
1718 |
|
|
|
1719 |
|
|
static int
|
1720 |
|
|
model_crisv10_sub_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
1721 |
|
|
{
|
1722 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1723 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1724 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1725 |
|
|
int cycles = 0;
|
1726 |
|
|
{
|
1727 |
|
|
int referenced = 0;
|
1728 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1729 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1730 |
|
|
}
|
1731 |
|
|
return cycles;
|
1732 |
|
|
#undef FLD
|
1733 |
|
|
}
|
1734 |
|
|
|
1735 |
|
|
static int
|
1736 |
|
|
model_crisv10_sub_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
1737 |
|
|
{
|
1738 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1739 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1740 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1741 |
|
|
int cycles = 0;
|
1742 |
|
|
{
|
1743 |
|
|
int referenced = 0;
|
1744 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1745 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1746 |
|
|
}
|
1747 |
|
|
return cycles;
|
1748 |
|
|
#undef FLD
|
1749 |
|
|
}
|
1750 |
|
|
|
1751 |
|
|
static int
|
1752 |
|
|
model_crisv10_sub_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
1753 |
|
|
{
|
1754 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1755 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1756 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1757 |
|
|
int cycles = 0;
|
1758 |
|
|
{
|
1759 |
|
|
int referenced = 0;
|
1760 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1761 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1762 |
|
|
}
|
1763 |
|
|
{
|
1764 |
|
|
int referenced = 0;
|
1765 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1766 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1767 |
|
|
}
|
1768 |
|
|
return cycles;
|
1769 |
|
|
#undef FLD
|
1770 |
|
|
}
|
1771 |
|
|
|
1772 |
|
|
static int
|
1773 |
|
|
model_crisv10_sub_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
1774 |
|
|
{
|
1775 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1776 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1777 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1778 |
|
|
int cycles = 0;
|
1779 |
|
|
{
|
1780 |
|
|
int referenced = 0;
|
1781 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1782 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1783 |
|
|
}
|
1784 |
|
|
{
|
1785 |
|
|
int referenced = 0;
|
1786 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1787 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1788 |
|
|
}
|
1789 |
|
|
return cycles;
|
1790 |
|
|
#undef FLD
|
1791 |
|
|
}
|
1792 |
|
|
|
1793 |
|
|
static int
|
1794 |
|
|
model_crisv10_sub_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
1795 |
|
|
{
|
1796 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1797 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1798 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1799 |
|
|
int cycles = 0;
|
1800 |
|
|
{
|
1801 |
|
|
int referenced = 0;
|
1802 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1803 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1804 |
|
|
}
|
1805 |
|
|
{
|
1806 |
|
|
int referenced = 0;
|
1807 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1808 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1809 |
|
|
}
|
1810 |
|
|
return cycles;
|
1811 |
|
|
#undef FLD
|
1812 |
|
|
}
|
1813 |
|
|
|
1814 |
|
|
static int
|
1815 |
|
|
model_crisv10_subcbr (SIM_CPU *current_cpu, void *sem_arg)
|
1816 |
|
|
{
|
1817 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
1818 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1819 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1820 |
|
|
int cycles = 0;
|
1821 |
|
|
{
|
1822 |
|
|
int referenced = 0;
|
1823 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1824 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1825 |
|
|
}
|
1826 |
|
|
{
|
1827 |
|
|
int referenced = 0;
|
1828 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1829 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1830 |
|
|
}
|
1831 |
|
|
return cycles;
|
1832 |
|
|
#undef FLD
|
1833 |
|
|
}
|
1834 |
|
|
|
1835 |
|
|
static int
|
1836 |
|
|
model_crisv10_subcwr (SIM_CPU *current_cpu, void *sem_arg)
|
1837 |
|
|
{
|
1838 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
1839 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1840 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1841 |
|
|
int cycles = 0;
|
1842 |
|
|
{
|
1843 |
|
|
int referenced = 0;
|
1844 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1845 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1846 |
|
|
}
|
1847 |
|
|
{
|
1848 |
|
|
int referenced = 0;
|
1849 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1850 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1851 |
|
|
}
|
1852 |
|
|
return cycles;
|
1853 |
|
|
#undef FLD
|
1854 |
|
|
}
|
1855 |
|
|
|
1856 |
|
|
static int
|
1857 |
|
|
model_crisv10_subcdr (SIM_CPU *current_cpu, void *sem_arg)
|
1858 |
|
|
{
|
1859 |
|
|
#define FLD(f) abuf->fields.sfmt_addcdr.f
|
1860 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1861 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1862 |
|
|
int cycles = 0;
|
1863 |
|
|
{
|
1864 |
|
|
int referenced = 0;
|
1865 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1866 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
1867 |
|
|
}
|
1868 |
|
|
{
|
1869 |
|
|
int referenced = 0;
|
1870 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1871 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1872 |
|
|
}
|
1873 |
|
|
return cycles;
|
1874 |
|
|
#undef FLD
|
1875 |
|
|
}
|
1876 |
|
|
|
1877 |
|
|
static int
|
1878 |
|
|
model_crisv10_subs_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1879 |
|
|
{
|
1880 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1881 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1882 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1883 |
|
|
int cycles = 0;
|
1884 |
|
|
{
|
1885 |
|
|
int referenced = 0;
|
1886 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1887 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1888 |
|
|
}
|
1889 |
|
|
return cycles;
|
1890 |
|
|
#undef FLD
|
1891 |
|
|
}
|
1892 |
|
|
|
1893 |
|
|
static int
|
1894 |
|
|
model_crisv10_subs_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
1895 |
|
|
{
|
1896 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1897 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1898 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1899 |
|
|
int cycles = 0;
|
1900 |
|
|
{
|
1901 |
|
|
int referenced = 0;
|
1902 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1903 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
1904 |
|
|
}
|
1905 |
|
|
return cycles;
|
1906 |
|
|
#undef FLD
|
1907 |
|
|
}
|
1908 |
|
|
|
1909 |
|
|
static int
|
1910 |
|
|
model_crisv10_subs_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
1911 |
|
|
{
|
1912 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1913 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1914 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1915 |
|
|
int cycles = 0;
|
1916 |
|
|
{
|
1917 |
|
|
int referenced = 0;
|
1918 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1919 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1920 |
|
|
}
|
1921 |
|
|
{
|
1922 |
|
|
int referenced = 0;
|
1923 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1924 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1925 |
|
|
}
|
1926 |
|
|
return cycles;
|
1927 |
|
|
#undef FLD
|
1928 |
|
|
}
|
1929 |
|
|
|
1930 |
|
|
static int
|
1931 |
|
|
model_crisv10_subs_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
1932 |
|
|
{
|
1933 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
1934 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1935 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1936 |
|
|
int cycles = 0;
|
1937 |
|
|
{
|
1938 |
|
|
int referenced = 0;
|
1939 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1940 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
1941 |
|
|
}
|
1942 |
|
|
{
|
1943 |
|
|
int referenced = 0;
|
1944 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1945 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1946 |
|
|
}
|
1947 |
|
|
return cycles;
|
1948 |
|
|
#undef FLD
|
1949 |
|
|
}
|
1950 |
|
|
|
1951 |
|
|
static int
|
1952 |
|
|
model_crisv10_subscbr (SIM_CPU *current_cpu, void *sem_arg)
|
1953 |
|
|
{
|
1954 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
1955 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1956 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1957 |
|
|
int cycles = 0;
|
1958 |
|
|
{
|
1959 |
|
|
int referenced = 0;
|
1960 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1961 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1962 |
|
|
}
|
1963 |
|
|
{
|
1964 |
|
|
int referenced = 0;
|
1965 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1966 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1967 |
|
|
}
|
1968 |
|
|
return cycles;
|
1969 |
|
|
#undef FLD
|
1970 |
|
|
}
|
1971 |
|
|
|
1972 |
|
|
static int
|
1973 |
|
|
model_crisv10_subscwr (SIM_CPU *current_cpu, void *sem_arg)
|
1974 |
|
|
{
|
1975 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
1976 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1977 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1978 |
|
|
int cycles = 0;
|
1979 |
|
|
{
|
1980 |
|
|
int referenced = 0;
|
1981 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1982 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
1983 |
|
|
}
|
1984 |
|
|
{
|
1985 |
|
|
int referenced = 0;
|
1986 |
|
|
int UNUSED insn_referenced = abuf->written;
|
1987 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
1988 |
|
|
}
|
1989 |
|
|
return cycles;
|
1990 |
|
|
#undef FLD
|
1991 |
|
|
}
|
1992 |
|
|
|
1993 |
|
|
static int
|
1994 |
|
|
model_crisv10_subu_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
1995 |
|
|
{
|
1996 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
1997 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
1998 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
1999 |
|
|
int cycles = 0;
|
2000 |
|
|
{
|
2001 |
|
|
int referenced = 0;
|
2002 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2003 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2004 |
|
|
}
|
2005 |
|
|
return cycles;
|
2006 |
|
|
#undef FLD
|
2007 |
|
|
}
|
2008 |
|
|
|
2009 |
|
|
static int
|
2010 |
|
|
model_crisv10_subu_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2011 |
|
|
{
|
2012 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2013 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2014 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2015 |
|
|
int cycles = 0;
|
2016 |
|
|
{
|
2017 |
|
|
int referenced = 0;
|
2018 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2019 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2020 |
|
|
}
|
2021 |
|
|
return cycles;
|
2022 |
|
|
#undef FLD
|
2023 |
|
|
}
|
2024 |
|
|
|
2025 |
|
|
static int
|
2026 |
|
|
model_crisv10_subu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
2027 |
|
|
{
|
2028 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2029 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2030 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2031 |
|
|
int cycles = 0;
|
2032 |
|
|
{
|
2033 |
|
|
int referenced = 0;
|
2034 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2035 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2036 |
|
|
}
|
2037 |
|
|
{
|
2038 |
|
|
int referenced = 0;
|
2039 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2040 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2041 |
|
|
}
|
2042 |
|
|
return cycles;
|
2043 |
|
|
#undef FLD
|
2044 |
|
|
}
|
2045 |
|
|
|
2046 |
|
|
static int
|
2047 |
|
|
model_crisv10_subu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
2048 |
|
|
{
|
2049 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2050 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2051 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2052 |
|
|
int cycles = 0;
|
2053 |
|
|
{
|
2054 |
|
|
int referenced = 0;
|
2055 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2056 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2057 |
|
|
}
|
2058 |
|
|
{
|
2059 |
|
|
int referenced = 0;
|
2060 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2061 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2062 |
|
|
}
|
2063 |
|
|
return cycles;
|
2064 |
|
|
#undef FLD
|
2065 |
|
|
}
|
2066 |
|
|
|
2067 |
|
|
static int
|
2068 |
|
|
model_crisv10_subucbr (SIM_CPU *current_cpu, void *sem_arg)
|
2069 |
|
|
{
|
2070 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
2071 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2072 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2073 |
|
|
int cycles = 0;
|
2074 |
|
|
{
|
2075 |
|
|
int referenced = 0;
|
2076 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2077 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2078 |
|
|
}
|
2079 |
|
|
{
|
2080 |
|
|
int referenced = 0;
|
2081 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2082 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2083 |
|
|
}
|
2084 |
|
|
return cycles;
|
2085 |
|
|
#undef FLD
|
2086 |
|
|
}
|
2087 |
|
|
|
2088 |
|
|
static int
|
2089 |
|
|
model_crisv10_subucwr (SIM_CPU *current_cpu, void *sem_arg)
|
2090 |
|
|
{
|
2091 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
2092 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2093 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2094 |
|
|
int cycles = 0;
|
2095 |
|
|
{
|
2096 |
|
|
int referenced = 0;
|
2097 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2098 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2099 |
|
|
}
|
2100 |
|
|
{
|
2101 |
|
|
int referenced = 0;
|
2102 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2103 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2104 |
|
|
}
|
2105 |
|
|
return cycles;
|
2106 |
|
|
#undef FLD
|
2107 |
|
|
}
|
2108 |
|
|
|
2109 |
|
|
static int
|
2110 |
|
|
model_crisv10_addi_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2111 |
|
|
{
|
2112 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2113 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2114 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2115 |
|
|
int cycles = 0;
|
2116 |
|
|
{
|
2117 |
|
|
int referenced = 0;
|
2118 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2119 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2120 |
|
|
}
|
2121 |
|
|
return cycles;
|
2122 |
|
|
#undef FLD
|
2123 |
|
|
}
|
2124 |
|
|
|
2125 |
|
|
static int
|
2126 |
|
|
model_crisv10_addi_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2127 |
|
|
{
|
2128 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2129 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2130 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2131 |
|
|
int cycles = 0;
|
2132 |
|
|
{
|
2133 |
|
|
int referenced = 0;
|
2134 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2135 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2136 |
|
|
}
|
2137 |
|
|
return cycles;
|
2138 |
|
|
#undef FLD
|
2139 |
|
|
}
|
2140 |
|
|
|
2141 |
|
|
static int
|
2142 |
|
|
model_crisv10_addi_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
2143 |
|
|
{
|
2144 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2145 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2146 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2147 |
|
|
int cycles = 0;
|
2148 |
|
|
{
|
2149 |
|
|
int referenced = 0;
|
2150 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2151 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2152 |
|
|
}
|
2153 |
|
|
return cycles;
|
2154 |
|
|
#undef FLD
|
2155 |
|
|
}
|
2156 |
|
|
|
2157 |
|
|
static int
|
2158 |
|
|
model_crisv10_neg_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2159 |
|
|
{
|
2160 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2161 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2162 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2163 |
|
|
int cycles = 0;
|
2164 |
|
|
{
|
2165 |
|
|
int referenced = 0;
|
2166 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2167 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2168 |
|
|
}
|
2169 |
|
|
return cycles;
|
2170 |
|
|
#undef FLD
|
2171 |
|
|
}
|
2172 |
|
|
|
2173 |
|
|
static int
|
2174 |
|
|
model_crisv10_neg_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2175 |
|
|
{
|
2176 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2177 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2178 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2179 |
|
|
int cycles = 0;
|
2180 |
|
|
{
|
2181 |
|
|
int referenced = 0;
|
2182 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2183 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2184 |
|
|
}
|
2185 |
|
|
return cycles;
|
2186 |
|
|
#undef FLD
|
2187 |
|
|
}
|
2188 |
|
|
|
2189 |
|
|
static int
|
2190 |
|
|
model_crisv10_neg_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
2191 |
|
|
{
|
2192 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2193 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2194 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2195 |
|
|
int cycles = 0;
|
2196 |
|
|
{
|
2197 |
|
|
int referenced = 0;
|
2198 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2199 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2200 |
|
|
}
|
2201 |
|
|
return cycles;
|
2202 |
|
|
#undef FLD
|
2203 |
|
|
}
|
2204 |
|
|
|
2205 |
|
|
static int
|
2206 |
|
|
model_crisv10_test_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
2207 |
|
|
{
|
2208 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
2209 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2210 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2211 |
|
|
int cycles = 0;
|
2212 |
|
|
{
|
2213 |
|
|
int referenced = 0;
|
2214 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2215 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2216 |
|
|
}
|
2217 |
|
|
{
|
2218 |
|
|
int referenced = 0;
|
2219 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2220 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2221 |
|
|
}
|
2222 |
|
|
return cycles;
|
2223 |
|
|
#undef FLD
|
2224 |
|
|
}
|
2225 |
|
|
|
2226 |
|
|
static int
|
2227 |
|
|
model_crisv10_test_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
2228 |
|
|
{
|
2229 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
2230 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2231 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2232 |
|
|
int cycles = 0;
|
2233 |
|
|
{
|
2234 |
|
|
int referenced = 0;
|
2235 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2236 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2237 |
|
|
}
|
2238 |
|
|
{
|
2239 |
|
|
int referenced = 0;
|
2240 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2241 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2242 |
|
|
}
|
2243 |
|
|
return cycles;
|
2244 |
|
|
#undef FLD
|
2245 |
|
|
}
|
2246 |
|
|
|
2247 |
|
|
static int
|
2248 |
|
|
model_crisv10_test_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
2249 |
|
|
{
|
2250 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
2251 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2252 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2253 |
|
|
int cycles = 0;
|
2254 |
|
|
{
|
2255 |
|
|
int referenced = 0;
|
2256 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2257 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2258 |
|
|
}
|
2259 |
|
|
{
|
2260 |
|
|
int referenced = 0;
|
2261 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2262 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2263 |
|
|
}
|
2264 |
|
|
return cycles;
|
2265 |
|
|
#undef FLD
|
2266 |
|
|
}
|
2267 |
|
|
|
2268 |
|
|
static int
|
2269 |
|
|
model_crisv10_move_r_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
2270 |
|
|
{
|
2271 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2272 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2273 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2274 |
|
|
int cycles = 0;
|
2275 |
|
|
{
|
2276 |
|
|
int referenced = 0;
|
2277 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2278 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2279 |
|
|
}
|
2280 |
|
|
{
|
2281 |
|
|
int referenced = 0;
|
2282 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2283 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2284 |
|
|
}
|
2285 |
|
|
return cycles;
|
2286 |
|
|
#undef FLD
|
2287 |
|
|
}
|
2288 |
|
|
|
2289 |
|
|
static int
|
2290 |
|
|
model_crisv10_move_r_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
2291 |
|
|
{
|
2292 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2293 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2294 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2295 |
|
|
int cycles = 0;
|
2296 |
|
|
{
|
2297 |
|
|
int referenced = 0;
|
2298 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2299 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2300 |
|
|
}
|
2301 |
|
|
{
|
2302 |
|
|
int referenced = 0;
|
2303 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2304 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2305 |
|
|
}
|
2306 |
|
|
return cycles;
|
2307 |
|
|
#undef FLD
|
2308 |
|
|
}
|
2309 |
|
|
|
2310 |
|
|
static int
|
2311 |
|
|
model_crisv10_move_r_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
2312 |
|
|
{
|
2313 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
2314 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2315 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2316 |
|
|
int cycles = 0;
|
2317 |
|
|
{
|
2318 |
|
|
int referenced = 0;
|
2319 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2320 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2321 |
|
|
}
|
2322 |
|
|
{
|
2323 |
|
|
int referenced = 0;
|
2324 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2325 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2326 |
|
|
}
|
2327 |
|
|
return cycles;
|
2328 |
|
|
#undef FLD
|
2329 |
|
|
}
|
2330 |
|
|
|
2331 |
|
|
static int
|
2332 |
|
|
model_crisv10_muls_b (SIM_CPU *current_cpu, void *sem_arg)
|
2333 |
|
|
{
|
2334 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2335 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2336 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2337 |
|
|
int cycles = 0;
|
2338 |
|
|
{
|
2339 |
|
|
int referenced = 0;
|
2340 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2341 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2342 |
|
|
}
|
2343 |
|
|
{
|
2344 |
|
|
int referenced = 0;
|
2345 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2346 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2347 |
|
|
}
|
2348 |
|
|
return cycles;
|
2349 |
|
|
#undef FLD
|
2350 |
|
|
}
|
2351 |
|
|
|
2352 |
|
|
static int
|
2353 |
|
|
model_crisv10_muls_w (SIM_CPU *current_cpu, void *sem_arg)
|
2354 |
|
|
{
|
2355 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2356 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2357 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2358 |
|
|
int cycles = 0;
|
2359 |
|
|
{
|
2360 |
|
|
int referenced = 0;
|
2361 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2362 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2363 |
|
|
}
|
2364 |
|
|
{
|
2365 |
|
|
int referenced = 0;
|
2366 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2367 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2368 |
|
|
}
|
2369 |
|
|
return cycles;
|
2370 |
|
|
#undef FLD
|
2371 |
|
|
}
|
2372 |
|
|
|
2373 |
|
|
static int
|
2374 |
|
|
model_crisv10_muls_d (SIM_CPU *current_cpu, void *sem_arg)
|
2375 |
|
|
{
|
2376 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2377 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2378 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2379 |
|
|
int cycles = 0;
|
2380 |
|
|
{
|
2381 |
|
|
int referenced = 0;
|
2382 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2383 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2384 |
|
|
}
|
2385 |
|
|
{
|
2386 |
|
|
int referenced = 0;
|
2387 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2388 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2389 |
|
|
}
|
2390 |
|
|
return cycles;
|
2391 |
|
|
#undef FLD
|
2392 |
|
|
}
|
2393 |
|
|
|
2394 |
|
|
static int
|
2395 |
|
|
model_crisv10_mulu_b (SIM_CPU *current_cpu, void *sem_arg)
|
2396 |
|
|
{
|
2397 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2398 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2399 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2400 |
|
|
int cycles = 0;
|
2401 |
|
|
{
|
2402 |
|
|
int referenced = 0;
|
2403 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2404 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2405 |
|
|
}
|
2406 |
|
|
{
|
2407 |
|
|
int referenced = 0;
|
2408 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2409 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2410 |
|
|
}
|
2411 |
|
|
return cycles;
|
2412 |
|
|
#undef FLD
|
2413 |
|
|
}
|
2414 |
|
|
|
2415 |
|
|
static int
|
2416 |
|
|
model_crisv10_mulu_w (SIM_CPU *current_cpu, void *sem_arg)
|
2417 |
|
|
{
|
2418 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2419 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2420 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2421 |
|
|
int cycles = 0;
|
2422 |
|
|
{
|
2423 |
|
|
int referenced = 0;
|
2424 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2425 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2426 |
|
|
}
|
2427 |
|
|
{
|
2428 |
|
|
int referenced = 0;
|
2429 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2430 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2431 |
|
|
}
|
2432 |
|
|
return cycles;
|
2433 |
|
|
#undef FLD
|
2434 |
|
|
}
|
2435 |
|
|
|
2436 |
|
|
static int
|
2437 |
|
|
model_crisv10_mulu_d (SIM_CPU *current_cpu, void *sem_arg)
|
2438 |
|
|
{
|
2439 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2440 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2441 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2442 |
|
|
int cycles = 0;
|
2443 |
|
|
{
|
2444 |
|
|
int referenced = 0;
|
2445 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2446 |
|
|
cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
|
2447 |
|
|
}
|
2448 |
|
|
{
|
2449 |
|
|
int referenced = 0;
|
2450 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2451 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2452 |
|
|
}
|
2453 |
|
|
return cycles;
|
2454 |
|
|
#undef FLD
|
2455 |
|
|
}
|
2456 |
|
|
|
2457 |
|
|
static int
|
2458 |
|
|
model_crisv10_mstep (SIM_CPU *current_cpu, void *sem_arg)
|
2459 |
|
|
{
|
2460 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2461 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2462 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2463 |
|
|
int cycles = 0;
|
2464 |
|
|
{
|
2465 |
|
|
int referenced = 0;
|
2466 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2467 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2468 |
|
|
}
|
2469 |
|
|
return cycles;
|
2470 |
|
|
#undef FLD
|
2471 |
|
|
}
|
2472 |
|
|
|
2473 |
|
|
static int
|
2474 |
|
|
model_crisv10_dstep (SIM_CPU *current_cpu, void *sem_arg)
|
2475 |
|
|
{
|
2476 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2477 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2478 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2479 |
|
|
int cycles = 0;
|
2480 |
|
|
{
|
2481 |
|
|
int referenced = 0;
|
2482 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2483 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2484 |
|
|
}
|
2485 |
|
|
return cycles;
|
2486 |
|
|
#undef FLD
|
2487 |
|
|
}
|
2488 |
|
|
|
2489 |
|
|
static int
|
2490 |
|
|
model_crisv10_abs (SIM_CPU *current_cpu, void *sem_arg)
|
2491 |
|
|
{
|
2492 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2493 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2494 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2495 |
|
|
int cycles = 0;
|
2496 |
|
|
{
|
2497 |
|
|
int referenced = 0;
|
2498 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2499 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2500 |
|
|
}
|
2501 |
|
|
return cycles;
|
2502 |
|
|
#undef FLD
|
2503 |
|
|
}
|
2504 |
|
|
|
2505 |
|
|
static int
|
2506 |
|
|
model_crisv10_and_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2507 |
|
|
{
|
2508 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2509 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2510 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2511 |
|
|
int cycles = 0;
|
2512 |
|
|
{
|
2513 |
|
|
int referenced = 0;
|
2514 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2515 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2516 |
|
|
}
|
2517 |
|
|
return cycles;
|
2518 |
|
|
#undef FLD
|
2519 |
|
|
}
|
2520 |
|
|
|
2521 |
|
|
static int
|
2522 |
|
|
model_crisv10_and_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2523 |
|
|
{
|
2524 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2525 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2526 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2527 |
|
|
int cycles = 0;
|
2528 |
|
|
{
|
2529 |
|
|
int referenced = 0;
|
2530 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2531 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2532 |
|
|
}
|
2533 |
|
|
return cycles;
|
2534 |
|
|
#undef FLD
|
2535 |
|
|
}
|
2536 |
|
|
|
2537 |
|
|
static int
|
2538 |
|
|
model_crisv10_and_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
2539 |
|
|
{
|
2540 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2541 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2542 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2543 |
|
|
int cycles = 0;
|
2544 |
|
|
{
|
2545 |
|
|
int referenced = 0;
|
2546 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2547 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2548 |
|
|
}
|
2549 |
|
|
return cycles;
|
2550 |
|
|
#undef FLD
|
2551 |
|
|
}
|
2552 |
|
|
|
2553 |
|
|
static int
|
2554 |
|
|
model_crisv10_and_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
2555 |
|
|
{
|
2556 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2557 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2558 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2559 |
|
|
int cycles = 0;
|
2560 |
|
|
{
|
2561 |
|
|
int referenced = 0;
|
2562 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2563 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2564 |
|
|
}
|
2565 |
|
|
{
|
2566 |
|
|
int referenced = 0;
|
2567 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2568 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2569 |
|
|
}
|
2570 |
|
|
return cycles;
|
2571 |
|
|
#undef FLD
|
2572 |
|
|
}
|
2573 |
|
|
|
2574 |
|
|
static int
|
2575 |
|
|
model_crisv10_and_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
2576 |
|
|
{
|
2577 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2578 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2579 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2580 |
|
|
int cycles = 0;
|
2581 |
|
|
{
|
2582 |
|
|
int referenced = 0;
|
2583 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2584 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2585 |
|
|
}
|
2586 |
|
|
{
|
2587 |
|
|
int referenced = 0;
|
2588 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2589 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2590 |
|
|
}
|
2591 |
|
|
return cycles;
|
2592 |
|
|
#undef FLD
|
2593 |
|
|
}
|
2594 |
|
|
|
2595 |
|
|
static int
|
2596 |
|
|
model_crisv10_and_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
2597 |
|
|
{
|
2598 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2599 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2600 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2601 |
|
|
int cycles = 0;
|
2602 |
|
|
{
|
2603 |
|
|
int referenced = 0;
|
2604 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2605 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2606 |
|
|
}
|
2607 |
|
|
{
|
2608 |
|
|
int referenced = 0;
|
2609 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2610 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2611 |
|
|
}
|
2612 |
|
|
return cycles;
|
2613 |
|
|
#undef FLD
|
2614 |
|
|
}
|
2615 |
|
|
|
2616 |
|
|
static int
|
2617 |
|
|
model_crisv10_andcbr (SIM_CPU *current_cpu, void *sem_arg)
|
2618 |
|
|
{
|
2619 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
2620 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2621 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2622 |
|
|
int cycles = 0;
|
2623 |
|
|
{
|
2624 |
|
|
int referenced = 0;
|
2625 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2626 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2627 |
|
|
}
|
2628 |
|
|
{
|
2629 |
|
|
int referenced = 0;
|
2630 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2631 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2632 |
|
|
}
|
2633 |
|
|
return cycles;
|
2634 |
|
|
#undef FLD
|
2635 |
|
|
}
|
2636 |
|
|
|
2637 |
|
|
static int
|
2638 |
|
|
model_crisv10_andcwr (SIM_CPU *current_cpu, void *sem_arg)
|
2639 |
|
|
{
|
2640 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
2641 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2642 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2643 |
|
|
int cycles = 0;
|
2644 |
|
|
{
|
2645 |
|
|
int referenced = 0;
|
2646 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2647 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2648 |
|
|
}
|
2649 |
|
|
{
|
2650 |
|
|
int referenced = 0;
|
2651 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2652 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2653 |
|
|
}
|
2654 |
|
|
return cycles;
|
2655 |
|
|
#undef FLD
|
2656 |
|
|
}
|
2657 |
|
|
|
2658 |
|
|
static int
|
2659 |
|
|
model_crisv10_andcdr (SIM_CPU *current_cpu, void *sem_arg)
|
2660 |
|
|
{
|
2661 |
|
|
#define FLD(f) abuf->fields.sfmt_addcdr.f
|
2662 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2663 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2664 |
|
|
int cycles = 0;
|
2665 |
|
|
{
|
2666 |
|
|
int referenced = 0;
|
2667 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2668 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
2669 |
|
|
}
|
2670 |
|
|
{
|
2671 |
|
|
int referenced = 0;
|
2672 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2673 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2674 |
|
|
}
|
2675 |
|
|
return cycles;
|
2676 |
|
|
#undef FLD
|
2677 |
|
|
}
|
2678 |
|
|
|
2679 |
|
|
static int
|
2680 |
|
|
model_crisv10_andq (SIM_CPU *current_cpu, void *sem_arg)
|
2681 |
|
|
{
|
2682 |
|
|
#define FLD(f) abuf->fields.sfmt_andq.f
|
2683 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2684 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2685 |
|
|
int cycles = 0;
|
2686 |
|
|
{
|
2687 |
|
|
int referenced = 0;
|
2688 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2689 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2690 |
|
|
}
|
2691 |
|
|
return cycles;
|
2692 |
|
|
#undef FLD
|
2693 |
|
|
}
|
2694 |
|
|
|
2695 |
|
|
static int
|
2696 |
|
|
model_crisv10_orr_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2697 |
|
|
{
|
2698 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2699 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2700 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2701 |
|
|
int cycles = 0;
|
2702 |
|
|
{
|
2703 |
|
|
int referenced = 0;
|
2704 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2705 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2706 |
|
|
}
|
2707 |
|
|
return cycles;
|
2708 |
|
|
#undef FLD
|
2709 |
|
|
}
|
2710 |
|
|
|
2711 |
|
|
static int
|
2712 |
|
|
model_crisv10_orr_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2713 |
|
|
{
|
2714 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2715 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2716 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2717 |
|
|
int cycles = 0;
|
2718 |
|
|
{
|
2719 |
|
|
int referenced = 0;
|
2720 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2721 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2722 |
|
|
}
|
2723 |
|
|
return cycles;
|
2724 |
|
|
#undef FLD
|
2725 |
|
|
}
|
2726 |
|
|
|
2727 |
|
|
static int
|
2728 |
|
|
model_crisv10_orr_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
2729 |
|
|
{
|
2730 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2731 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2732 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2733 |
|
|
int cycles = 0;
|
2734 |
|
|
{
|
2735 |
|
|
int referenced = 0;
|
2736 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2737 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2738 |
|
|
}
|
2739 |
|
|
return cycles;
|
2740 |
|
|
#undef FLD
|
2741 |
|
|
}
|
2742 |
|
|
|
2743 |
|
|
static int
|
2744 |
|
|
model_crisv10_or_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
2745 |
|
|
{
|
2746 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2747 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2748 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2749 |
|
|
int cycles = 0;
|
2750 |
|
|
{
|
2751 |
|
|
int referenced = 0;
|
2752 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2753 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2754 |
|
|
}
|
2755 |
|
|
{
|
2756 |
|
|
int referenced = 0;
|
2757 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2758 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2759 |
|
|
}
|
2760 |
|
|
return cycles;
|
2761 |
|
|
#undef FLD
|
2762 |
|
|
}
|
2763 |
|
|
|
2764 |
|
|
static int
|
2765 |
|
|
model_crisv10_or_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
2766 |
|
|
{
|
2767 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2768 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2769 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2770 |
|
|
int cycles = 0;
|
2771 |
|
|
{
|
2772 |
|
|
int referenced = 0;
|
2773 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2774 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2775 |
|
|
}
|
2776 |
|
|
{
|
2777 |
|
|
int referenced = 0;
|
2778 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2779 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2780 |
|
|
}
|
2781 |
|
|
return cycles;
|
2782 |
|
|
#undef FLD
|
2783 |
|
|
}
|
2784 |
|
|
|
2785 |
|
|
static int
|
2786 |
|
|
model_crisv10_or_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
2787 |
|
|
{
|
2788 |
|
|
#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
|
2789 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2790 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2791 |
|
|
int cycles = 0;
|
2792 |
|
|
{
|
2793 |
|
|
int referenced = 0;
|
2794 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2795 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
2796 |
|
|
}
|
2797 |
|
|
{
|
2798 |
|
|
int referenced = 0;
|
2799 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2800 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2801 |
|
|
}
|
2802 |
|
|
return cycles;
|
2803 |
|
|
#undef FLD
|
2804 |
|
|
}
|
2805 |
|
|
|
2806 |
|
|
static int
|
2807 |
|
|
model_crisv10_orcbr (SIM_CPU *current_cpu, void *sem_arg)
|
2808 |
|
|
{
|
2809 |
|
|
#define FLD(f) abuf->fields.sfmt_addcbr.f
|
2810 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2811 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2812 |
|
|
int cycles = 0;
|
2813 |
|
|
{
|
2814 |
|
|
int referenced = 0;
|
2815 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2816 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2817 |
|
|
}
|
2818 |
|
|
{
|
2819 |
|
|
int referenced = 0;
|
2820 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2821 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2822 |
|
|
}
|
2823 |
|
|
return cycles;
|
2824 |
|
|
#undef FLD
|
2825 |
|
|
}
|
2826 |
|
|
|
2827 |
|
|
static int
|
2828 |
|
|
model_crisv10_orcwr (SIM_CPU *current_cpu, void *sem_arg)
|
2829 |
|
|
{
|
2830 |
|
|
#define FLD(f) abuf->fields.sfmt_addcwr.f
|
2831 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2832 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2833 |
|
|
int cycles = 0;
|
2834 |
|
|
{
|
2835 |
|
|
int referenced = 0;
|
2836 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2837 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
2838 |
|
|
}
|
2839 |
|
|
{
|
2840 |
|
|
int referenced = 0;
|
2841 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2842 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2843 |
|
|
}
|
2844 |
|
|
return cycles;
|
2845 |
|
|
#undef FLD
|
2846 |
|
|
}
|
2847 |
|
|
|
2848 |
|
|
static int
|
2849 |
|
|
model_crisv10_orcdr (SIM_CPU *current_cpu, void *sem_arg)
|
2850 |
|
|
{
|
2851 |
|
|
#define FLD(f) abuf->fields.sfmt_addcdr.f
|
2852 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2853 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2854 |
|
|
int cycles = 0;
|
2855 |
|
|
{
|
2856 |
|
|
int referenced = 0;
|
2857 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2858 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
2859 |
|
|
}
|
2860 |
|
|
{
|
2861 |
|
|
int referenced = 0;
|
2862 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2863 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
2864 |
|
|
}
|
2865 |
|
|
return cycles;
|
2866 |
|
|
#undef FLD
|
2867 |
|
|
}
|
2868 |
|
|
|
2869 |
|
|
static int
|
2870 |
|
|
model_crisv10_orq (SIM_CPU *current_cpu, void *sem_arg)
|
2871 |
|
|
{
|
2872 |
|
|
#define FLD(f) abuf->fields.sfmt_andq.f
|
2873 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2874 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2875 |
|
|
int cycles = 0;
|
2876 |
|
|
{
|
2877 |
|
|
int referenced = 0;
|
2878 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2879 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2880 |
|
|
}
|
2881 |
|
|
return cycles;
|
2882 |
|
|
#undef FLD
|
2883 |
|
|
}
|
2884 |
|
|
|
2885 |
|
|
static int
|
2886 |
|
|
model_crisv10_xor (SIM_CPU *current_cpu, void *sem_arg)
|
2887 |
|
|
{
|
2888 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
2889 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2890 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2891 |
|
|
int cycles = 0;
|
2892 |
|
|
{
|
2893 |
|
|
int referenced = 0;
|
2894 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2895 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2896 |
|
|
}
|
2897 |
|
|
return cycles;
|
2898 |
|
|
#undef FLD
|
2899 |
|
|
}
|
2900 |
|
|
|
2901 |
|
|
static int
|
2902 |
|
|
model_crisv10_swap (SIM_CPU *current_cpu, void *sem_arg)
|
2903 |
|
|
{
|
2904 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
2905 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2906 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2907 |
|
|
int cycles = 0;
|
2908 |
|
|
{
|
2909 |
|
|
int referenced = 0;
|
2910 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2911 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2912 |
|
|
}
|
2913 |
|
|
return cycles;
|
2914 |
|
|
#undef FLD
|
2915 |
|
|
}
|
2916 |
|
|
|
2917 |
|
|
static int
|
2918 |
|
|
model_crisv10_asrr_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2919 |
|
|
{
|
2920 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2921 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2922 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2923 |
|
|
int cycles = 0;
|
2924 |
|
|
{
|
2925 |
|
|
int referenced = 0;
|
2926 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2927 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2928 |
|
|
}
|
2929 |
|
|
return cycles;
|
2930 |
|
|
#undef FLD
|
2931 |
|
|
}
|
2932 |
|
|
|
2933 |
|
|
static int
|
2934 |
|
|
model_crisv10_asrr_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2935 |
|
|
{
|
2936 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2937 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2938 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2939 |
|
|
int cycles = 0;
|
2940 |
|
|
{
|
2941 |
|
|
int referenced = 0;
|
2942 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2943 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2944 |
|
|
}
|
2945 |
|
|
return cycles;
|
2946 |
|
|
#undef FLD
|
2947 |
|
|
}
|
2948 |
|
|
|
2949 |
|
|
static int
|
2950 |
|
|
model_crisv10_asrr_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
2951 |
|
|
{
|
2952 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2953 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2954 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2955 |
|
|
int cycles = 0;
|
2956 |
|
|
{
|
2957 |
|
|
int referenced = 0;
|
2958 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2959 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2960 |
|
|
}
|
2961 |
|
|
return cycles;
|
2962 |
|
|
#undef FLD
|
2963 |
|
|
}
|
2964 |
|
|
|
2965 |
|
|
static int
|
2966 |
|
|
model_crisv10_asrq (SIM_CPU *current_cpu, void *sem_arg)
|
2967 |
|
|
{
|
2968 |
|
|
#define FLD(f) abuf->fields.sfmt_asrq.f
|
2969 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2970 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2971 |
|
|
int cycles = 0;
|
2972 |
|
|
{
|
2973 |
|
|
int referenced = 0;
|
2974 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2975 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2976 |
|
|
}
|
2977 |
|
|
return cycles;
|
2978 |
|
|
#undef FLD
|
2979 |
|
|
}
|
2980 |
|
|
|
2981 |
|
|
static int
|
2982 |
|
|
model_crisv10_lsrr_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
2983 |
|
|
{
|
2984 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
2985 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
2986 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
2987 |
|
|
int cycles = 0;
|
2988 |
|
|
{
|
2989 |
|
|
int referenced = 0;
|
2990 |
|
|
int UNUSED insn_referenced = abuf->written;
|
2991 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
2992 |
|
|
}
|
2993 |
|
|
return cycles;
|
2994 |
|
|
#undef FLD
|
2995 |
|
|
}
|
2996 |
|
|
|
2997 |
|
|
static int
|
2998 |
|
|
model_crisv10_lsrr_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
2999 |
|
|
{
|
3000 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3001 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3002 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3003 |
|
|
int cycles = 0;
|
3004 |
|
|
{
|
3005 |
|
|
int referenced = 0;
|
3006 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3007 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3008 |
|
|
}
|
3009 |
|
|
return cycles;
|
3010 |
|
|
#undef FLD
|
3011 |
|
|
}
|
3012 |
|
|
|
3013 |
|
|
static int
|
3014 |
|
|
model_crisv10_lsrr_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
3015 |
|
|
{
|
3016 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3017 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3018 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3019 |
|
|
int cycles = 0;
|
3020 |
|
|
{
|
3021 |
|
|
int referenced = 0;
|
3022 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3023 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3024 |
|
|
}
|
3025 |
|
|
return cycles;
|
3026 |
|
|
#undef FLD
|
3027 |
|
|
}
|
3028 |
|
|
|
3029 |
|
|
static int
|
3030 |
|
|
model_crisv10_lsrq (SIM_CPU *current_cpu, void *sem_arg)
|
3031 |
|
|
{
|
3032 |
|
|
#define FLD(f) abuf->fields.sfmt_asrq.f
|
3033 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3034 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3035 |
|
|
int cycles = 0;
|
3036 |
|
|
{
|
3037 |
|
|
int referenced = 0;
|
3038 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3039 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3040 |
|
|
}
|
3041 |
|
|
return cycles;
|
3042 |
|
|
#undef FLD
|
3043 |
|
|
}
|
3044 |
|
|
|
3045 |
|
|
static int
|
3046 |
|
|
model_crisv10_lslr_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
3047 |
|
|
{
|
3048 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3049 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3050 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3051 |
|
|
int cycles = 0;
|
3052 |
|
|
{
|
3053 |
|
|
int referenced = 0;
|
3054 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3055 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3056 |
|
|
}
|
3057 |
|
|
return cycles;
|
3058 |
|
|
#undef FLD
|
3059 |
|
|
}
|
3060 |
|
|
|
3061 |
|
|
static int
|
3062 |
|
|
model_crisv10_lslr_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
3063 |
|
|
{
|
3064 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3065 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3066 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3067 |
|
|
int cycles = 0;
|
3068 |
|
|
{
|
3069 |
|
|
int referenced = 0;
|
3070 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3071 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3072 |
|
|
}
|
3073 |
|
|
return cycles;
|
3074 |
|
|
#undef FLD
|
3075 |
|
|
}
|
3076 |
|
|
|
3077 |
|
|
static int
|
3078 |
|
|
model_crisv10_lslr_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
3079 |
|
|
{
|
3080 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3081 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3082 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3083 |
|
|
int cycles = 0;
|
3084 |
|
|
{
|
3085 |
|
|
int referenced = 0;
|
3086 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3087 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3088 |
|
|
}
|
3089 |
|
|
return cycles;
|
3090 |
|
|
#undef FLD
|
3091 |
|
|
}
|
3092 |
|
|
|
3093 |
|
|
static int
|
3094 |
|
|
model_crisv10_lslq (SIM_CPU *current_cpu, void *sem_arg)
|
3095 |
|
|
{
|
3096 |
|
|
#define FLD(f) abuf->fields.sfmt_asrq.f
|
3097 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3098 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3099 |
|
|
int cycles = 0;
|
3100 |
|
|
{
|
3101 |
|
|
int referenced = 0;
|
3102 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3103 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3104 |
|
|
}
|
3105 |
|
|
return cycles;
|
3106 |
|
|
#undef FLD
|
3107 |
|
|
}
|
3108 |
|
|
|
3109 |
|
|
static int
|
3110 |
|
|
model_crisv10_btst (SIM_CPU *current_cpu, void *sem_arg)
|
3111 |
|
|
{
|
3112 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3113 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3114 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3115 |
|
|
int cycles = 0;
|
3116 |
|
|
{
|
3117 |
|
|
int referenced = 0;
|
3118 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3119 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3120 |
|
|
}
|
3121 |
|
|
return cycles;
|
3122 |
|
|
#undef FLD
|
3123 |
|
|
}
|
3124 |
|
|
|
3125 |
|
|
static int
|
3126 |
|
|
model_crisv10_btstq (SIM_CPU *current_cpu, void *sem_arg)
|
3127 |
|
|
{
|
3128 |
|
|
#define FLD(f) abuf->fields.sfmt_asrq.f
|
3129 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3130 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3131 |
|
|
int cycles = 0;
|
3132 |
|
|
{
|
3133 |
|
|
int referenced = 0;
|
3134 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3135 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3136 |
|
|
}
|
3137 |
|
|
return cycles;
|
3138 |
|
|
#undef FLD
|
3139 |
|
|
}
|
3140 |
|
|
|
3141 |
|
|
static int
|
3142 |
|
|
model_crisv10_setf (SIM_CPU *current_cpu, void *sem_arg)
|
3143 |
|
|
{
|
3144 |
|
|
#define FLD(f) abuf->fields.sfmt_setf.f
|
3145 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3146 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3147 |
|
|
int cycles = 0;
|
3148 |
|
|
{
|
3149 |
|
|
int referenced = 0;
|
3150 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3151 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3152 |
|
|
}
|
3153 |
|
|
return cycles;
|
3154 |
|
|
#undef FLD
|
3155 |
|
|
}
|
3156 |
|
|
|
3157 |
|
|
static int
|
3158 |
|
|
model_crisv10_clearf (SIM_CPU *current_cpu, void *sem_arg)
|
3159 |
|
|
{
|
3160 |
|
|
#define FLD(f) abuf->fields.sfmt_setf.f
|
3161 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3162 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3163 |
|
|
int cycles = 0;
|
3164 |
|
|
{
|
3165 |
|
|
int referenced = 0;
|
3166 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3167 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3168 |
|
|
}
|
3169 |
|
|
return cycles;
|
3170 |
|
|
#undef FLD
|
3171 |
|
|
}
|
3172 |
|
|
|
3173 |
|
|
static int
|
3174 |
|
|
model_crisv10_bcc_b (SIM_CPU *current_cpu, void *sem_arg)
|
3175 |
|
|
{
|
3176 |
|
|
#define FLD(f) abuf->fields.sfmt_bcc_b.f
|
3177 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3178 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3179 |
|
|
int cycles = 0;
|
3180 |
|
|
{
|
3181 |
|
|
int referenced = 0;
|
3182 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3183 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3184 |
|
|
}
|
3185 |
|
|
return cycles;
|
3186 |
|
|
#undef FLD
|
3187 |
|
|
}
|
3188 |
|
|
|
3189 |
|
|
static int
|
3190 |
|
|
model_crisv10_ba_b (SIM_CPU *current_cpu, void *sem_arg)
|
3191 |
|
|
{
|
3192 |
|
|
#define FLD(f) abuf->fields.sfmt_bcc_b.f
|
3193 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3194 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3195 |
|
|
int cycles = 0;
|
3196 |
|
|
{
|
3197 |
|
|
int referenced = 0;
|
3198 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3199 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3200 |
|
|
}
|
3201 |
|
|
return cycles;
|
3202 |
|
|
#undef FLD
|
3203 |
|
|
}
|
3204 |
|
|
|
3205 |
|
|
static int
|
3206 |
|
|
model_crisv10_bcc_w (SIM_CPU *current_cpu, void *sem_arg)
|
3207 |
|
|
{
|
3208 |
|
|
#define FLD(f) abuf->fields.sfmt_bcc_w.f
|
3209 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3210 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3211 |
|
|
int cycles = 0;
|
3212 |
|
|
{
|
3213 |
|
|
int referenced = 0;
|
3214 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3215 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3216 |
|
|
}
|
3217 |
|
|
{
|
3218 |
|
|
int referenced = 0;
|
3219 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3220 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3221 |
|
|
}
|
3222 |
|
|
return cycles;
|
3223 |
|
|
#undef FLD
|
3224 |
|
|
}
|
3225 |
|
|
|
3226 |
|
|
static int
|
3227 |
|
|
model_crisv10_ba_w (SIM_CPU *current_cpu, void *sem_arg)
|
3228 |
|
|
{
|
3229 |
|
|
#define FLD(f) abuf->fields.sfmt_bcc_w.f
|
3230 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3231 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3232 |
|
|
int cycles = 0;
|
3233 |
|
|
{
|
3234 |
|
|
int referenced = 0;
|
3235 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3236 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3237 |
|
|
}
|
3238 |
|
|
{
|
3239 |
|
|
int referenced = 0;
|
3240 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3241 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3242 |
|
|
}
|
3243 |
|
|
return cycles;
|
3244 |
|
|
#undef FLD
|
3245 |
|
|
}
|
3246 |
|
|
|
3247 |
|
|
static int
|
3248 |
|
|
model_crisv10_jump_r (SIM_CPU *current_cpu, void *sem_arg)
|
3249 |
|
|
{
|
3250 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
|
3251 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3252 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3253 |
|
|
int cycles = 0;
|
3254 |
|
|
{
|
3255 |
|
|
int referenced = 0;
|
3256 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3257 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3258 |
|
|
}
|
3259 |
|
|
return cycles;
|
3260 |
|
|
#undef FLD
|
3261 |
|
|
}
|
3262 |
|
|
|
3263 |
|
|
static int
|
3264 |
|
|
model_crisv10_jump_m (SIM_CPU *current_cpu, void *sem_arg)
|
3265 |
|
|
{
|
3266 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
|
3267 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3268 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3269 |
|
|
int cycles = 0;
|
3270 |
|
|
{
|
3271 |
|
|
int referenced = 0;
|
3272 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3273 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3274 |
|
|
}
|
3275 |
|
|
{
|
3276 |
|
|
int referenced = 0;
|
3277 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3278 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3279 |
|
|
}
|
3280 |
|
|
return cycles;
|
3281 |
|
|
#undef FLD
|
3282 |
|
|
}
|
3283 |
|
|
|
3284 |
|
|
static int
|
3285 |
|
|
model_crisv10_jump_c (SIM_CPU *current_cpu, void *sem_arg)
|
3286 |
|
|
{
|
3287 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
3288 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3289 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3290 |
|
|
int cycles = 0;
|
3291 |
|
|
{
|
3292 |
|
|
int referenced = 0;
|
3293 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3294 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
3295 |
|
|
}
|
3296 |
|
|
{
|
3297 |
|
|
int referenced = 0;
|
3298 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3299 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3300 |
|
|
}
|
3301 |
|
|
return cycles;
|
3302 |
|
|
#undef FLD
|
3303 |
|
|
}
|
3304 |
|
|
|
3305 |
|
|
static int
|
3306 |
|
|
model_crisv10_break (SIM_CPU *current_cpu, void *sem_arg)
|
3307 |
|
|
{
|
3308 |
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
3309 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3310 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3311 |
|
|
int cycles = 0;
|
3312 |
|
|
{
|
3313 |
|
|
int referenced = 0;
|
3314 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3315 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3316 |
|
|
}
|
3317 |
|
|
return cycles;
|
3318 |
|
|
#undef FLD
|
3319 |
|
|
}
|
3320 |
|
|
|
3321 |
|
|
static int
|
3322 |
|
|
model_crisv10_bound_r_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
3323 |
|
|
{
|
3324 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
3325 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3326 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3327 |
|
|
int cycles = 0;
|
3328 |
|
|
{
|
3329 |
|
|
int referenced = 0;
|
3330 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3331 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3332 |
|
|
}
|
3333 |
|
|
return cycles;
|
3334 |
|
|
#undef FLD
|
3335 |
|
|
}
|
3336 |
|
|
|
3337 |
|
|
static int
|
3338 |
|
|
model_crisv10_bound_r_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
3339 |
|
|
{
|
3340 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
3341 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3342 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3343 |
|
|
int cycles = 0;
|
3344 |
|
|
{
|
3345 |
|
|
int referenced = 0;
|
3346 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3347 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3348 |
|
|
}
|
3349 |
|
|
return cycles;
|
3350 |
|
|
#undef FLD
|
3351 |
|
|
}
|
3352 |
|
|
|
3353 |
|
|
static int
|
3354 |
|
|
model_crisv10_bound_r_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
3355 |
|
|
{
|
3356 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
3357 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3358 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3359 |
|
|
int cycles = 0;
|
3360 |
|
|
{
|
3361 |
|
|
int referenced = 0;
|
3362 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3363 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3364 |
|
|
}
|
3365 |
|
|
return cycles;
|
3366 |
|
|
#undef FLD
|
3367 |
|
|
}
|
3368 |
|
|
|
3369 |
|
|
static int
|
3370 |
|
|
model_crisv10_bound_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
3371 |
|
|
{
|
3372 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3373 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3374 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3375 |
|
|
int cycles = 0;
|
3376 |
|
|
{
|
3377 |
|
|
int referenced = 0;
|
3378 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3379 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3380 |
|
|
}
|
3381 |
|
|
{
|
3382 |
|
|
int referenced = 0;
|
3383 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3384 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3385 |
|
|
}
|
3386 |
|
|
return cycles;
|
3387 |
|
|
#undef FLD
|
3388 |
|
|
}
|
3389 |
|
|
|
3390 |
|
|
static int
|
3391 |
|
|
model_crisv10_bound_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
3392 |
|
|
{
|
3393 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3394 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3395 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3396 |
|
|
int cycles = 0;
|
3397 |
|
|
{
|
3398 |
|
|
int referenced = 0;
|
3399 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3400 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3401 |
|
|
}
|
3402 |
|
|
{
|
3403 |
|
|
int referenced = 0;
|
3404 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3405 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3406 |
|
|
}
|
3407 |
|
|
return cycles;
|
3408 |
|
|
#undef FLD
|
3409 |
|
|
}
|
3410 |
|
|
|
3411 |
|
|
static int
|
3412 |
|
|
model_crisv10_bound_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
3413 |
|
|
{
|
3414 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3415 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3416 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3417 |
|
|
int cycles = 0;
|
3418 |
|
|
{
|
3419 |
|
|
int referenced = 0;
|
3420 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3421 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3422 |
|
|
}
|
3423 |
|
|
{
|
3424 |
|
|
int referenced = 0;
|
3425 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3426 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3427 |
|
|
}
|
3428 |
|
|
return cycles;
|
3429 |
|
|
#undef FLD
|
3430 |
|
|
}
|
3431 |
|
|
|
3432 |
|
|
static int
|
3433 |
|
|
model_crisv10_bound_cb (SIM_CPU *current_cpu, void *sem_arg)
|
3434 |
|
|
{
|
3435 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
3436 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3437 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3438 |
|
|
int cycles = 0;
|
3439 |
|
|
{
|
3440 |
|
|
int referenced = 0;
|
3441 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3442 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3443 |
|
|
}
|
3444 |
|
|
{
|
3445 |
|
|
int referenced = 0;
|
3446 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3447 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3448 |
|
|
}
|
3449 |
|
|
return cycles;
|
3450 |
|
|
#undef FLD
|
3451 |
|
|
}
|
3452 |
|
|
|
3453 |
|
|
static int
|
3454 |
|
|
model_crisv10_bound_cw (SIM_CPU *current_cpu, void *sem_arg)
|
3455 |
|
|
{
|
3456 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
3457 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3458 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3459 |
|
|
int cycles = 0;
|
3460 |
|
|
{
|
3461 |
|
|
int referenced = 0;
|
3462 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3463 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3464 |
|
|
}
|
3465 |
|
|
{
|
3466 |
|
|
int referenced = 0;
|
3467 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3468 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3469 |
|
|
}
|
3470 |
|
|
return cycles;
|
3471 |
|
|
#undef FLD
|
3472 |
|
|
}
|
3473 |
|
|
|
3474 |
|
|
static int
|
3475 |
|
|
model_crisv10_bound_cd (SIM_CPU *current_cpu, void *sem_arg)
|
3476 |
|
|
{
|
3477 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cd.f
|
3478 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3479 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3480 |
|
|
int cycles = 0;
|
3481 |
|
|
{
|
3482 |
|
|
int referenced = 0;
|
3483 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3484 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
3485 |
|
|
}
|
3486 |
|
|
{
|
3487 |
|
|
int referenced = 0;
|
3488 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3489 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3490 |
|
|
}
|
3491 |
|
|
return cycles;
|
3492 |
|
|
#undef FLD
|
3493 |
|
|
}
|
3494 |
|
|
|
3495 |
|
|
static int
|
3496 |
|
|
model_crisv10_scc (SIM_CPU *current_cpu, void *sem_arg)
|
3497 |
|
|
{
|
3498 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
3499 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3500 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3501 |
|
|
int cycles = 0;
|
3502 |
|
|
{
|
3503 |
|
|
int referenced = 0;
|
3504 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3505 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3506 |
|
|
}
|
3507 |
|
|
return cycles;
|
3508 |
|
|
#undef FLD
|
3509 |
|
|
}
|
3510 |
|
|
|
3511 |
|
|
static int
|
3512 |
|
|
model_crisv10_lz (SIM_CPU *current_cpu, void *sem_arg)
|
3513 |
|
|
{
|
3514 |
|
|
#define FLD(f) abuf->fields.sfmt_muls_b.f
|
3515 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3516 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3517 |
|
|
int cycles = 0;
|
3518 |
|
|
{
|
3519 |
|
|
int referenced = 0;
|
3520 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3521 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3522 |
|
|
}
|
3523 |
|
|
return cycles;
|
3524 |
|
|
#undef FLD
|
3525 |
|
|
}
|
3526 |
|
|
|
3527 |
|
|
static int
|
3528 |
|
|
model_crisv10_addoq (SIM_CPU *current_cpu, void *sem_arg)
|
3529 |
|
|
{
|
3530 |
|
|
#define FLD(f) abuf->fields.sfmt_addoq.f
|
3531 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3532 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3533 |
|
|
int cycles = 0;
|
3534 |
|
|
{
|
3535 |
|
|
int referenced = 0;
|
3536 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3537 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3538 |
|
|
}
|
3539 |
|
|
return cycles;
|
3540 |
|
|
#undef FLD
|
3541 |
|
|
}
|
3542 |
|
|
|
3543 |
|
|
static int
|
3544 |
|
|
model_crisv10_bdapqpc (SIM_CPU *current_cpu, void *sem_arg)
|
3545 |
|
|
{
|
3546 |
|
|
#define FLD(f) abuf->fields.sfmt_addoq.f
|
3547 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3548 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3549 |
|
|
int cycles = 0;
|
3550 |
|
|
{
|
3551 |
|
|
int referenced = 0;
|
3552 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3553 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3554 |
|
|
}
|
3555 |
|
|
return cycles;
|
3556 |
|
|
#undef FLD
|
3557 |
|
|
}
|
3558 |
|
|
|
3559 |
|
|
static int
|
3560 |
|
|
model_crisv10_bdap_32_pc (SIM_CPU *current_cpu, void *sem_arg)
|
3561 |
|
|
{
|
3562 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
3563 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3564 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3565 |
|
|
int cycles = 0;
|
3566 |
|
|
{
|
3567 |
|
|
int referenced = 0;
|
3568 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3569 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
3570 |
|
|
}
|
3571 |
|
|
{
|
3572 |
|
|
int referenced = 0;
|
3573 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3574 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3575 |
|
|
}
|
3576 |
|
|
return cycles;
|
3577 |
|
|
#undef FLD
|
3578 |
|
|
}
|
3579 |
|
|
|
3580 |
|
|
static int
|
3581 |
|
|
model_crisv10_move_m_pcplus_p0 (SIM_CPU *current_cpu, void *sem_arg)
|
3582 |
|
|
{
|
3583 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
|
3584 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3585 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3586 |
|
|
int cycles = 0;
|
3587 |
|
|
{
|
3588 |
|
|
int referenced = 0;
|
3589 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3590 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3591 |
|
|
}
|
3592 |
|
|
{
|
3593 |
|
|
int referenced = 0;
|
3594 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3595 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3596 |
|
|
}
|
3597 |
|
|
return cycles;
|
3598 |
|
|
#undef FLD
|
3599 |
|
|
}
|
3600 |
|
|
|
3601 |
|
|
static int
|
3602 |
|
|
model_crisv10_move_m_spplus_p8 (SIM_CPU *current_cpu, void *sem_arg)
|
3603 |
|
|
{
|
3604 |
|
|
#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
|
3605 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3606 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3607 |
|
|
int cycles = 0;
|
3608 |
|
|
{
|
3609 |
|
|
int referenced = 0;
|
3610 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3611 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3612 |
|
|
}
|
3613 |
|
|
{
|
3614 |
|
|
int referenced = 0;
|
3615 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3616 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3617 |
|
|
}
|
3618 |
|
|
return cycles;
|
3619 |
|
|
#undef FLD
|
3620 |
|
|
}
|
3621 |
|
|
|
3622 |
|
|
static int
|
3623 |
|
|
model_crisv10_addo_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
|
3624 |
|
|
{
|
3625 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3626 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3627 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3628 |
|
|
int cycles = 0;
|
3629 |
|
|
{
|
3630 |
|
|
int referenced = 0;
|
3631 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3632 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3633 |
|
|
}
|
3634 |
|
|
{
|
3635 |
|
|
int referenced = 0;
|
3636 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3637 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3638 |
|
|
}
|
3639 |
|
|
return cycles;
|
3640 |
|
|
#undef FLD
|
3641 |
|
|
}
|
3642 |
|
|
|
3643 |
|
|
static int
|
3644 |
|
|
model_crisv10_addo_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
|
3645 |
|
|
{
|
3646 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3647 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3648 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3649 |
|
|
int cycles = 0;
|
3650 |
|
|
{
|
3651 |
|
|
int referenced = 0;
|
3652 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3653 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3654 |
|
|
}
|
3655 |
|
|
{
|
3656 |
|
|
int referenced = 0;
|
3657 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3658 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3659 |
|
|
}
|
3660 |
|
|
return cycles;
|
3661 |
|
|
#undef FLD
|
3662 |
|
|
}
|
3663 |
|
|
|
3664 |
|
|
static int
|
3665 |
|
|
model_crisv10_addo_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
|
3666 |
|
|
{
|
3667 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
|
3668 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3669 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3670 |
|
|
int cycles = 0;
|
3671 |
|
|
{
|
3672 |
|
|
int referenced = 0;
|
3673 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3674 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3675 |
|
|
}
|
3676 |
|
|
{
|
3677 |
|
|
int referenced = 0;
|
3678 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3679 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3680 |
|
|
}
|
3681 |
|
|
return cycles;
|
3682 |
|
|
#undef FLD
|
3683 |
|
|
}
|
3684 |
|
|
|
3685 |
|
|
static int
|
3686 |
|
|
model_crisv10_addo_cb (SIM_CPU *current_cpu, void *sem_arg)
|
3687 |
|
|
{
|
3688 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cb.f
|
3689 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3690 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3691 |
|
|
int cycles = 0;
|
3692 |
|
|
{
|
3693 |
|
|
int referenced = 0;
|
3694 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3695 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3696 |
|
|
}
|
3697 |
|
|
{
|
3698 |
|
|
int referenced = 0;
|
3699 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3700 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3701 |
|
|
}
|
3702 |
|
|
return cycles;
|
3703 |
|
|
#undef FLD
|
3704 |
|
|
}
|
3705 |
|
|
|
3706 |
|
|
static int
|
3707 |
|
|
model_crisv10_addo_cw (SIM_CPU *current_cpu, void *sem_arg)
|
3708 |
|
|
{
|
3709 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cw.f
|
3710 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3711 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3712 |
|
|
int cycles = 0;
|
3713 |
|
|
{
|
3714 |
|
|
int referenced = 0;
|
3715 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3716 |
|
|
cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
|
3717 |
|
|
}
|
3718 |
|
|
{
|
3719 |
|
|
int referenced = 0;
|
3720 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3721 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3722 |
|
|
}
|
3723 |
|
|
return cycles;
|
3724 |
|
|
#undef FLD
|
3725 |
|
|
}
|
3726 |
|
|
|
3727 |
|
|
static int
|
3728 |
|
|
model_crisv10_addo_cd (SIM_CPU *current_cpu, void *sem_arg)
|
3729 |
|
|
{
|
3730 |
|
|
#define FLD(f) abuf->fields.sfmt_bound_cd.f
|
3731 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3732 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3733 |
|
|
int cycles = 0;
|
3734 |
|
|
{
|
3735 |
|
|
int referenced = 0;
|
3736 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3737 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
3738 |
|
|
}
|
3739 |
|
|
{
|
3740 |
|
|
int referenced = 0;
|
3741 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3742 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3743 |
|
|
}
|
3744 |
|
|
return cycles;
|
3745 |
|
|
#undef FLD
|
3746 |
|
|
}
|
3747 |
|
|
|
3748 |
|
|
static int
|
3749 |
|
|
model_crisv10_dip_m (SIM_CPU *current_cpu, void *sem_arg)
|
3750 |
|
|
{
|
3751 |
|
|
#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
|
3752 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3753 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3754 |
|
|
int cycles = 0;
|
3755 |
|
|
{
|
3756 |
|
|
int referenced = 0;
|
3757 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3758 |
|
|
cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
|
3759 |
|
|
}
|
3760 |
|
|
{
|
3761 |
|
|
int referenced = 0;
|
3762 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3763 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3764 |
|
|
}
|
3765 |
|
|
return cycles;
|
3766 |
|
|
#undef FLD
|
3767 |
|
|
}
|
3768 |
|
|
|
3769 |
|
|
static int
|
3770 |
|
|
model_crisv10_dip_c (SIM_CPU *current_cpu, void *sem_arg)
|
3771 |
|
|
{
|
3772 |
|
|
#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
|
3773 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3774 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3775 |
|
|
int cycles = 0;
|
3776 |
|
|
{
|
3777 |
|
|
int referenced = 0;
|
3778 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3779 |
|
|
cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
|
3780 |
|
|
}
|
3781 |
|
|
{
|
3782 |
|
|
int referenced = 0;
|
3783 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3784 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
|
3785 |
|
|
}
|
3786 |
|
|
return cycles;
|
3787 |
|
|
#undef FLD
|
3788 |
|
|
}
|
3789 |
|
|
|
3790 |
|
|
static int
|
3791 |
|
|
model_crisv10_addi_acr_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
3792 |
|
|
{
|
3793 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3794 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3795 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3796 |
|
|
int cycles = 0;
|
3797 |
|
|
{
|
3798 |
|
|
int referenced = 0;
|
3799 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3800 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3801 |
|
|
}
|
3802 |
|
|
return cycles;
|
3803 |
|
|
#undef FLD
|
3804 |
|
|
}
|
3805 |
|
|
|
3806 |
|
|
static int
|
3807 |
|
|
model_crisv10_addi_acr_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
3808 |
|
|
{
|
3809 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3810 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3811 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3812 |
|
|
int cycles = 0;
|
3813 |
|
|
{
|
3814 |
|
|
int referenced = 0;
|
3815 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3816 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3817 |
|
|
}
|
3818 |
|
|
return cycles;
|
3819 |
|
|
#undef FLD
|
3820 |
|
|
}
|
3821 |
|
|
|
3822 |
|
|
static int
|
3823 |
|
|
model_crisv10_addi_acr_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
3824 |
|
|
{
|
3825 |
|
|
#define FLD(f) abuf->fields.sfmt_add_b_r.f
|
3826 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3827 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3828 |
|
|
int cycles = 0;
|
3829 |
|
|
{
|
3830 |
|
|
int referenced = 0;
|
3831 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3832 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3833 |
|
|
}
|
3834 |
|
|
return cycles;
|
3835 |
|
|
#undef FLD
|
3836 |
|
|
}
|
3837 |
|
|
|
3838 |
|
|
static int
|
3839 |
|
|
model_crisv10_biap_pc_b_r (SIM_CPU *current_cpu, void *sem_arg)
|
3840 |
|
|
{
|
3841 |
|
|
#define FLD(f) abuf->fields.sfmt_addoq.f
|
3842 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3843 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3844 |
|
|
int cycles = 0;
|
3845 |
|
|
{
|
3846 |
|
|
int referenced = 0;
|
3847 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3848 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3849 |
|
|
}
|
3850 |
|
|
return cycles;
|
3851 |
|
|
#undef FLD
|
3852 |
|
|
}
|
3853 |
|
|
|
3854 |
|
|
static int
|
3855 |
|
|
model_crisv10_biap_pc_w_r (SIM_CPU *current_cpu, void *sem_arg)
|
3856 |
|
|
{
|
3857 |
|
|
#define FLD(f) abuf->fields.sfmt_addoq.f
|
3858 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3859 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3860 |
|
|
int cycles = 0;
|
3861 |
|
|
{
|
3862 |
|
|
int referenced = 0;
|
3863 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3864 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3865 |
|
|
}
|
3866 |
|
|
return cycles;
|
3867 |
|
|
#undef FLD
|
3868 |
|
|
}
|
3869 |
|
|
|
3870 |
|
|
static int
|
3871 |
|
|
model_crisv10_biap_pc_d_r (SIM_CPU *current_cpu, void *sem_arg)
|
3872 |
|
|
{
|
3873 |
|
|
#define FLD(f) abuf->fields.sfmt_addoq.f
|
3874 |
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
3875 |
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
3876 |
|
|
int cycles = 0;
|
3877 |
|
|
{
|
3878 |
|
|
int referenced = 0;
|
3879 |
|
|
int UNUSED insn_referenced = abuf->written;
|
3880 |
|
|
cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
|
3881 |
|
|
}
|
3882 |
|
|
return cycles;
|
3883 |
|
|
#undef FLD
|
3884 |
|
|
}
|
3885 |
|
|
|
3886 |
|
|
/* We assume UNIT_NONE == 0 because the tables don't always terminate
|
3887 |
|
|
entries with it. */
|
3888 |
|
|
|
3889 |
|
|
/* Model timing data for `crisv10'. */
|
3890 |
|
|
|
3891 |
|
|
static const INSN_TIMING crisv10_timing[] = {
|
3892 |
|
|
{ CRISV10F_INSN_X_INVALID, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3893 |
|
|
{ CRISV10F_INSN_X_AFTER, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3894 |
|
|
{ CRISV10F_INSN_X_BEFORE, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3895 |
|
|
{ CRISV10F_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3896 |
|
|
{ CRISV10F_INSN_X_CHAIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3897 |
|
|
{ CRISV10F_INSN_X_BEGIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3898 |
|
|
{ CRISV10F_INSN_NOP, model_crisv10_nop, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3899 |
|
|
{ CRISV10F_INSN_MOVE_B_R, model_crisv10_move_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3900 |
|
|
{ CRISV10F_INSN_MOVE_W_R, model_crisv10_move_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3901 |
|
|
{ CRISV10F_INSN_MOVE_D_R, model_crisv10_move_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3902 |
|
|
{ CRISV10F_INSN_MOVEPCR, model_crisv10_movepcr, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3903 |
|
|
{ CRISV10F_INSN_MOVEQ, model_crisv10_moveq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3904 |
|
|
{ CRISV10F_INSN_MOVS_B_R, model_crisv10_movs_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3905 |
|
|
{ CRISV10F_INSN_MOVS_W_R, model_crisv10_movs_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3906 |
|
|
{ CRISV10F_INSN_MOVU_B_R, model_crisv10_movu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3907 |
|
|
{ CRISV10F_INSN_MOVU_W_R, model_crisv10_movu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3908 |
|
|
{ CRISV10F_INSN_MOVECBR, model_crisv10_movecbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3909 |
|
|
{ CRISV10F_INSN_MOVECWR, model_crisv10_movecwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3910 |
|
|
{ CRISV10F_INSN_MOVECDR, model_crisv10_movecdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3911 |
|
|
{ CRISV10F_INSN_MOVSCBR, model_crisv10_movscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3912 |
|
|
{ CRISV10F_INSN_MOVSCWR, model_crisv10_movscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3913 |
|
|
{ CRISV10F_INSN_MOVUCBR, model_crisv10_movucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3914 |
|
|
{ CRISV10F_INSN_MOVUCWR, model_crisv10_movucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3915 |
|
|
{ CRISV10F_INSN_ADDQ, model_crisv10_addq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3916 |
|
|
{ CRISV10F_INSN_SUBQ, model_crisv10_subq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3917 |
|
|
{ CRISV10F_INSN_CMP_R_B_R, model_crisv10_cmp_r_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3918 |
|
|
{ CRISV10F_INSN_CMP_R_W_R, model_crisv10_cmp_r_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3919 |
|
|
{ CRISV10F_INSN_CMP_R_D_R, model_crisv10_cmp_r_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3920 |
|
|
{ CRISV10F_INSN_CMP_M_B_M, model_crisv10_cmp_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3921 |
|
|
{ CRISV10F_INSN_CMP_M_W_M, model_crisv10_cmp_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3922 |
|
|
{ CRISV10F_INSN_CMP_M_D_M, model_crisv10_cmp_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3923 |
|
|
{ CRISV10F_INSN_CMPCBR, model_crisv10_cmpcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3924 |
|
|
{ CRISV10F_INSN_CMPCWR, model_crisv10_cmpcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3925 |
|
|
{ CRISV10F_INSN_CMPCDR, model_crisv10_cmpcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3926 |
|
|
{ CRISV10F_INSN_CMPQ, model_crisv10_cmpq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3927 |
|
|
{ CRISV10F_INSN_CMPS_M_B_M, model_crisv10_cmps_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3928 |
|
|
{ CRISV10F_INSN_CMPS_M_W_M, model_crisv10_cmps_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3929 |
|
|
{ CRISV10F_INSN_CMPSCBR, model_crisv10_cmpscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3930 |
|
|
{ CRISV10F_INSN_CMPSCWR, model_crisv10_cmpscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3931 |
|
|
{ CRISV10F_INSN_CMPU_M_B_M, model_crisv10_cmpu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3932 |
|
|
{ CRISV10F_INSN_CMPU_M_W_M, model_crisv10_cmpu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3933 |
|
|
{ CRISV10F_INSN_CMPUCBR, model_crisv10_cmpucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3934 |
|
|
{ CRISV10F_INSN_CMPUCWR, model_crisv10_cmpucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3935 |
|
|
{ CRISV10F_INSN_MOVE_M_B_M, model_crisv10_move_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3936 |
|
|
{ CRISV10F_INSN_MOVE_M_W_M, model_crisv10_move_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3937 |
|
|
{ CRISV10F_INSN_MOVE_M_D_M, model_crisv10_move_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3938 |
|
|
{ CRISV10F_INSN_MOVS_M_B_M, model_crisv10_movs_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3939 |
|
|
{ CRISV10F_INSN_MOVS_M_W_M, model_crisv10_movs_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3940 |
|
|
{ CRISV10F_INSN_MOVU_M_B_M, model_crisv10_movu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3941 |
|
|
{ CRISV10F_INSN_MOVU_M_W_M, model_crisv10_movu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3942 |
|
|
{ CRISV10F_INSN_MOVE_R_SPRV10, model_crisv10_move_r_sprv10, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3943 |
|
|
{ CRISV10F_INSN_MOVE_SPR_RV10, model_crisv10_move_spr_rv10, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3944 |
|
|
{ CRISV10F_INSN_RET_TYPE, model_crisv10_ret_type, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3945 |
|
|
{ CRISV10F_INSN_MOVE_M_SPRV10, model_crisv10_move_m_sprv10, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3946 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P5, model_crisv10_move_c_sprv10_p5, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3947 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P9, model_crisv10_move_c_sprv10_p9, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3948 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P10, model_crisv10_move_c_sprv10_p10, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3949 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P11, model_crisv10_move_c_sprv10_p11, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3950 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P12, model_crisv10_move_c_sprv10_p12, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3951 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P13, model_crisv10_move_c_sprv10_p13, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3952 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P7, model_crisv10_move_c_sprv10_p7, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3953 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P14, model_crisv10_move_c_sprv10_p14, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3954 |
|
|
{ CRISV10F_INSN_MOVE_C_SPRV10_P15, model_crisv10_move_c_sprv10_p15, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3955 |
|
|
{ CRISV10F_INSN_MOVE_SPR_MV10, model_crisv10_move_spr_mv10, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3956 |
|
|
{ CRISV10F_INSN_SBFS, model_crisv10_sbfs, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3957 |
|
|
{ CRISV10F_INSN_MOVEM_R_M, model_crisv10_movem_r_m, { { (int) UNIT_CRISV10_U_MOVEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3958 |
|
|
{ CRISV10F_INSN_MOVEM_M_R, model_crisv10_movem_m_r, { { (int) UNIT_CRISV10_U_MOVEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3959 |
|
|
{ CRISV10F_INSN_MOVEM_M_PC, model_crisv10_movem_m_pc, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3960 |
|
|
{ CRISV10F_INSN_ADD_B_R, model_crisv10_add_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3961 |
|
|
{ CRISV10F_INSN_ADD_W_R, model_crisv10_add_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3962 |
|
|
{ CRISV10F_INSN_ADD_D_R, model_crisv10_add_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3963 |
|
|
{ CRISV10F_INSN_ADD_M_B_M, model_crisv10_add_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3964 |
|
|
{ CRISV10F_INSN_ADD_M_W_M, model_crisv10_add_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3965 |
|
|
{ CRISV10F_INSN_ADD_M_D_M, model_crisv10_add_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3966 |
|
|
{ CRISV10F_INSN_ADDCBR, model_crisv10_addcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3967 |
|
|
{ CRISV10F_INSN_ADDCWR, model_crisv10_addcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3968 |
|
|
{ CRISV10F_INSN_ADDCDR, model_crisv10_addcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3969 |
|
|
{ CRISV10F_INSN_ADDCPC, model_crisv10_addcpc, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_STALL, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3970 |
|
|
{ CRISV10F_INSN_ADDS_B_R, model_crisv10_adds_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3971 |
|
|
{ CRISV10F_INSN_ADDS_W_R, model_crisv10_adds_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3972 |
|
|
{ CRISV10F_INSN_ADDS_M_B_M, model_crisv10_adds_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3973 |
|
|
{ CRISV10F_INSN_ADDS_M_W_M, model_crisv10_adds_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3974 |
|
|
{ CRISV10F_INSN_ADDSCBR, model_crisv10_addscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3975 |
|
|
{ CRISV10F_INSN_ADDSCWR, model_crisv10_addscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3976 |
|
|
{ CRISV10F_INSN_ADDSPCPC, model_crisv10_addspcpc, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_STALL, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3977 |
|
|
{ CRISV10F_INSN_ADDU_B_R, model_crisv10_addu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3978 |
|
|
{ CRISV10F_INSN_ADDU_W_R, model_crisv10_addu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3979 |
|
|
{ CRISV10F_INSN_ADDU_M_B_M, model_crisv10_addu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3980 |
|
|
{ CRISV10F_INSN_ADDU_M_W_M, model_crisv10_addu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3981 |
|
|
{ CRISV10F_INSN_ADDUCBR, model_crisv10_adducbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3982 |
|
|
{ CRISV10F_INSN_ADDUCWR, model_crisv10_adducwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3983 |
|
|
{ CRISV10F_INSN_SUB_B_R, model_crisv10_sub_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3984 |
|
|
{ CRISV10F_INSN_SUB_W_R, model_crisv10_sub_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3985 |
|
|
{ CRISV10F_INSN_SUB_D_R, model_crisv10_sub_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3986 |
|
|
{ CRISV10F_INSN_SUB_M_B_M, model_crisv10_sub_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3987 |
|
|
{ CRISV10F_INSN_SUB_M_W_M, model_crisv10_sub_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3988 |
|
|
{ CRISV10F_INSN_SUB_M_D_M, model_crisv10_sub_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3989 |
|
|
{ CRISV10F_INSN_SUBCBR, model_crisv10_subcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3990 |
|
|
{ CRISV10F_INSN_SUBCWR, model_crisv10_subcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3991 |
|
|
{ CRISV10F_INSN_SUBCDR, model_crisv10_subcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3992 |
|
|
{ CRISV10F_INSN_SUBS_B_R, model_crisv10_subs_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3993 |
|
|
{ CRISV10F_INSN_SUBS_W_R, model_crisv10_subs_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3994 |
|
|
{ CRISV10F_INSN_SUBS_M_B_M, model_crisv10_subs_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3995 |
|
|
{ CRISV10F_INSN_SUBS_M_W_M, model_crisv10_subs_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3996 |
|
|
{ CRISV10F_INSN_SUBSCBR, model_crisv10_subscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3997 |
|
|
{ CRISV10F_INSN_SUBSCWR, model_crisv10_subscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3998 |
|
|
{ CRISV10F_INSN_SUBU_B_R, model_crisv10_subu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
3999 |
|
|
{ CRISV10F_INSN_SUBU_W_R, model_crisv10_subu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4000 |
|
|
{ CRISV10F_INSN_SUBU_M_B_M, model_crisv10_subu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4001 |
|
|
{ CRISV10F_INSN_SUBU_M_W_M, model_crisv10_subu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4002 |
|
|
{ CRISV10F_INSN_SUBUCBR, model_crisv10_subucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4003 |
|
|
{ CRISV10F_INSN_SUBUCWR, model_crisv10_subucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4004 |
|
|
{ CRISV10F_INSN_ADDI_B_R, model_crisv10_addi_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4005 |
|
|
{ CRISV10F_INSN_ADDI_W_R, model_crisv10_addi_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4006 |
|
|
{ CRISV10F_INSN_ADDI_D_R, model_crisv10_addi_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4007 |
|
|
{ CRISV10F_INSN_NEG_B_R, model_crisv10_neg_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4008 |
|
|
{ CRISV10F_INSN_NEG_W_R, model_crisv10_neg_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4009 |
|
|
{ CRISV10F_INSN_NEG_D_R, model_crisv10_neg_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4010 |
|
|
{ CRISV10F_INSN_TEST_M_B_M, model_crisv10_test_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4011 |
|
|
{ CRISV10F_INSN_TEST_M_W_M, model_crisv10_test_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4012 |
|
|
{ CRISV10F_INSN_TEST_M_D_M, model_crisv10_test_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4013 |
|
|
{ CRISV10F_INSN_MOVE_R_M_B_M, model_crisv10_move_r_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4014 |
|
|
{ CRISV10F_INSN_MOVE_R_M_W_M, model_crisv10_move_r_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4015 |
|
|
{ CRISV10F_INSN_MOVE_R_M_D_M, model_crisv10_move_r_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4016 |
|
|
{ CRISV10F_INSN_MULS_B, model_crisv10_muls_b, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4017 |
|
|
{ CRISV10F_INSN_MULS_W, model_crisv10_muls_w, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4018 |
|
|
{ CRISV10F_INSN_MULS_D, model_crisv10_muls_d, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4019 |
|
|
{ CRISV10F_INSN_MULU_B, model_crisv10_mulu_b, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4020 |
|
|
{ CRISV10F_INSN_MULU_W, model_crisv10_mulu_w, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4021 |
|
|
{ CRISV10F_INSN_MULU_D, model_crisv10_mulu_d, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4022 |
|
|
{ CRISV10F_INSN_MSTEP, model_crisv10_mstep, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4023 |
|
|
{ CRISV10F_INSN_DSTEP, model_crisv10_dstep, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4024 |
|
|
{ CRISV10F_INSN_ABS, model_crisv10_abs, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4025 |
|
|
{ CRISV10F_INSN_AND_B_R, model_crisv10_and_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4026 |
|
|
{ CRISV10F_INSN_AND_W_R, model_crisv10_and_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4027 |
|
|
{ CRISV10F_INSN_AND_D_R, model_crisv10_and_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4028 |
|
|
{ CRISV10F_INSN_AND_M_B_M, model_crisv10_and_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4029 |
|
|
{ CRISV10F_INSN_AND_M_W_M, model_crisv10_and_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4030 |
|
|
{ CRISV10F_INSN_AND_M_D_M, model_crisv10_and_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4031 |
|
|
{ CRISV10F_INSN_ANDCBR, model_crisv10_andcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4032 |
|
|
{ CRISV10F_INSN_ANDCWR, model_crisv10_andcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4033 |
|
|
{ CRISV10F_INSN_ANDCDR, model_crisv10_andcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4034 |
|
|
{ CRISV10F_INSN_ANDQ, model_crisv10_andq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4035 |
|
|
{ CRISV10F_INSN_ORR_B_R, model_crisv10_orr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4036 |
|
|
{ CRISV10F_INSN_ORR_W_R, model_crisv10_orr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4037 |
|
|
{ CRISV10F_INSN_ORR_D_R, model_crisv10_orr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4038 |
|
|
{ CRISV10F_INSN_OR_M_B_M, model_crisv10_or_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4039 |
|
|
{ CRISV10F_INSN_OR_M_W_M, model_crisv10_or_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4040 |
|
|
{ CRISV10F_INSN_OR_M_D_M, model_crisv10_or_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4041 |
|
|
{ CRISV10F_INSN_ORCBR, model_crisv10_orcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4042 |
|
|
{ CRISV10F_INSN_ORCWR, model_crisv10_orcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4043 |
|
|
{ CRISV10F_INSN_ORCDR, model_crisv10_orcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4044 |
|
|
{ CRISV10F_INSN_ORQ, model_crisv10_orq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4045 |
|
|
{ CRISV10F_INSN_XOR, model_crisv10_xor, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4046 |
|
|
{ CRISV10F_INSN_SWAP, model_crisv10_swap, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4047 |
|
|
{ CRISV10F_INSN_ASRR_B_R, model_crisv10_asrr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4048 |
|
|
{ CRISV10F_INSN_ASRR_W_R, model_crisv10_asrr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4049 |
|
|
{ CRISV10F_INSN_ASRR_D_R, model_crisv10_asrr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4050 |
|
|
{ CRISV10F_INSN_ASRQ, model_crisv10_asrq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4051 |
|
|
{ CRISV10F_INSN_LSRR_B_R, model_crisv10_lsrr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4052 |
|
|
{ CRISV10F_INSN_LSRR_W_R, model_crisv10_lsrr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4053 |
|
|
{ CRISV10F_INSN_LSRR_D_R, model_crisv10_lsrr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4054 |
|
|
{ CRISV10F_INSN_LSRQ, model_crisv10_lsrq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4055 |
|
|
{ CRISV10F_INSN_LSLR_B_R, model_crisv10_lslr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4056 |
|
|
{ CRISV10F_INSN_LSLR_W_R, model_crisv10_lslr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4057 |
|
|
{ CRISV10F_INSN_LSLR_D_R, model_crisv10_lslr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4058 |
|
|
{ CRISV10F_INSN_LSLQ, model_crisv10_lslq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4059 |
|
|
{ CRISV10F_INSN_BTST, model_crisv10_btst, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4060 |
|
|
{ CRISV10F_INSN_BTSTQ, model_crisv10_btstq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4061 |
|
|
{ CRISV10F_INSN_SETF, model_crisv10_setf, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4062 |
|
|
{ CRISV10F_INSN_CLEARF, model_crisv10_clearf, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4063 |
|
|
{ CRISV10F_INSN_BCC_B, model_crisv10_bcc_b, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4064 |
|
|
{ CRISV10F_INSN_BA_B, model_crisv10_ba_b, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4065 |
|
|
{ CRISV10F_INSN_BCC_W, model_crisv10_bcc_w, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4066 |
|
|
{ CRISV10F_INSN_BA_W, model_crisv10_ba_w, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4067 |
|
|
{ CRISV10F_INSN_JUMP_R, model_crisv10_jump_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4068 |
|
|
{ CRISV10F_INSN_JUMP_M, model_crisv10_jump_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4069 |
|
|
{ CRISV10F_INSN_JUMP_C, model_crisv10_jump_c, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4070 |
|
|
{ CRISV10F_INSN_BREAK, model_crisv10_break, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4071 |
|
|
{ CRISV10F_INSN_BOUND_R_B_R, model_crisv10_bound_r_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4072 |
|
|
{ CRISV10F_INSN_BOUND_R_W_R, model_crisv10_bound_r_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4073 |
|
|
{ CRISV10F_INSN_BOUND_R_D_R, model_crisv10_bound_r_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4074 |
|
|
{ CRISV10F_INSN_BOUND_M_B_M, model_crisv10_bound_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4075 |
|
|
{ CRISV10F_INSN_BOUND_M_W_M, model_crisv10_bound_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4076 |
|
|
{ CRISV10F_INSN_BOUND_M_D_M, model_crisv10_bound_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4077 |
|
|
{ CRISV10F_INSN_BOUND_CB, model_crisv10_bound_cb, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4078 |
|
|
{ CRISV10F_INSN_BOUND_CW, model_crisv10_bound_cw, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4079 |
|
|
{ CRISV10F_INSN_BOUND_CD, model_crisv10_bound_cd, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4080 |
|
|
{ CRISV10F_INSN_SCC, model_crisv10_scc, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4081 |
|
|
{ CRISV10F_INSN_LZ, model_crisv10_lz, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4082 |
|
|
{ CRISV10F_INSN_ADDOQ, model_crisv10_addoq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4083 |
|
|
{ CRISV10F_INSN_BDAPQPC, model_crisv10_bdapqpc, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4084 |
|
|
{ CRISV10F_INSN_BDAP_32_PC, model_crisv10_bdap_32_pc, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4085 |
|
|
{ CRISV10F_INSN_MOVE_M_PCPLUS_P0, model_crisv10_move_m_pcplus_p0, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4086 |
|
|
{ CRISV10F_INSN_MOVE_M_SPPLUS_P8, model_crisv10_move_m_spplus_p8, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4087 |
|
|
{ CRISV10F_INSN_ADDO_M_B_M, model_crisv10_addo_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4088 |
|
|
{ CRISV10F_INSN_ADDO_M_W_M, model_crisv10_addo_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4089 |
|
|
{ CRISV10F_INSN_ADDO_M_D_M, model_crisv10_addo_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4090 |
|
|
{ CRISV10F_INSN_ADDO_CB, model_crisv10_addo_cb, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4091 |
|
|
{ CRISV10F_INSN_ADDO_CW, model_crisv10_addo_cw, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4092 |
|
|
{ CRISV10F_INSN_ADDO_CD, model_crisv10_addo_cd, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4093 |
|
|
{ CRISV10F_INSN_DIP_M, model_crisv10_dip_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4094 |
|
|
{ CRISV10F_INSN_DIP_C, model_crisv10_dip_c, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4095 |
|
|
{ CRISV10F_INSN_ADDI_ACR_B_R, model_crisv10_addi_acr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4096 |
|
|
{ CRISV10F_INSN_ADDI_ACR_W_R, model_crisv10_addi_acr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4097 |
|
|
{ CRISV10F_INSN_ADDI_ACR_D_R, model_crisv10_addi_acr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4098 |
|
|
{ CRISV10F_INSN_BIAP_PC_B_R, model_crisv10_biap_pc_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4099 |
|
|
{ CRISV10F_INSN_BIAP_PC_W_R, model_crisv10_biap_pc_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4100 |
|
|
{ CRISV10F_INSN_BIAP_PC_D_R, model_crisv10_biap_pc_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
|
4101 |
|
|
};
|
4102 |
|
|
|
4103 |
|
|
#endif /* WITH_PROFILE_MODEL_P */
|
4104 |
|
|
|
4105 |
|
|
static void
|
4106 |
|
|
crisv10_model_init (SIM_CPU *cpu)
|
4107 |
|
|
{
|
4108 |
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_CRISV10_DATA));
|
4109 |
|
|
}
|
4110 |
|
|
|
4111 |
|
|
#if WITH_PROFILE_MODEL_P
|
4112 |
|
|
#define TIMING_DATA(td) td
|
4113 |
|
|
#else
|
4114 |
|
|
#define TIMING_DATA(td) 0
|
4115 |
|
|
#endif
|
4116 |
|
|
|
4117 |
|
|
static const MODEL crisv10_models[] =
|
4118 |
|
|
{
|
4119 |
|
|
{ "crisv10", & crisv10_mach, MODEL_CRISV10, TIMING_DATA (& crisv10_timing[0]), crisv10_model_init },
|
4120 |
|
|
{ 0 }
|
4121 |
|
|
};
|
4122 |
|
|
|
4123 |
|
|
/* The properties of this cpu's implementation. */
|
4124 |
|
|
|
4125 |
|
|
static const MACH_IMP_PROPERTIES crisv10f_imp_properties =
|
4126 |
|
|
{
|
4127 |
|
|
sizeof (SIM_CPU),
|
4128 |
|
|
#if WITH_SCACHE
|
4129 |
|
|
sizeof (SCACHE)
|
4130 |
|
|
#else
|
4131 |
|
|
|
4132 |
|
|
#endif
|
4133 |
|
|
};
|
4134 |
|
|
|
4135 |
|
|
|
4136 |
|
|
static void
|
4137 |
|
|
crisv10f_prepare_run (SIM_CPU *cpu)
|
4138 |
|
|
{
|
4139 |
|
|
if (CPU_IDESC (cpu) == NULL)
|
4140 |
|
|
crisv10f_init_idesc_table (cpu);
|
4141 |
|
|
}
|
4142 |
|
|
|
4143 |
|
|
static const CGEN_INSN *
|
4144 |
|
|
crisv10f_get_idata (SIM_CPU *cpu, int inum)
|
4145 |
|
|
{
|
4146 |
|
|
return CPU_IDESC (cpu) [inum].idata;
|
4147 |
|
|
}
|
4148 |
|
|
|
4149 |
|
|
static void
|
4150 |
|
|
crisv10_init_cpu (SIM_CPU *cpu)
|
4151 |
|
|
{
|
4152 |
|
|
CPU_REG_FETCH (cpu) = crisv10f_fetch_register;
|
4153 |
|
|
CPU_REG_STORE (cpu) = crisv10f_store_register;
|
4154 |
|
|
CPU_PC_FETCH (cpu) = crisv10f_h_pc_get;
|
4155 |
|
|
CPU_PC_STORE (cpu) = crisv10f_h_pc_set;
|
4156 |
|
|
CPU_GET_IDATA (cpu) = crisv10f_get_idata;
|
4157 |
|
|
CPU_MAX_INSNS (cpu) = CRISV10F_INSN__MAX;
|
4158 |
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
4159 |
|
|
CPU_FULL_ENGINE_FN (cpu) = crisv10f_engine_run_full;
|
4160 |
|
|
#if WITH_FAST
|
4161 |
|
|
CPU_FAST_ENGINE_FN (cpu) = crisv10f_engine_run_fast;
|
4162 |
|
|
#else
|
4163 |
|
|
CPU_FAST_ENGINE_FN (cpu) = crisv10f_engine_run_full;
|
4164 |
|
|
#endif
|
4165 |
|
|
}
|
4166 |
|
|
|
4167 |
|
|
const MACH crisv10_mach =
|
4168 |
|
|
{
|
4169 |
|
|
"crisv10", "cris", MACH_CRISV10,
|
4170 |
|
|
32, 32, & crisv10_models[0], & crisv10f_imp_properties,
|
4171 |
|
|
crisv10_init_cpu,
|
4172 |
|
|
crisv10f_prepare_run
|
4173 |
|
|
};
|
4174 |
|
|
|