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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [erc32/] [sis.h] - Blame information for rev 199

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Line No. Rev Author Line
1 24 jeremybenn
/*
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 * This file is part of SIS.
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 *
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 * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
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 * European Space Agency
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 *
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 * This program is free software; you can redistribute it and/or modify it under
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 * the terms of the GNU General Public License as published by the Free
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 * Software Foundation; either version 2 of the License, or (at your option)
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 * any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License along with
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 * this program; if not, write to the Free Software Foundation, Inc., 675
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 * Mass Ave, Cambridge, MA 02139, USA.
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 *
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 */
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#include "ansidecl.h"
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "end.h"
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#define I_ACC_EXC 1
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/* Maximum events in event queue */
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#define EVENT_MAX       256
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/* Maximum # of floating point queue */
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#define FPUQN   1
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/* Maximum # of breakpoints */
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#define BPT_MAX 256
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struct histype {
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    unsigned        addr;
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    unsigned        time;
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};
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/* type definitions */
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typedef short int int16;        /* 16-bit signed int */
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typedef unsigned short int uint16;      /* 16-bit unsigned int */
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typedef int     int32;          /* 32-bit signed int */
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typedef unsigned int uint32;    /* 32-bit unsigned int */
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typedef float   float32;        /* 32-bit float */
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typedef double  float64;        /* 64-bit float */
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/* FIXME: what about host compilers that don't support 64-bit ints? */
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typedef unsigned long long uint64; /* 64-bit unsigned int */
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typedef long long int64;        /* 64-bit signed int */
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struct pstate {
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    float64         fd[16];     /* FPU registers */
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#ifdef HOST_LITTLE_ENDIAN_FLOAT
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    float32         fs[32];
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    float32        *fdp;
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#else
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    float32        *fs;
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#endif
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    int32          *fsi;
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    uint32          fsr;
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    int32           fpstate;
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    uint32          fpq[FPUQN * 2];
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    uint32          fpqn;
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    uint32          ftime;
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    uint32          flrd;
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    uint32          frd;
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    uint32          frs1;
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    uint32          frs2;
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    uint32          fpu_pres;   /* FPU present (0 = No, 1 = Yes) */
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    uint32          psr;        /* IU registers */
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    uint32          tbr;
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    uint32          wim;
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    uint32          g[8];
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    uint32          r[128];
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    uint32          y;
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    uint32          asr17;      /* Single vector trapping */
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    uint32          pc, npc;
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    uint32          trap;       /* Current trap type */
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    uint32          annul;      /* Instruction annul */
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    uint32          data;       /* Loaded data       */
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    uint32          inst;       /* Current instruction */
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    uint32          asi;        /* Current ASI */
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    uint32          err_mode;   /* IU error mode */
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    uint32          breakpoint;
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    uint32          bptnum;
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    uint32          bphit;
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    uint32          bpts[BPT_MAX];      /* Breakpoints */
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    uint32          ltime;      /* Load interlock time */
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    uint32          hold;       /* IU hold cycles in current inst */
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    uint32          fhold;      /* FPU hold cycles in current inst */
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    uint32          icnt;       /* Instruction cycles in curr inst */
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    uint32          histlen;    /* Trace history management */
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    uint32          histind;
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    struct histype *histbuf;
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    float32         freq;       /* Simulated processor frequency */
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    uint32          tottime;
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    uint32          ninst;
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    uint32          fholdt;
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    uint32          holdt;
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    uint32          icntt;
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    uint32          finst;
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    uint32          simstart;
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    uint32          starttime;
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    uint32          tlimit;     /* Simulation time limit */
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    uint32          pwdtime;    /* Cycles in power-down mode */
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    uint32          nstore;     /* Number of load instructions */
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    uint32          nload;      /* Number of store instructions */
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    uint32          nannul;     /* Number of annuled instructions */
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    uint32          nbranch;    /* Number of branch instructions */
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    uint32          ildreg;     /* Destination of last load instruction */
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    uint32          ildtime;    /* Last time point for load dependency */
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    int             rett_err;   /* IU in jmpl/restore error state (Rev.0) */
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    int             jmpltime;
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};
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struct evcell {
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    void            (*cfunc) ();
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    int32           arg;
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    uint32          time;
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    struct evcell  *nxt;
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};
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struct estate {
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    struct evcell   eq;
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    struct evcell  *freeq;
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    uint32          simtime;
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};
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struct irqcell {
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    void            (*callback) ();
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    int32           arg;
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};
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#define OK 0
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#define TIME_OUT 1
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#define BPT_HIT 2
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#define ERROR 3
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#define CTRL_C 4
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/* Prototypes  */
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/* erc32.c */
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extern void     init_sim PARAMS ((void));
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extern void     reset PARAMS ((void));
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extern void     error_mode PARAMS ((uint32 pc));
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extern void     sim_halt PARAMS ((void));
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extern void     exit_sim PARAMS ((void));
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extern void     init_stdio PARAMS ((void));
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extern void     restore_stdio PARAMS ((void));
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extern int      memory_read PARAMS ((int32 asi, uint32 addr, uint32 *data,
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                                     int32 sz, int32 *ws));
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extern int      memory_write PARAMS ((int32 asi, uint32 addr, uint32 *data,
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                                    int32 sz, int32 *ws));
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extern int      sis_memory_write PARAMS ((uint32 addr, char *data,
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                                          uint32 length));
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extern int      sis_memory_read PARAMS ((uint32 addr, char *data,
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                                         uint32 length));
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/* func.c */
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extern void     set_regi PARAMS ((struct pstate *sregs, int32 reg,
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                                  uint32 rval));
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extern void     get_regi PARAMS ((struct pstate *sregs, int32 reg, char *buf));
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extern int      exec_cmd PARAMS ((struct pstate *sregs, char *cmd));
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extern void     reset_stat PARAMS ((struct pstate  *sregs));
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extern void     show_stat PARAMS ((struct pstate  *sregs));
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extern void     init_bpt PARAMS ((struct pstate  *sregs));
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extern void     init_signals PARAMS ((void));
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struct disassemble_info;
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extern void     dis_mem PARAMS ((uint32 addr, uint32 len,
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                                 struct disassemble_info *info));
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extern void     event PARAMS ((void (*cfunc) (), int32 arg, uint32 delta));
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extern void     set_int PARAMS ((int32 level, void (*callback) (), int32 arg));
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extern void     advance_time PARAMS ((struct pstate  *sregs));
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extern uint32   now PARAMS ((void));
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extern int      wait_for_irq PARAMS ((void));
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extern int      check_bpt PARAMS ((struct pstate *sregs));
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extern void     reset_all PARAMS ((void));
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extern void     sys_reset PARAMS ((void));
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extern void     sys_halt PARAMS ((void));
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extern int      bfd_load PARAMS ((char *fname));
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/* exec.c */
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extern int      dispatch_instruction PARAMS ((struct pstate *sregs));
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extern int      execute_trap PARAMS ((struct pstate *sregs));
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extern int      check_interrupts PARAMS ((struct pstate  *sregs));
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extern void     init_regs PARAMS ((struct pstate *sregs));
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/* interf.c */
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extern int      run_sim PARAMS ((struct pstate *sregs,
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                                 unsigned int icount, int dis));
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/* float.c */
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extern int      get_accex PARAMS ((void));
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extern void     clear_accex PARAMS ((void));
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extern void     set_fsr PARAMS ((uint32 fsr));
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/* help.c */
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extern void     usage PARAMS ((void));
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extern void     gen_help PARAMS ((void));

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