OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [iq2000/] [cpu.c] - Blame information for rev 298

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Misc. support for CPU family iq2000bf.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU simulators.
8
 
9
This program is free software; you can redistribute it and/or modify
10
it under the terms of the GNU General Public License as published by
11
the Free Software Foundation; either version 3 of the License, or
12
(at your option) any later version.
13
 
14
This program is distributed in the hope that it will be useful,
15
but WITHOUT ANY WARRANTY; without even the implied warranty of
16
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
GNU General Public License for more details.
18
 
19
You should have received a copy of the GNU General Public License
20
along with this program.  If not, see <http://www.gnu.org/licenses/>.
21
 
22
*/
23
 
24
#define WANT_CPU iq2000bf
25
#define WANT_CPU_IQ2000BF
26
 
27
#include "sim-main.h"
28
#include "cgen-ops.h"
29
 
30
/* Get the value of h-pc.  */
31
 
32
USI
33
iq2000bf_h_pc_get (SIM_CPU *current_cpu)
34
{
35
  return GET_H_PC ();
36
}
37
 
38
/* Set a value for h-pc.  */
39
 
40
void
41
iq2000bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
42
{
43
  SET_H_PC (newval);
44
}
45
 
46
/* Get the value of h-gr.  */
47
 
48
SI
49
iq2000bf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
50
{
51
  return GET_H_GR (regno);
52
}
53
 
54
/* Set a value for h-gr.  */
55
 
56
void
57
iq2000bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
58
{
59
  SET_H_GR (regno, newval);
60
}
61
 
62
/* Record trace results for INSN.  */
63
 
64
void
65
iq2000bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
66
                            int *indices, TRACE_RECORD *tr)
67
{
68
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.