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/* Misc. support for CPU family m32rbf.
 
THIS FILE IS MACHINE GENERATED WITH CGEN.
 
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
 
This file is part of the GNU simulators.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
*/
 
#define WANT_CPU m32rbf
#define WANT_CPU_M32RBF
 
#include "sim-main.h"
#include "cgen-ops.h"
 
/* Get the value of h-pc.  */
 
USI
m32rbf_h_pc_get (SIM_CPU *current_cpu)
{
  return CPU (h_pc);
}
 
/* Set a value for h-pc.  */
 
void
m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
  CPU (h_pc) = newval;
}
 
/* Get the value of h-gr.  */
 
SI
m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
  return CPU (h_gr[regno]);
}
 
/* Set a value for h-gr.  */
 
void
m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
  CPU (h_gr[regno]) = newval;
}
 
/* Get the value of h-cr.  */
 
USI
m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
{
  return GET_H_CR (regno);
}
 
/* Set a value for h-cr.  */
 
void
m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
{
  SET_H_CR (regno, newval);
}
 
/* Get the value of h-accum.  */
 
DI
m32rbf_h_accum_get (SIM_CPU *current_cpu)
{
  return GET_H_ACCUM ();
}
 
/* Set a value for h-accum.  */
 
void
m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)
{
  SET_H_ACCUM (newval);
}
 
/* Get the value of h-cond.  */
 
BI
m32rbf_h_cond_get (SIM_CPU *current_cpu)
{
  return CPU (h_cond);
}
 
/* Set a value for h-cond.  */
 
void
m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_cond) = newval;
}
 
/* Get the value of h-psw.  */
 
UQI
m32rbf_h_psw_get (SIM_CPU *current_cpu)
{
  return GET_H_PSW ();
}
 
/* Set a value for h-psw.  */
 
void
m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
{
  SET_H_PSW (newval);
}
 
/* Get the value of h-bpsw.  */
 
UQI
m32rbf_h_bpsw_get (SIM_CPU *current_cpu)
{
  return CPU (h_bpsw);
}
 
/* Set a value for h-bpsw.  */
 
void
m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
{
  CPU (h_bpsw) = newval;
}
 
/* Get the value of h-bbpsw.  */
 
UQI
m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)
{
  return CPU (h_bbpsw);
}
 
/* Set a value for h-bbpsw.  */
 
void
m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
{
  CPU (h_bbpsw) = newval;
}
 
/* Get the value of h-lock.  */
 
BI
m32rbf_h_lock_get (SIM_CPU *current_cpu)
{
  return CPU (h_lock);
}
 
/* Set a value for h-lock.  */
 
void
m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)
{
  CPU (h_lock) = newval;
}
 
/* Record trace results for INSN.  */
 
void
m32rbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
                            int *indices, TRACE_RECORD *tr)
{
}

Line No.	Rev	Author	Line
1	24	jeremybenn	`/* Misc. support for CPU family m32rbf.`
2
3			`THIS FILE IS MACHINE GENERATED WITH CGEN.`
4
5			`Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.`
6
7			`This file is part of the GNU simulators.`
8
9			`This program is free software; you can redistribute it and/or modify`
10			`it under the terms of the GNU General Public License as published by`
11			`the Free Software Foundation; either version 3 of the License, or`
12			`(at your option) any later version.`
13
14			`This program is distributed in the hope that it will be useful,`
15			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
16			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
17			`GNU General Public License for more details.`
18
19			`You should have received a copy of the GNU General Public License`
20			`along with this program. If not, see <http://www.gnu.org/licenses/>.`
21
22			`*/`
23
24			`#define WANT_CPU m32rbf`
25			`#define WANT_CPU_M32RBF`
26
27			`#include "sim-main.h"`
28			`#include "cgen-ops.h"`
29
30			`/* Get the value of h-pc. */`
31
32			`USI`
33			`m32rbf_h_pc_get (SIM_CPU *current_cpu)`
34			`{`
35			`return CPU (h_pc);`
36			`}`
37
38			`/* Set a value for h-pc. */`
39
40			`void`
41			`m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)`
42			`{`
43			`CPU (h_pc) = newval;`
44			`}`
45
46			`/* Get the value of h-gr. */`
47
48			`SI`
49			`m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)`
50			`{`
51			`return CPU (h_gr[regno]);`
52			`}`
53
54			`/* Set a value for h-gr. */`
55
56			`void`
57			`m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)`
58			`{`
59			`CPU (h_gr[regno]) = newval;`
60			`}`
61
62			`/* Get the value of h-cr. */`
63
64			`USI`
65			`m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)`
66			`{`
67			`return GET_H_CR (regno);`
68			`}`
69
70			`/* Set a value for h-cr. */`
71
72			`void`
73			`m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)`
74			`{`
75			`SET_H_CR (regno, newval);`
76			`}`
77
78			`/* Get the value of h-accum. */`
79
80			`DI`
81			`m32rbf_h_accum_get (SIM_CPU *current_cpu)`
82			`{`
83			`return GET_H_ACCUM ();`
84			`}`
85
86			`/* Set a value for h-accum. */`
87
88			`void`
89			`m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)`
90			`{`
91			`SET_H_ACCUM (newval);`
92			`}`
93
94			`/* Get the value of h-cond. */`
95
96			`BI`
97			`m32rbf_h_cond_get (SIM_CPU *current_cpu)`
98			`{`
99			`return CPU (h_cond);`
100			`}`
101
102			`/* Set a value for h-cond. */`
103
104			`void`
105			`m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)`
106			`{`
107			`CPU (h_cond) = newval;`
108			`}`
109
110			`/* Get the value of h-psw. */`
111
112			`UQI`
113			`m32rbf_h_psw_get (SIM_CPU *current_cpu)`
114			`{`
115			`return GET_H_PSW ();`
116			`}`
117
118			`/* Set a value for h-psw. */`
119
120			`void`
121			`m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)`
122			`{`
123			`SET_H_PSW (newval);`
124			`}`
125
126			`/* Get the value of h-bpsw. */`
127
128			`UQI`
129			`m32rbf_h_bpsw_get (SIM_CPU *current_cpu)`
130			`{`
131			`return CPU (h_bpsw);`
132			`}`
133
134			`/* Set a value for h-bpsw. */`
135
136			`void`
137			`m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)`
138			`{`
139			`CPU (h_bpsw) = newval;`
140			`}`
141
142			`/* Get the value of h-bbpsw. */`
143
144			`UQI`
145			`m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)`
146			`{`
147			`return CPU (h_bbpsw);`
148			`}`
149
150			`/* Set a value for h-bbpsw. */`
151
152			`void`
153			`m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)`
154			`{`
155			`CPU (h_bbpsw) = newval;`
156			`}`
157
158			`/* Get the value of h-lock. */`
159
160			`BI`
161			`m32rbf_h_lock_get (SIM_CPU *current_cpu)`
162			`{`
163			`return CPU (h_lock);`
164			`}`
165
166			`/* Set a value for h-lock. */`
167
168			`void`
169			`m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)`
170			`{`
171			`CPU (h_lock) = newval;`
172			`}`
173
174			`/* Record trace results for INSN. */`
175
176			`void`
177			`m32rbf_record_trace_results (SIM_CPU current_cpu, CGEN_INSN insn,`
178			`int indices, TRACE_RECORD tr)`
179			`{`
180			`}`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [m32r/] [cpu.c] - Blame information for rev 298