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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [ppc/] [cpu.c] - Blame information for rev 157

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1 24 jeremybenn
/*  This file is part of the program psim.
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    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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    */
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#ifndef _CPU_C_
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#define _CPU_C_
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#include <setjmp.h>
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#include "cpu.h"
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#include "idecode.h"
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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struct _cpu {
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  /* the registers */
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  registers regs;
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  /* current instruction address */
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  unsigned_word program_counter;
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  /* the memory maps */
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  core *physical; /* all of memory */
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  vm *virtual;
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  vm_instruction_map *instruction_map; /* instructions */
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  vm_data_map *data_map; /* data */
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  /* the system this processor is contained within */
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  cpu_mon *monitor;
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  os_emul *os_emulation;
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  psim *system;
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  event_queue *events;
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  int cpu_nr;
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  /* Current CPU model information */
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  model_data *model_ptr;
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#if WITH_IDECODE_CACHE_SIZE
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  /* a cache to store cracked instructions */
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  idecode_cache icache[WITH_IDECODE_CACHE_SIZE];
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#endif
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  /* any interrupt state */
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  interrupts ints;
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  /* address reservation: keep the physical address and the contents
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     of memory at that address */
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  memory_reservation reservation;
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  /* offset from event time to this cpu's idea of the local time */
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  signed64 time_base_local_time;
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  signed64 decrementer_local_time;
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  event_entry_tag decrementer_event;
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};
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INLINE_CPU\
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(cpu *)
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cpu_create(psim *system,
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           core *memory,
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           cpu_mon *monitor,
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           os_emul *os_emulation,
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           int cpu_nr)
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{
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  cpu *processor = ZALLOC(cpu);
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  /* create the virtual memory map from the core */
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  processor->physical = memory;
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  processor->virtual = vm_create(memory);
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  processor->instruction_map = vm_create_instruction_map(processor->virtual);
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  processor->data_map = vm_create_data_map(processor->virtual);
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  if (CURRENT_MODEL_ISSUE > 0)
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    processor->model_ptr = model_create (processor);
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  /* link back to core system */
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  processor->system = system;
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  processor->events = psim_event_queue(system);
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  processor->cpu_nr = cpu_nr;
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  processor->monitor = monitor;
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  processor->os_emulation = os_emulation;
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  return processor;
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}
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INLINE_CPU\
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(void)
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cpu_init(cpu *processor)
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{
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  memset(&processor->regs, 0, sizeof(processor->regs));
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  /* vm init is delayed until after the device tree has been init as
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     the devices may further init the cpu */
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  if (CURRENT_MODEL_ISSUE > 0)
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    model_init (processor->model_ptr);
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}
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/* find ones way home */
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INLINE_CPU\
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(psim *)
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cpu_system(cpu *processor)
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{
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  return processor->system;
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}
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INLINE_CPU\
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(int)
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cpu_nr(cpu *processor)
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{
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  return processor->cpu_nr;
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}
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INLINE_CPU\
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(cpu_mon *)
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cpu_monitor(cpu *processor)
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{
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  return processor->monitor;
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}
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INLINE_CPU\
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(os_emul *)
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cpu_os_emulation(cpu *processor)
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{
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  return processor->os_emulation;
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}
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INLINE_CPU\
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(model_data *)
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cpu_model(cpu *processor)
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{
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  return processor->model_ptr;
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}
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160
 
161
/* program counter manipulation */
162
 
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INLINE_CPU\
164
(void)
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cpu_set_program_counter(cpu *processor,
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                        unsigned_word new_program_counter)
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{
168
  processor->program_counter = new_program_counter;
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}
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INLINE_CPU\
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(unsigned_word)
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cpu_get_program_counter(cpu *processor)
174
{
175
  return processor->program_counter;
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}
177
 
178
 
179
INLINE_CPU\
180
(void)
181
cpu_restart(cpu *processor,
182
            unsigned_word nia)
183
{
184
  ASSERT(processor != NULL);
185
  cpu_set_program_counter(processor, nia);
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  psim_restart(processor->system, processor->cpu_nr);
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}
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189
INLINE_CPU\
190
(void)
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cpu_halt(cpu *processor,
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         unsigned_word nia,
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         stop_reason reason,
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         int signal)
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{
196
  ASSERT(processor != NULL);
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  if (CURRENT_MODEL_ISSUE > 0)
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    model_halt(processor->model_ptr);
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  cpu_set_program_counter(processor, nia);
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  psim_halt(processor->system, processor->cpu_nr, reason, signal);
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}
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EXTERN_CPU\
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(void)
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cpu_error(cpu *processor,
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          unsigned_word cia,
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          const char *fmt,
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          ...)
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{
210
  char message[1024];
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  va_list ap;
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213
  /* format the message */
214
  va_start(ap, fmt);
215
  vsprintf(message, fmt, ap);
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  va_end(ap);
217
 
218
  /* sanity check */
219
  if (strlen(message) >= sizeof(message))
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    error("cpu_error: buffer overflow");
221
 
222
  if (processor != NULL) {
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    printf_filtered("cpu %d, cia 0x%lx: %s\n",
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                    processor->cpu_nr + 1, (unsigned long)cia, message);
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    cpu_halt(processor, cia, was_signalled, -1);
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  }
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  else {
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    error("cpu: %s", message);
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  }
230
}
231
 
232
 
233
/* The processors local concept of time */
234
 
235
INLINE_CPU\
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(signed64)
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cpu_get_time_base(cpu *processor)
238
{
239
  return (event_queue_time(processor->events)
240
          - processor->time_base_local_time);
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}
242
 
243
INLINE_CPU\
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(void)
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cpu_set_time_base(cpu *processor,
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                  signed64 time_base)
247
{
248
  processor->time_base_local_time = (event_queue_time(processor->events)
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                                     - time_base);
250
}
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INLINE_CPU\
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(signed32)
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cpu_get_decrementer(cpu *processor)
255
{
256
  return (processor->decrementer_local_time
257
          - event_queue_time(processor->events));
258
}
259
 
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STATIC_INLINE_CPU\
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(void)
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cpu_decrement_event(void *data)
263
{
264
  cpu *processor = (cpu*)data;
265
  processor->decrementer_event = NULL;
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  decrementer_interrupt(processor);
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}
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269
INLINE_CPU\
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(void)
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cpu_set_decrementer(cpu *processor,
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                    signed32 decrementer)
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{
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  signed64 old_decrementer = cpu_get_decrementer(processor);
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  event_queue_deschedule(processor->events, processor->decrementer_event);
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  processor->decrementer_event = NULL;
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  processor->decrementer_local_time = (event_queue_time(processor->events)
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                                       + decrementer);
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  if (decrementer < 0 && old_decrementer >= 0)
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    /* A decrementer interrupt occures if the sign of the decrement
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       register is changed from positive to negative by the load
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       instruction */
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    decrementer_interrupt(processor);
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  else if (decrementer >= 0)
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    processor->decrementer_event = event_queue_schedule(processor->events,
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                                                        decrementer,
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                                                        cpu_decrement_event,
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                                                        processor);
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}
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292
#if WITH_IDECODE_CACHE_SIZE
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/* allow access to the cpu's instruction cache */
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INLINE_CPU\
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(idecode_cache *)
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cpu_icache_entry(cpu *processor,
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                 unsigned_word cia)
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{
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  return &processor->icache[cia / 4 % WITH_IDECODE_CACHE_SIZE];
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}
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303
INLINE_CPU\
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(void)
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cpu_flush_icache(cpu *processor)
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{
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  int i;
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  /* force all addresses to 0xff... so that they never hit */
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  for (i = 0; i < WITH_IDECODE_CACHE_SIZE; i++)
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    processor->icache[i].address = MASK(0, 63);
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}
312
#endif
313
 
314
 
315
/* address map revelation */
316
 
317
INLINE_CPU\
318
(vm_instruction_map *)
319
cpu_instruction_map(cpu *processor)
320
{
321
  return processor->instruction_map;
322
}
323
 
324
INLINE_CPU\
325
(vm_data_map *)
326
cpu_data_map(cpu *processor)
327
{
328
  return processor->data_map;
329
}
330
 
331
INLINE_CPU\
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(void)
333
cpu_page_tlb_invalidate_entry(cpu *processor,
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                              unsigned_word ea)
335
{
336
  vm_page_tlb_invalidate_entry(processor->virtual, ea);
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}
338
 
339
INLINE_CPU\
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(void)
341
cpu_page_tlb_invalidate_all(cpu *processor)
342
{
343
  vm_page_tlb_invalidate_all(processor->virtual);
344
}
345
 
346
 
347
/* interrupt access */
348
 
349
INLINE_CPU\
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(interrupts *)
351
cpu_interrupts(cpu *processor)
352
{
353
  return &processor->ints;
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}
355
 
356
 
357
 
358
/* reservation access */
359
 
360
INLINE_CPU\
361
(memory_reservation *)
362
cpu_reservation(cpu *processor)
363
{
364
  return &processor->reservation;
365
}
366
 
367
 
368
/* register access */
369
 
370
INLINE_CPU\
371
(registers *)
372
cpu_registers(cpu *processor)
373
{
374
  return &processor->regs;
375
}
376
 
377
INLINE_CPU\
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(void)
379
cpu_synchronize_context(cpu *processor,
380
                        unsigned_word cia)
381
{
382
#if (WITH_IDECODE_CACHE_SIZE)
383
  /* kill of the cache */
384
  cpu_flush_icache(processor);
385
#endif
386
 
387
  /* update virtual memory */
388
  vm_synchronize_context(processor->virtual,
389
                         processor->regs.spr,
390
                         processor->regs.sr,
391
                         processor->regs.msr,
392
                         processor, cia);
393
}
394
 
395
 
396
/* might again be useful one day */
397
 
398
INLINE_CPU\
399
(void)
400
cpu_print_info(cpu *processor, int verbose)
401
{
402
}
403
 
404
#endif /* _CPU_C_ */

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