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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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jeremybenn |
/* engine configuration for sh64 */
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/* WITH_FAST: non-zero if a fast version of the engine is available
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in addition to the full-featured version. */
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#define WITH_FAST 1
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/* WITH_SCACHE_PBB_SH64_COMPACT: non-zero if the pbb engine was selected. */
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#define WITH_SCACHE_PBB_SH64_COMPACT 1
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/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn. */
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#define HAVE_PARALLEL_INSNS 0
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#define WITH_PARALLEL_READ 0
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#define WITH_PARALLEL_WRITE 0
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#define WITH_PARALLEL_GENWRITE 0
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/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is
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implemented as a switch(). */
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#define WITH_SEM_SWITCH_FULL 0
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/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is
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implemented as a switch(). */
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#define WITH_SEM_SWITCH_FAST 1
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/* Functions defined in the generated mainloop.c file
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(which doesn't necessarily have that file name). */
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extern ENGINE_FN sh64_compact_engine_run_full;
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extern ENGINE_FN sh64_compact_engine_run_fast;
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extern SEM_PC sh64_compact_pbb_begin (SIM_CPU *, int);
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extern SEM_PC sh64_compact_pbb_chain (SIM_CPU *, SEM_ARG);
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extern SEM_PC sh64_compact_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);
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extern void sh64_compact_pbb_before (SIM_CPU *, SCACHE *);
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extern void sh64_compact_pbb_after (SIM_CPU *, SCACHE *);
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