OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [addcv32c.ms] - Blame information for rev 407

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn 
# mach: crisv32
2 
# output: 0\n0\n1\n1\n2\n1ffff\nfffffffe\ncc463bdc\n
3 
 
4 
 .include "testutils.inc"
5 
 start
6 
 clearf cz
7 
 moveq 0,r3
8 
 addc 0,r3
9 
 test_cc 0 0 0 0
10 
 dumpr3 ; 0
11 
 
12 
 setf z
13 
 moveq 0,r3
14 
 addc 0,r3
15 
 test_cc 0 1 0 0
16 
 dumpr3 ; 0
17 
 
18 
 setf cz
19 
 moveq 0,r3
20 
 addc 0,r3
21 
 test_cc 0 0 0 0
22 
 dumpr3 ; 1
23 
 
24 
 clearf c
25 
 moveq -1,r3
26 
 addc 2,r3
27 
 test_cc 0 0 0 1
28 
 dumpr3 ; 1+c
29 
 
30 
 moveq 2,r3
31 
 addc -1,r3
32 
 test_cc 0 0 0 1
33 
 dumpr3 ; 2+c
34 
 
35 
 move.d 0xffff,r3
36 
 addc 0xffff,r3
37 
 test_cc 0 0 0 0
38 
 dumpr3 ; 1ffff
39 
 
40 
 moveq -1,r3
41 
 addc -1,r3
42 
 test_cc 1 0 0 1
43 
 dumpr3 ; fffffffe+c
44 
 
45 
 move.d 0x78134452,r3
46 
 addc 0x5432f789,r3
47 
 test_cc 1 0 1 0
48 
 dumpr3 ; cc463bdc
49 
 
50 
 quit

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.