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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [nfdsads.cgs] - Blame information for rev 157

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Line No. Rev Author Line
1 24 jeremybenn 
# frv testcase for nfdsads $FRi,$FRj,$FRk
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# mach: fr500 fr550 frv
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4 
        .include "testutils.inc"
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6 
        float_constants
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        start
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        load_float_constants
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        load_float_constants1
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        .global nfdsads
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nfdsads:
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        nfdsads         fr16,fr0,fr2
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        test_fr_fr      fr2,fr0
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        test_fr_fr      fr3,fr52
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr4,fr2
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        test_fr_fr      fr2,fr4
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        test_fr_fr      fr3,fr48
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr8,fr2
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        test_fr_fr      fr2,fr8
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        test_fr_fr      fr3,fr28
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr12,fr2
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        test_fr_fr      fr2,fr12
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        test_fr_fr      fr3,fr24
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr16,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_fr_fr      fr3,fr16
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        test_fr_fr      fr3,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr20,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_fr_fr      fr3,fr16
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        test_fr_fr      fr3,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr24,fr2
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        test_fr_fr      fr2,fr24
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        test_fr_fr      fr3,fr12
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
52 
        nfdsads         fr16,fr28,fr2
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        test_fr_fr      fr2,fr28
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        test_fr_fr      fr3,fr8
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr32,fr2
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        test_fr_fr      fr2,fr32
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr36,fr2
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        test_fr_fr      fr2,fr36
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr40,fr2
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        test_fr_fr      fr2,fr40
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr44,fr2
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        test_fr_fr      fr2,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr48,fr2
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        test_fr_fr      fr2,fr48
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        test_fr_fr      fr3,fr4
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr16,fr52,fr2
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        test_fr_fr      fr2,fr52
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        test_fr_fr      fr3,fr0
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr0,fr2
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        test_fr_fr      fr2,fr0
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        test_fr_fr      fr3,fr52
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr4,fr2
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        test_fr_fr      fr2,fr4
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        test_fr_fr      fr3,fr48
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr8,fr2
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        test_fr_fr      fr2,fr8
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        test_fr_fr      fr3,fr28
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr12,fr2
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        test_fr_fr      fr2,fr12
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        test_fr_fr      fr3,fr24
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr16,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_fr_fr      fr3,fr16
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        test_fr_fr      fr3,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr20,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_fr_fr      fr3,fr16
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        test_fr_fr      fr3,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr24,fr2
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        test_fr_fr      fr2,fr24
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        test_fr_fr      fr3,fr12
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr28,fr2
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        test_fr_fr      fr2,fr28
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        test_fr_fr      fr3,fr8
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr32,fr2
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        test_fr_fr      fr2,fr32
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr36,fr2
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        test_fr_fr      fr2,fr36
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr40,fr2
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        test_fr_fr      fr2,fr40
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr44,fr2
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        test_fr_fr      fr2,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr48,fr2
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        test_fr_fr      fr2,fr48
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        test_fr_fr      fr3,fr4
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr20,fr52,fr2
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        test_fr_fr      fr2,fr52
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        test_fr_fr      fr3,fr0
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr8,fr28,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr12,fr24,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr24,fr12,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
170 
        nfdsads         fr28,fr8,fr2
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        test_fr_fr      fr2,fr16
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        test_fr_fr      fr2,fr20
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        test_fr_fr      fr3,fr32
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        test_fr_fr      fr3,fr32
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr36,fr40,fr2
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        test_fr_fr      fr2,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        ; try to cause exceptions
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        set_fr_fr       fr4,fr49
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        nfdsads         fr48,fr28,fr2
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;       test_fr_fr      fr2,fr44
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;       test_fr_fr      fr3,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr0,fr53
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        nfdsads         fr52,fr28,fr2
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;       test_fr_fr      fr2,fr44
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;       test_fr_fr      fr3,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr56,fr28,fr2
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;       test_fr_fr      fr2,fr44
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;       test_fr_fr      fr3,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfdsads         fr60,fr28,fr2
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;       test_fr_fr      fr2,fr44
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;       test_fr_fr      fr3,fr44
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        test_spr_immed  0xc,fner1
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        test_spr_immed  0,fner0
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        pass
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