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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [rett.cgs] - Blame information for rev 24

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# frv testcase for rett $debug
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global rett
rett:
        and_spr_immed   -4081,tbr               ; clear tbr.tt
        set_gr_spr      tbr,gr7
        inc_gr_immed    2112,gr7                ; address of exception handler
        set_bctrlr_0_0  gr7
 
        set_spr_immed   128,lcr
        set_gr_immed    0,gr7
 
        set_psr_et      1
        set_spr_addr    ok1,lr
        set_icc         0x0 0
        tira            gr7,4           ; should branch to tbr + (128 + 4)*16
ok0:
        test_gr_immed   1,gr7
        pass
        fail
ok1:
        inc_gr_immed    1,gr7
        rett            1               ; should be a nop
        rett            0
        fail

Line No.	Rev	Author	Line
1	24	jeremybenn	`# frv testcase for rett $debug`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global rett`
9			`rett:`
10			`and_spr_immed -4081,tbr ; clear tbr.tt`
11			`set_gr_spr tbr,gr7`
12			`inc_gr_immed 2112,gr7 ; address of exception handler`
13			`set_bctrlr_0_0 gr7`
14
15			`set_spr_immed 128,lcr`
16			`set_gr_immed 0,gr7`
17
18			`set_psr_et 1`
19			`set_spr_addr ok1,lr`
20			`set_icc 0x0 0`
21			`tira gr7,4 ; should branch to tbr + (128 + 4)*16`
22			`ok0:`
23			`test_gr_immed 1,gr7`
24			`pass`
25			`fail`
26			`ok1:`
27			`inc_gr_immed 1,gr7`
28			`rett 1 ; should be a nop`
29			`rett 0`
30			`fail`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [rett.cgs] - Blame information for rev 24