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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [movsd.s] - Blame information for rev 157

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# Hitachi H8 testcase 'movsd'
# mach(): all
# as(h8300):    --defsym sim_cpu=0
# as(h8300h):   --defsym sim_cpu=1
# as(h8300s):   --defsym sim_cpu=2
# as(h8sx):     --defsym sim_cpu=3
# ld(h8300h):   -m h8300helf
# ld(h8300s):   -m h8300self
# ld(h8sx):     -m h8300sxelf
 
        .include "testutils.inc"
 
        .data
src:    .byte   'h', 'e', 'l', 'l', 'o', 0
dst1:   .byte   0, 0, 0, 0, 0, 0, 0, 0, 0, 0
dst2:   .byte   0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 
        start
.if (sim_cpu == h8sx)
movsd_n:#
        # In this test, the transfer will stop after n bytes.
        #
        set_grs_a5a5
 
        mov     #src,  er5
        mov     #dst1, er6
        mov     #4, r4
        set_ccr_zero
        ;; movsd.b disp:16
        movsd.b fail1:16
;;;     .word   0x7b84
;;;     .word   0x02
 
        bra     pass1
fail1:  fail
pass1:  test_cc_clear
        test_gr_a5a5 0
        test_gr_a5a5 1
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_h_gr32  0xa5a50000 er4
        test_h_gr32  src+4  er5
        test_h_gr32  dst1+4 er6
        test_gr_a5a5 7
 
        #
        # Now make sure exactly 4 bytes were transferred.
        cmp.b   @src, @dst1
        bne     fail1:16
        cmp.b   @src+1, @dst1+1
        bne     fail1:16
        cmp.b   @src+2, @dst1+2
        bne     fail1:16
        cmp.b   @src+3, @dst1+3
        bne     fail1:16
        cmp.b   @src+4, @dst1+4
        beq     fail1:16
 
movsd_s:#
        # In this test, the entire null-terminated string is transferred.
        #
        set_grs_a5a5
 
        mov     #src,  er5
        mov     #dst2, er6
        mov     #8, r4
        set_ccr_zero
        ;; movsd.b disp:16
        movsd.b pass2:16
;;;     .word   0x7b84
;;;     .word   0x10
 
fail2:  fail
pass2:  test_cc_clear
        test_gr_a5a5 0
        test_gr_a5a5 1
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_h_gr32  0xa5a50002 er4
        test_h_gr32  src+6  er5
        test_h_gr32  dst2+6 er6
        test_gr_a5a5 7
        #
        # Now make sure 5 bytes were transferred, and the 6th is zero.
        cmp.b   @src, @dst2
        bne     fail2:16
        cmp.b   @src+1, @dst2+1
        bne     fail2:16
        cmp.b   @src+2, @dst2+2
        bne     fail2:16
        cmp.b   @src+3, @dst2+3
        bne     fail2:16
        cmp.b   @src+4, @dst2+4
        bne     fail2:16
        cmp.b   #0,     @dst2+5
        bne     fail2:16
.endif
        pass
 
        exit 0

Line No.	Rev	Author	Line
1	24	jeremybenn	`# Hitachi H8 testcase 'movsd'`
2			`# mach(): all`
3			`# as(h8300): --defsym sim_cpu=0`
4			`# as(h8300h): --defsym sim_cpu=1`
5			`# as(h8300s): --defsym sim_cpu=2`
6			`# as(h8sx): --defsym sim_cpu=3`
7			`# ld(h8300h): -m h8300helf`
8			`# ld(h8300s): -m h8300self`
9			`# ld(h8sx): -m h8300sxelf`
10
11			`.include "testutils.inc"`
12
13			`.data`
14			`src: .byte 'h', 'e', 'l', 'l', 'o', 0`
15			`dst1: .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0`
16			`dst2: .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0`
17
18			`start`
19			`.if (sim_cpu == h8sx)`
20			`movsd_n:#`
21			`# In this test, the transfer will stop after n bytes.`
22			`#`
23			`set_grs_a5a5`
24
25			`mov #src, er5`
26			`mov #dst1, er6`
27			`mov #4, r4`
28			`set_ccr_zero`
29			`;; movsd.b disp:16`
30			`movsd.b fail1:16`
31			`;;; .word 0x7b84`
32			`;;; .word 0x02`
33
34			`bra pass1`
35			`fail1: fail`
36			`pass1: test_cc_clear`
37			`test_gr_a5a5 0`
38			`test_gr_a5a5 1`
39			`test_gr_a5a5 2`
40			`test_gr_a5a5 3`
41			`test_h_gr32 0xa5a50000 er4`
42			`test_h_gr32 src+4 er5`
43			`test_h_gr32 dst1+4 er6`
44			`test_gr_a5a5 7`
45
46			`#`
47			`# Now make sure exactly 4 bytes were transferred.`
48			`cmp.b @src, @dst1`
49			`bne fail1:16`
50			`cmp.b @src+1, @dst1+1`
51			`bne fail1:16`
52			`cmp.b @src+2, @dst1+2`
53			`bne fail1:16`
54			`cmp.b @src+3, @dst1+3`
55			`bne fail1:16`
56			`cmp.b @src+4, @dst1+4`
57			`beq fail1:16`
58
59			`movsd_s:#`
60			`# In this test, the entire null-terminated string is transferred.`
61			`#`
62			`set_grs_a5a5`
63
64			`mov #src, er5`
65			`mov #dst2, er6`
66			`mov #8, r4`
67			`set_ccr_zero`
68			`;; movsd.b disp:16`
69			`movsd.b pass2:16`
70			`;;; .word 0x7b84`
71			`;;; .word 0x10`
72
73			`fail2: fail`
74			`pass2: test_cc_clear`
75			`test_gr_a5a5 0`
76			`test_gr_a5a5 1`
77			`test_gr_a5a5 2`
78			`test_gr_a5a5 3`
79			`test_h_gr32 0xa5a50002 er4`
80			`test_h_gr32 src+6 er5`
81			`test_h_gr32 dst2+6 er6`
82			`test_gr_a5a5 7`
83			`#`
84			`# Now make sure 5 bytes were transferred, and the 6th is zero.`
85			`cmp.b @src, @dst2`
86			`bne fail2:16`
87			`cmp.b @src+1, @dst2+1`
88			`bne fail2:16`
89			`cmp.b @src+2, @dst2+2`
90			`bne fail2:16`
91			`cmp.b @src+3, @dst2+3`
92			`bne fail2:16`
93			`cmp.b @src+4, @dst2+4`
94			`bne fail2:16`
95			`cmp.b #0, @dst2+5`
96			`bne fail2:16`
97			`.endif`
98			`pass`
99
100			`exit 0`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [movsd.s] - Blame information for rev 157