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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [subx.s] - Blame information for rev 225

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Line No. Rev Author Line
1 24 jeremybenn
# Hitachi H8 testcase 'subx'
2
# mach(): all
3
# as(h8300):    --defsym sim_cpu=0
4
# as(h8300h):   --defsym sim_cpu=1
5
# as(h8300s):   --defsym sim_cpu=2
6
# as(h8sx):     --defsym sim_cpu=3
7
# ld(h8300h):   -m h8300helf
8
# ld(h8300s):   -m h8300self
9
# ld(h8sx):     -m h8300sxelf
10
 
11
        .include "testutils.inc"
12
 
13
        # Instructions tested:
14
        # subx.b #xx:8, rd8     ; b rd8 xxxxxxxx
15
        # subx.b #xx:8, @erd    ; 7 d erd ???? b ???? xxxxxxxx 
16
        # subx.b #xx:8, @erd-   ; 0 1 7 6 6 c erd 1??? b ???? xxxxxxxx
17
        # subx.b rs8, rd8       ; 1 e rs8 rd8
18
        # subx.b rs8, @erd      ; 7 d erd ???? 1 e rs8 ????
19
        # subx.b rs8, @erd-     ; 0 1 7 6 6 c erd 1??? 1 e rs8 ????
20
        # subx.b @ers, rd8      ; 7 c ers ???? 1 e ???? rd8
21
        # subx.b @ers-, rd8     ; 0 1 7 6 6 c ers 00?? 1 e ???? rd8
22
        # subx.b @ers, @erd     ; 0 1 7 4 6 8 ers d 0 erd 3 ???? 
23
        # subx.b @ers-, @erd-   ; 0 1 7 6 6 c ers d a erd 3 ????
24
        #
25
        # word ops
26
        # long ops
27
 
28
.data
29
byte_src:       .byte 0x5
30
byte_dest:      .byte 0
31
 
32
        .align 2
33
word_src:       .word 0x505
34
word_dest:      .word 0
35
 
36
        .align 4
37
long_src:       .long 0x50505
38
long_dest:      .long 0
39
 
40
 
41
        start
42
 
43
subx_b_imm8_0:
44
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
45
        set_ccr_zero
46
 
47
        ;;  subx.b #xx:8,Rd     ; Subx with carry initially zero.
48
        subx.b  #5, r0l         ; Immediate 8-bit operand
49
 
50
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
51
        test_ovf_clear
52
        test_zero_clear
53
        test_neg_set
54
 
55
        test_h_gr16 0xa5a0 r0   ; sub result:   a5 - 5
56
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
57
        test_h_gr32 0xa5a5a5a0 er0      ; sub result:    a5 - 5
58
.endif
59
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
60
        test_gr_a5a5 2
61
        test_gr_a5a5 3
62
        test_gr_a5a5 4
63
        test_gr_a5a5 5
64
        test_gr_a5a5 6
65
        test_gr_a5a5 7
66
 
67
subx_b_imm8_1:
68
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
69
        set_ccr_zero
70
 
71
        ;;  subx.b #xx:8,Rd     ; Subx with carry initially one.
72
        set_carry_flag
73
        subx.b  #4, r0l         ; Immediate 8-bit operand
74
 
75
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
76
        test_ovf_clear
77
        test_zero_clear
78
        test_neg_set
79
 
80
        test_h_gr16 0xa5a0 r0   ; sub result:   a5 - (4 + 1)
81
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
82
        test_h_gr32 0xa5a5a5a0 er0      ; sub result:    a5 - (4 + 1)
83
.endif
84
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
85
        test_gr_a5a5 2
86
        test_gr_a5a5 3
87
        test_gr_a5a5 4
88
        test_gr_a5a5 5
89
        test_gr_a5a5 6
90
        test_gr_a5a5 7
91
 
92
.if (sim_cpu == h8sx)
93
subx_b_imm8_rdind:
94
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
95
 
96
        ;;  subx.b #xx:8,@eRd   ; Subx to register indirect
97
        mov     #byte_dest, er0
98
        mov.b   #0xa5, @er0
99
        set_ccr_zero
100
        subx.b  #5, @er0
101
 
102
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
103
        test_ovf_clear
104
        test_zero_clear
105
        test_neg_set
106
 
107
        test_h_gr32 byte_dest er0       ; er0 still contains subress
108
 
109
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
110
        test_gr_a5a5 2
111
        test_gr_a5a5 3
112
        test_gr_a5a5 4
113
        test_gr_a5a5 5
114
        test_gr_a5a5 6
115
        test_gr_a5a5 7
116
 
117
        ;; Now check the result of the sub to memory.
118
        cmp.b   #0xa0, @byte_dest
119
        beq     .Lb1
120
        fail
121
.Lb1:
122
 
123
subx_b_imm8_rdpostdec:
124
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
125
 
126
        ;;  subx.b #xx:8,@eRd-  ; Subx to register post-decrement
127
        mov     #byte_dest, er0
128
        mov.b   #0xa5, @er0
129
        set_ccr_zero
130
        subx.b  #5, @er0-
131
 
132
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
133
        test_ovf_clear
134
        test_zero_clear
135
        test_neg_set
136
 
137
        test_h_gr32 byte_dest-1 er0     ; er0 contains subress minus one
138
 
139
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
140
        test_gr_a5a5 2
141
        test_gr_a5a5 3
142
        test_gr_a5a5 4
143
        test_gr_a5a5 5
144
        test_gr_a5a5 6
145
        test_gr_a5a5 7
146
 
147
        ;; Now check the result of the sub to memory.
148
        cmp.b   #0xa0, @byte_dest
149
        beq     .Lb2
150
        fail
151
.Lb2:
152
.endif
153
 
154
subx_b_reg8_0:
155
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
156
 
157
        ;;  subx.b Rs,Rd        ; subx with carry initially zero
158
        mov.b   #5, r0h
159
        set_ccr_zero
160
        subx.b  r0h, r0l        ; Register operand
161
 
162
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
163
        test_ovf_clear
164
        test_zero_clear
165
        test_neg_set
166
 
167
        test_h_gr16 0x05a0 r0   ; sub result:   a5 - 5
168
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
169
        test_h_gr32 0xa5a505a0 er0      ; sub result:   a5 - 5
170
.endif
171
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
172
        test_gr_a5a5 2
173
        test_gr_a5a5 3
174
        test_gr_a5a5 4
175
        test_gr_a5a5 5
176
        test_gr_a5a5 6
177
        test_gr_a5a5 7
178
 
179
subx_b_reg8_1:
180
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
181
 
182
        ;;  subx.b Rs,Rd        ; subx with carry initially one
183
        mov.b   #4, r0h
184
        set_ccr_zero
185
        set_carry_flag
186
        subx.b  r0h, r0l        ; Register operand
187
 
188
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
189
        test_ovf_clear
190
        test_zero_clear
191
        test_neg_set
192
 
193
        test_h_gr16 0x04a0 r0   ; sub result:   a5 - (4 + 1)
194
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
195
        test_h_gr32 0xa5a504a0 er0      ; sub result:   a5 - (4 + 1)
196
.endif
197
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
198
        test_gr_a5a5 2
199
        test_gr_a5a5 3
200
        test_gr_a5a5 4
201
        test_gr_a5a5 5
202
        test_gr_a5a5 6
203
        test_gr_a5a5 7
204
 
205
.if (sim_cpu == h8sx)
206
subx_b_reg8_rdind:
207
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
208
 
209
        ;;  subx.b rs8,@eRd     ; Subx to register indirect
210
        mov     #byte_dest, er0
211
        mov.b   #0xa5, @er0
212
        mov.b   #5, r1l
213
        set_ccr_zero
214
        subx.b  r1l, @er0
215
 
216
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
217
        test_ovf_clear
218
        test_zero_clear
219
        test_neg_set
220
 
221
        test_h_gr32 byte_dest er0       ; er0 still contains subress
222
        test_h_gr32 0xa5a5a505 er1      ; er1 has the test load
223
 
224
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
225
        test_gr_a5a5 3
226
        test_gr_a5a5 4
227
        test_gr_a5a5 5
228
        test_gr_a5a5 6
229
        test_gr_a5a5 7
230
 
231
        ;; Now check the result of the sub to memory.
232
        cmp.b   #0xa0, @byte_dest
233
        beq     .Lb3
234
        fail
235
.Lb3:
236
 
237
subx_b_reg8_rdpostdec:
238
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
239
 
240
        ;;  subx.b rs8,@eRd-    ; Subx to register post-decrement
241
        mov     #byte_dest, er0
242
        mov.b   #0xa5, @er0
243
        mov.b   #5, r1l
244
        set_ccr_zero
245
        subx.b  r1l, @er0-
246
 
247
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
248
        test_ovf_clear
249
        test_zero_clear
250
        test_neg_set
251
 
252
        test_h_gr32 byte_dest-1 er0     ; er0 contains subress minus one
253
        test_h_gr32 0xa5a5a505 er1      ; er1 contains the test load
254
 
255
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
256
        test_gr_a5a5 3
257
        test_gr_a5a5 4
258
        test_gr_a5a5 5
259
        test_gr_a5a5 6
260
        test_gr_a5a5 7
261
 
262
        ;; Now check the result of the sub to memory.
263
        cmp.b   #0xa0, @byte_dest
264
        beq     .Lb4
265
        fail
266
.Lb4:
267
 
268
subx_b_rsind_reg8:
269
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
270
 
271
        ;;  subx.b @eRs,rd8     ; Subx from reg indirect to reg
272
        mov     #byte_src, er0
273
        set_ccr_zero
274
        subx.b  @er0, r1l
275
 
276
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
277
        test_ovf_clear
278
        test_zero_clear
279
        test_neg_set
280
 
281
        test_h_gr32 byte_src er0        ; er0 still contains subress
282
        test_h_gr32 0xa5a5a5a0 er1      ; er1 contains the sum
283
 
284
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
285
        test_gr_a5a5 3
286
        test_gr_a5a5 4
287
        test_gr_a5a5 5
288
        test_gr_a5a5 6
289
        test_gr_a5a5 7
290
 
291
subx_b_rspostdec_reg8:
292
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
293
 
294
        ;;  subx.b @eRs-,rd8    ; Subx to register post-decrement
295
        mov     #byte_src, er0
296
        set_ccr_zero
297
        subx.b  @er0-, r1l
298
 
299
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
300
        test_ovf_clear
301
        test_zero_clear
302
        test_neg_set
303
 
304
        test_h_gr32 byte_src-1 er0      ; er0 contains subress minus one
305
        test_h_gr32 0xa5a5a5a0 er1      ; er1 contains the sum
306
 
307
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
308
        test_gr_a5a5 3
309
        test_gr_a5a5 4
310
        test_gr_a5a5 5
311
        test_gr_a5a5 6
312
        test_gr_a5a5 7
313
 
314
subx_b_rsind_rdind:
315
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
316
 
317
        ;;  subx.b @eRs,rd8     ; Subx from reg indirect to reg
318
        mov     #byte_src, er0
319
        mov     #byte_dest, er1
320
        mov.b   #0xa5, @er1
321
        set_ccr_zero
322
        subx.b  @er0, @er1
323
 
324
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
325
        test_ovf_clear
326
        test_zero_clear
327
        test_neg_set
328
 
329
        test_h_gr32 byte_src er0        ; er0 still contains src subress
330
        test_h_gr32 byte_dest er1       ; er1 still contains dst subress
331
 
332
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
333
        test_gr_a5a5 3
334
        test_gr_a5a5 4
335
        test_gr_a5a5 5
336
        test_gr_a5a5 6
337
        test_gr_a5a5 7
338
        ;; Now check the result of the sub to memory.
339
        cmp.b   #0xa0, @byte_dest
340
        beq     .Lb5
341
        fail
342
.Lb5:
343
 
344
subx_b_rspostdec_rdpostdec:
345
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
346
 
347
        mov     #byte_src, er0
348
        mov     #byte_dest, er1
349
        mov.b   #0xa5, @er1
350
        set_ccr_zero
351
        ;;  subx.b @eRs-,@erd-  ; Subx post-decrement to post-decrement
352
        subx.b  @er0-, @er1-
353
 
354
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
355
        test_ovf_clear
356
        test_zero_clear
357
        test_neg_set
358
 
359
        test_h_gr32 byte_src-1 er0      ; er0 contains src subress minus one
360
        test_h_gr32 byte_dest-1 er1     ; er1 contains dst subress minus one
361
 
362
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
363
        test_gr_a5a5 3
364
        test_gr_a5a5 4
365
        test_gr_a5a5 5
366
        test_gr_a5a5 6
367
        test_gr_a5a5 7
368
        ;; Now check the result of the sub to memory.
369
        cmp.b   #0xa0, @byte_dest
370
        beq     .Lb6
371
        fail
372
.Lb6:
373
 
374
subx_w_imm16_0:
375
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
376
        set_ccr_zero
377
 
378
        ;;  subx.w #xx:16,Rd    ; Subx with carry initially zero.
379
        subx.w  #0x505, r0      ; Immediate 16-bit operand
380
 
381
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
382
        test_ovf_clear
383
        test_zero_clear
384
        test_neg_set
385
 
386
        test_h_gr16 0xa0a0 r0   ; sub result:   0xa5a5 + 0x505
387
        test_h_gr32 0xa5a5a0a0 er0      ; sub result:    0xa5a5 + 0x505
388
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
389
        test_gr_a5a5 2
390
        test_gr_a5a5 3
391
        test_gr_a5a5 4
392
        test_gr_a5a5 5
393
        test_gr_a5a5 6
394
        test_gr_a5a5 7
395
 
396
subx_w_imm16_1:
397
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
398
        set_ccr_zero
399
 
400
        ;;  subx.w #xx:16,Rd    ; Subx with carry initially one.
401
        set_carry_flag
402
        subx.w  #0x504, r0      ; Immediate 16-bit operand
403
 
404
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
405
        test_ovf_clear
406
        test_zero_clear
407
        test_neg_set
408
 
409
        test_h_gr16 0xa0a0 r0   ; sub result:   0xa5a5 + 0x505 + 1
410
        test_h_gr32 0xa5a5a0a0 er0      ; sub result:    0xa5a5 + 0x505 + 1
411
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
412
        test_gr_a5a5 2
413
        test_gr_a5a5 3
414
        test_gr_a5a5 4
415
        test_gr_a5a5 5
416
        test_gr_a5a5 6
417
        test_gr_a5a5 7
418
 
419
subx_w_imm16_rdind:
420
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
421
 
422
        ;;  subx.w #xx:16,@eRd  ; Subx to register indirect
423
        mov     #word_dest, er0
424
        mov.w   #0xa5a5, @er0
425
        set_ccr_zero
426
        subx.w  #0x505, @er0
427
 
428
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
429
        test_ovf_clear
430
        test_zero_clear
431
        test_neg_set
432
 
433
        test_h_gr32 word_dest er0       ; er0 still contains subress
434
 
435
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
436
        test_gr_a5a5 2
437
        test_gr_a5a5 3
438
        test_gr_a5a5 4
439
        test_gr_a5a5 5
440
        test_gr_a5a5 6
441
        test_gr_a5a5 7
442
 
443
        ;; Now check the result of the sub to memory.
444
        cmp.w   #0xa0a0, @word_dest
445
        beq     .Lw1
446
        fail
447
.Lw1:
448
 
449
subx_w_imm16_rdpostdec:
450
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
451
 
452
        ;;  subx.w #xx:16,@eRd- ; Subx to register post-decrement
453
        mov     #word_dest, er0
454
        mov.w   #0xa5a5, @er0
455
        set_ccr_zero
456
        subx.w  #0x505, @er0-
457
 
458
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
459
        test_ovf_clear
460
        test_zero_clear
461
        test_neg_set
462
 
463
        test_h_gr32 word_dest-2 er0     ; er0 contains subress minus one
464
 
465
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
466
        test_gr_a5a5 2
467
        test_gr_a5a5 3
468
        test_gr_a5a5 4
469
        test_gr_a5a5 5
470
        test_gr_a5a5 6
471
        test_gr_a5a5 7
472
 
473
        ;; Now check the result of the sub to memory.
474
        cmp.w   #0xa0a0, @word_dest
475
        beq     .Lw2
476
        fail
477
.Lw2:
478
 
479
subx_w_reg16_0:
480
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
481
 
482
        ;;  subx.w Rs,Rd        ; subx with carry initially zero
483
        mov.w   #0x505, e0
484
        set_ccr_zero
485
        subx.w  e0, r0          ; Register operand
486
 
487
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
488
        test_ovf_clear
489
        test_zero_clear
490
        test_neg_set
491
 
492
        test_h_gr32 0x0505a0a0 er0      ; sub result:
493
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
494
        test_gr_a5a5 2
495
        test_gr_a5a5 3
496
        test_gr_a5a5 4
497
        test_gr_a5a5 5
498
        test_gr_a5a5 6
499
        test_gr_a5a5 7
500
 
501
subx_w_reg16_1:
502
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
503
 
504
        ;;  subx.w Rs,Rd        ; subx with carry initially one
505
        mov.w   #0x504, e0
506
        set_ccr_zero
507
        set_carry_flag
508
        subx.w  e0, r0          ; Register operand
509
 
510
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
511
        test_ovf_clear
512
        test_zero_clear
513
        test_neg_set
514
 
515
        test_h_gr32 0x0504a0a0 er0      ; sub result:
516
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
517
        test_gr_a5a5 2
518
        test_gr_a5a5 3
519
        test_gr_a5a5 4
520
        test_gr_a5a5 5
521
        test_gr_a5a5 6
522
        test_gr_a5a5 7
523
 
524
subx_w_reg16_rdind:
525
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
526
 
527
        ;;  subx.w rs8,@eRd     ; Subx to register indirect
528
        mov     #word_dest, er0
529
        mov.w   #0xa5a5, @er0
530
        mov.w   #0x505, r1
531
        set_ccr_zero
532
        subx.w  r1, @er0
533
 
534
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
535
        test_ovf_clear
536
        test_zero_clear
537
        test_neg_set
538
 
539
        test_h_gr32 word_dest er0       ; er0 still contains subress
540
        test_h_gr32 0xa5a50505 er1      ; er1 has the test load
541
 
542
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
543
        test_gr_a5a5 3
544
        test_gr_a5a5 4
545
        test_gr_a5a5 5
546
        test_gr_a5a5 6
547
        test_gr_a5a5 7
548
 
549
        ;; Now check the result of the sub to memory.
550
        cmp.w   #0xa0a0, @word_dest
551
        beq     .Lw3
552
        fail
553
.Lw3:
554
 
555
subx_w_reg16_rdpostdec:
556
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
557
 
558
        ;;  subx.w rs8,@eRd-    ; Subx to register post-decrement
559
        mov     #word_dest, er0
560
        mov.w   #0xa5a5, @er0
561
        mov.w   #0x505, r1
562
        set_ccr_zero
563
        subx.w  r1, @er0-
564
 
565
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
566
        test_ovf_clear
567
        test_zero_clear
568
        test_neg_set
569
 
570
        test_h_gr32 word_dest-2 er0     ; er0 contains subress minus one
571
        test_h_gr32 0xa5a50505  er1     ; er1 contains the test load
572
 
573
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
574
        test_gr_a5a5 3
575
        test_gr_a5a5 4
576
        test_gr_a5a5 5
577
        test_gr_a5a5 6
578
        test_gr_a5a5 7
579
 
580
        ;; Now check the result of the sub to memory.
581
        cmp.w   #0xa0a0, @word_dest
582
        beq     .Lw4
583
        fail
584
.Lw4:
585
 
586
subx_w_rsind_reg16:
587
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
588
 
589
        ;;  subx.w @eRs,rd8     ; Subx from reg indirect to reg
590
        mov     #word_src, er0
591
        set_ccr_zero
592
        subx.w  @er0, r1
593
 
594
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
595
        test_ovf_clear
596
        test_zero_clear
597
        test_neg_set
598
 
599
        test_h_gr32 word_src er0        ; er0 still contains subress
600
        test_h_gr32 0xa5a5a0a0 er1      ; er1 contains the sum
601
 
602
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
603
        test_gr_a5a5 3
604
        test_gr_a5a5 4
605
        test_gr_a5a5 5
606
        test_gr_a5a5 6
607
        test_gr_a5a5 7
608
 
609
subx_w_rspostdec_reg16:
610
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
611
 
612
        ;;  subx.w @eRs-,rd8    ; Subx to register post-decrement
613
        mov     #word_src, er0
614
        set_ccr_zero
615
        subx.w  @er0-, r1
616
 
617
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
618
        test_ovf_clear
619
        test_zero_clear
620
        test_neg_set
621
 
622
        test_h_gr32 word_src-2 er0      ; er0 contains subress minus one
623
        test_h_gr32 0xa5a5a0a0 er1      ; er1 contains the sum
624
 
625
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
626
        test_gr_a5a5 3
627
        test_gr_a5a5 4
628
        test_gr_a5a5 5
629
        test_gr_a5a5 6
630
        test_gr_a5a5 7
631
 
632
subx_w_rsind_rdind:
633
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
634
 
635
        ;;  subx.w @eRs,rd8     ; Subx from reg indirect to reg
636
        mov     #word_src, er0
637
        mov     #word_dest, er1
638
        mov.w   #0xa5a5, @er1
639
        set_ccr_zero
640
        subx.w  @er0, @er1
641
 
642
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
643
        test_ovf_clear
644
        test_zero_clear
645
        test_neg_set
646
 
647
        test_h_gr32 word_src er0        ; er0 still contains src subress
648
        test_h_gr32 word_dest er1       ; er1 still contains dst subress
649
 
650
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
651
        test_gr_a5a5 3
652
        test_gr_a5a5 4
653
        test_gr_a5a5 5
654
        test_gr_a5a5 6
655
        test_gr_a5a5 7
656
        ;; Now check the result of the sub to memory.
657
        cmp.w   #0xa0a0, @word_dest
658
        beq     .Lw5
659
        fail
660
.Lw5:
661
 
662
subx_w_rspostdec_rdpostdec:
663
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
664
 
665
        ;;  subx.w @eRs-,rd8    ; Subx to register post-decrement
666
        mov     #word_src, er0
667
        mov     #word_dest, er1
668
        mov.w   #0xa5a5, @er1
669
        set_ccr_zero
670
        subx.w  @er0-, @er1-
671
 
672
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
673
        test_ovf_clear
674
        test_zero_clear
675
        test_neg_set
676
 
677
        test_h_gr32 word_src-2 er0      ; er0 contains src subress minus one
678
        test_h_gr32 word_dest-2 er1     ; er1 contains dst subress minus one
679
 
680
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
681
        test_gr_a5a5 3
682
        test_gr_a5a5 4
683
        test_gr_a5a5 5
684
        test_gr_a5a5 6
685
        test_gr_a5a5 7
686
        ;; Now check the result of the sub to memory.
687
        cmp.w   #0xa0a0, @word_dest
688
        beq     .Lw6
689
        fail
690
.Lw6:
691
 
692
subx_l_imm32_0:
693
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
694
        set_ccr_zero
695
 
696
        ;;  subx.l #xx:32,Rd    ; Subx with carry initially zero.
697
        subx.l  #0x50505, er0   ; Immediate 32-bit operand
698
 
699
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
700
        test_ovf_clear
701
        test_zero_clear
702
        test_neg_set
703
 
704
        test_h_gr32 0xa5a0a0a0 er0      ; sub result:
705
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
706
        test_gr_a5a5 2
707
        test_gr_a5a5 3
708
        test_gr_a5a5 4
709
        test_gr_a5a5 5
710
        test_gr_a5a5 6
711
        test_gr_a5a5 7
712
 
713
subx_l_imm32_1:
714
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
715
        set_ccr_zero
716
 
717
        ;;  subx.l #xx:32,Rd    ; Subx with carry initially one.
718
        set_carry_flag
719
        subx.l  #0x50504, er0   ; Immediate 32-bit operand
720
 
721
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
722
        test_ovf_clear
723
        test_zero_clear
724
        test_neg_set
725
 
726
        test_h_gr32 0xa5a0a0a0 er0      ; sub result:
727
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
728
        test_gr_a5a5 2
729
        test_gr_a5a5 3
730
        test_gr_a5a5 4
731
        test_gr_a5a5 5
732
        test_gr_a5a5 6
733
        test_gr_a5a5 7
734
 
735
subx_l_imm32_rdind:
736
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
737
 
738
        ;;  subx.l #xx:32,@eRd  ; Subx to register indirect
739
        mov     #long_dest, er0
740
        mov.l   #0xa5a5a5a5, @er0
741
        set_ccr_zero
742
        subx.l  #0x50505, @er0
743
 
744
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
745
        test_ovf_clear
746
        test_zero_clear
747
        test_neg_set
748
 
749
        test_h_gr32 long_dest er0       ; er0 still contains subress
750
 
751
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
752
        test_gr_a5a5 2
753
        test_gr_a5a5 3
754
        test_gr_a5a5 4
755
        test_gr_a5a5 5
756
        test_gr_a5a5 6
757
        test_gr_a5a5 7
758
 
759
        ;; Now check the result of the sub to memory.
760
        cmp.l   #0xa5a0a0a0, @long_dest
761
        beq     .Ll1
762
        fail
763
.Ll1:
764
 
765
subx_l_imm32_rdpostdec:
766
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
767
 
768
        ;;  subx.l #xx:32,@eRd- ; Subx to register post-decrement
769
        mov     #long_dest, er0
770
        mov.l   #0xa5a5a5a5, @er0
771
        set_ccr_zero
772
        subx.l  #0x50505, @er0-
773
 
774
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
775
        test_ovf_clear
776
        test_zero_clear
777
        test_neg_set
778
 
779
        test_h_gr32 long_dest-4 er0     ; er0 contains subress minus one
780
 
781
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
782
        test_gr_a5a5 2
783
        test_gr_a5a5 3
784
        test_gr_a5a5 4
785
        test_gr_a5a5 5
786
        test_gr_a5a5 6
787
        test_gr_a5a5 7
788
 
789
        ;; Now check the result of the sub to memory.
790
        cmp.l   #0xa5a0a0a0, @long_dest
791
        beq     .Ll2
792
        fail
793
.Ll2:
794
 
795
subx_l_reg32_0:
796
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
797
 
798
        ;;  subx.l Rs,Rd        ; subx with carry initially zero
799
        mov.l   #0x50505, er0
800
        set_ccr_zero
801
        subx.l  er0, er1        ; Register operand
802
 
803
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
804
        test_ovf_clear
805
        test_zero_clear
806
        test_neg_set
807
 
808
        test_h_gr32 0x50505    er0      ; sub load
809
        test_h_gr32 0xa5a0a0a0 er1      ; sub result:
810
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
811
        test_gr_a5a5 3
812
        test_gr_a5a5 4
813
        test_gr_a5a5 5
814
        test_gr_a5a5 6
815
        test_gr_a5a5 7
816
 
817
subx_l_reg32_1:
818
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
819
 
820
        ;;  subx.l Rs,Rd        ; subx with carry initially one
821
        mov.l   #0x50504, er0
822
        set_ccr_zero
823
        set_carry_flag
824
        subx.l  er0, er1        ; Register operand
825
 
826
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
827
        test_ovf_clear
828
        test_zero_clear
829
        test_neg_set
830
 
831
        test_h_gr32 0x50504    er0      ; sub result:
832
        test_h_gr32 0xa5a0a0a0 er1      ; sub result:
833
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
834
        test_gr_a5a5 3
835
        test_gr_a5a5 4
836
        test_gr_a5a5 5
837
        test_gr_a5a5 6
838
        test_gr_a5a5 7
839
 
840
subx_l_reg32_rdind:
841
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
842
 
843
        ;;  subx.l rs8,@eRd     ; Subx to register indirect
844
        mov     #long_dest, er0
845
        mov.l   er1, @er0
846
        mov.l   #0x50505, er1
847
        set_ccr_zero
848
        subx.l  er1, @er0
849
 
850
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
851
        test_ovf_clear
852
        test_zero_clear
853
        test_neg_set
854
 
855
        test_h_gr32 long_dest er0       ; er0 still contains subress
856
        test_h_gr32 0x50505   er1       ; er1 has the test load
857
 
858
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
859
        test_gr_a5a5 3
860
        test_gr_a5a5 4
861
        test_gr_a5a5 5
862
        test_gr_a5a5 6
863
        test_gr_a5a5 7
864
 
865
        ;; Now check the result of the sub to memory.
866
        cmp.l   #0xa5a0a0a0, @long_dest
867
        beq     .Ll3
868
        fail
869
.Ll3:
870
 
871
subx_l_reg32_rdpostdec:
872
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
873
 
874
        ;;  subx.l rs8,@eRd-    ; Subx to register post-decrement
875
        mov     #long_dest, er0
876
        mov.l   er1, @er0
877
        mov.l   #0x50505, er1
878
        set_ccr_zero
879
        subx.l  er1, @er0-
880
 
881
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
882
        test_ovf_clear
883
        test_zero_clear
884
        test_neg_set
885
 
886
        test_h_gr32 long_dest-4 er0     ; er0 contains subress minus one
887
        test_h_gr32 0x50505     er1     ; er1 contains the test load
888
 
889
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
890
        test_gr_a5a5 3
891
        test_gr_a5a5 4
892
        test_gr_a5a5 5
893
        test_gr_a5a5 6
894
        test_gr_a5a5 7
895
 
896
        ;; Now check the result of the sub to memory.
897
        cmp.l   #0xa5a0a0a0, @long_dest
898
        beq     .Ll4
899
        fail
900
.Ll4:
901
 
902
subx_l_rsind_reg32:
903
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
904
 
905
        ;;  subx.l @eRs,rd8     ; Subx from reg indirect to reg
906
        mov     #long_src, er0
907
        set_ccr_zero
908
        subx.l  @er0, er1
909
 
910
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
911
        test_ovf_clear
912
        test_zero_clear
913
        test_neg_set
914
 
915
        test_h_gr32 long_src er0        ; er0 still contains subress
916
        test_h_gr32 0xa5a0a0a0 er1      ; er1 contains the sum
917
 
918
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
919
        test_gr_a5a5 3
920
        test_gr_a5a5 4
921
        test_gr_a5a5 5
922
        test_gr_a5a5 6
923
        test_gr_a5a5 7
924
 
925
subx_l_rspostdec_reg32:
926
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
927
 
928
        ;;  subx.l @eRs-,rd8    ; Subx to register post-decrement
929
        mov     #long_src, er0
930
        set_ccr_zero
931
        subx.l  @er0-, er1
932
 
933
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
934
        test_ovf_clear
935
        test_zero_clear
936
        test_neg_set
937
 
938
        test_h_gr32 long_src-4 er0      ; er0 contains subress minus one
939
        test_h_gr32 0xa5a0a0a0 er1      ; er1 contains the sum
940
 
941
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
942
        test_gr_a5a5 3
943
        test_gr_a5a5 4
944
        test_gr_a5a5 5
945
        test_gr_a5a5 6
946
        test_gr_a5a5 7
947
 
948
subx_l_rsind_rdind:
949
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
950
 
951
        ;;  subx.l @eRs,rd8     ; Subx from reg indirect to reg
952
        mov     #long_src, er0
953
        mov     #long_dest, er1
954
        mov.l   er2, @er1
955
        set_ccr_zero
956
        subx.l  @er0, @er1
957
 
958
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
959
        test_ovf_clear
960
        test_zero_clear
961
        test_neg_set
962
 
963
        test_h_gr32 long_src er0        ; er0 still contains src subress
964
        test_h_gr32 long_dest er1       ; er1 still contains dst subress
965
 
966
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
967
        test_gr_a5a5 3
968
        test_gr_a5a5 4
969
        test_gr_a5a5 5
970
        test_gr_a5a5 6
971
        test_gr_a5a5 7
972
        ;; Now check the result of the sub to memory.
973
        cmp.l   #0xa5a0a0a0, @long_dest
974
        beq     .Ll5
975
        fail
976
.Ll5:
977
 
978
subx_l_rspostdec_rdpostdec:
979
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
980
 
981
        ;;  subx.l @eRs-,rd8    ; Subx to register post-decrement
982
        mov     #long_src, er0
983
        mov     #long_dest, er1
984
        mov.l   er2, @er1
985
        set_ccr_zero
986
        subx.l  @er0-, @er1-
987
 
988
        test_carry_clear        ; H=0 N=1 Z=0 V=0 C=0
989
        test_ovf_clear
990
        test_zero_clear
991
        test_neg_set
992
 
993
        test_h_gr32 long_src-4 er0      ; er0 contains src subress minus one
994
        test_h_gr32 long_dest-4 er1     ; er1 contains dst subress minus one
995
 
996
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
997
        test_gr_a5a5 3
998
        test_gr_a5a5 4
999
        test_gr_a5a5 5
1000
        test_gr_a5a5 6
1001
        test_gr_a5a5 7
1002
        ;; Now check the result of the sub to memory.
1003
        cmp.l   #0xa5a0a0a0, @long_dest
1004
        beq     .Ll6
1005
        fail
1006
.Ll6:
1007
.endif
1008
        pass
1009
 
1010
        exit 0

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