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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [lock.cgs] - Blame information for rev 157

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Line No. Rev Author Line
1 24 jeremybenn
# m32r testcase for lock $dr,@$sr
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# mach(): m32r m32rx
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        .include "testutils.inc"
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        start
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        .global lock
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lock:
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        mvaddr_h_gr r4, data_loc
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        mvi_h_gr    r5, 0
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        lock r5, @r4
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        test_h_gr r5, 0x12345678
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        ; There is no way to test the lock bit
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        unlock r5, @r4  ; Unlock the processor
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        pass
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data_loc:
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        .word 0x12345678
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