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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fadd.s] - Blame information for rev 157

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Line No. Rev Author Line
1 24 jeremybenn
# sh testcase for fadd
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# mach: sh
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# as(sh):       -defsym sim_cpu=0
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        .include "testutils.inc"
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        start
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fadd_freg_freg_b0:
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        set_grs_a5a5
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        set_fprs_a5a5
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        bank0
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        fldi1 fr0
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        fldi1 fr1
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        fadd fr0, fr1
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        assert_fpreg_i 2 fr1
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        fldi0 fr0
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        fldi1 fr1
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        fadd fr0, fr1
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        assert_fpreg_i 1 fr1
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        fldi1 fr0
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        fldi0 fr1
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        fadd fr0, fr1
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        assert_fpreg_i 1 fr1
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        test_grs_a5a5
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        assert_fpreg_i 1 fr0
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        test_fpr_a5a5  fr2
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        test_fpr_a5a5  fr3
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        test_fpr_a5a5  fr4
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        test_fpr_a5a5  fr5
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        test_fpr_a5a5  fr6
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        test_fpr_a5a5  fr7
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        test_fpr_a5a5  fr8
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        test_fpr_a5a5  fr9
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        test_fpr_a5a5  fr10
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        test_fpr_a5a5  fr11
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        test_fpr_a5a5  fr12
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        test_fpr_a5a5  fr13
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        test_fpr_a5a5  fr14
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        test_fpr_a5a5  fr15
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fadd_dreg_dreg_b0:
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        set_grs_a5a5
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        set_fprs_a5a5
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        double_prec
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        fldi1   fr0
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        fldi1   fr2
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        flds    fr0, fpul
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        fcnvsd  fpul, dr0
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        flds    fr2, fpul
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        fcnvsd  fpul, dr2
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        fadd dr0, dr2
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        fcnvds  dr2, fpul
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        fsts    fpul, fr0
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        test_grs_a5a5
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        assert_fpreg_i  2, fr0
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        assert_dpreg_i  2, dr2
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        test_fpr_a5a5   fr4
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        test_fpr_a5a5   fr5
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        test_fpr_a5a5   fr6
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        test_fpr_a5a5   fr7
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        test_fpr_a5a5   fr8
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        test_fpr_a5a5   fr9
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        test_fpr_a5a5   fr10
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        test_fpr_a5a5   fr11
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        test_fpr_a5a5   fr12
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        test_fpr_a5a5   fr13
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        test_fpr_a5a5   fr14
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        test_fpr_a5a5   fr15
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        pass
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        exit 0

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