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# sh testcase for fadd
# mach: sh
# as(sh):       -defsym sim_cpu=0
 
        .include "testutils.inc"
 
        start
fadd_freg_freg_b0:
        set_grs_a5a5
        set_fprs_a5a5
        bank0
 
        fldi1 fr0
        fldi1 fr1
        fadd fr0, fr1
        assert_fpreg_i 2 fr1
 
        fldi0 fr0
        fldi1 fr1
        fadd fr0, fr1
        assert_fpreg_i 1 fr1
 
        fldi1 fr0
        fldi0 fr1
        fadd fr0, fr1
        assert_fpreg_i 1 fr1
        test_grs_a5a5
        assert_fpreg_i 1 fr0
        test_fpr_a5a5  fr2
        test_fpr_a5a5  fr3
        test_fpr_a5a5  fr4
        test_fpr_a5a5  fr5
        test_fpr_a5a5  fr6
        test_fpr_a5a5  fr7
        test_fpr_a5a5  fr8
        test_fpr_a5a5  fr9
        test_fpr_a5a5  fr10
        test_fpr_a5a5  fr11
        test_fpr_a5a5  fr12
        test_fpr_a5a5  fr13
        test_fpr_a5a5  fr14
        test_fpr_a5a5  fr15
 
fadd_dreg_dreg_b0:
        set_grs_a5a5
        set_fprs_a5a5
        double_prec
        fldi1   fr0
        fldi1   fr2
        flds    fr0, fpul
        fcnvsd  fpul, dr0
        flds    fr2, fpul
        fcnvsd  fpul, dr2
        fadd dr0, dr2
        fcnvds  dr2, fpul
        fsts    fpul, fr0
 
        test_grs_a5a5
        assert_fpreg_i  2, fr0
        assert_dpreg_i  2, dr2
        test_fpr_a5a5   fr4
        test_fpr_a5a5   fr5
        test_fpr_a5a5   fr6
        test_fpr_a5a5   fr7
        test_fpr_a5a5   fr8
        test_fpr_a5a5   fr9
        test_fpr_a5a5   fr10
        test_fpr_a5a5   fr11
        test_fpr_a5a5   fr12
        test_fpr_a5a5   fr13
        test_fpr_a5a5   fr14
        test_fpr_a5a5   fr15
 
        pass
        exit 0

Line No.	Rev	Author	Line
1	24	jeremybenn	`# sh testcase for fadd`
2			`# mach: sh`
3			`# as(sh): -defsym sim_cpu=0`
4
5			`.include "testutils.inc"`
6
7			`start`
8			`fadd_freg_freg_b0:`
9			`set_grs_a5a5`
10			`set_fprs_a5a5`
11			`bank0`
12
13			`fldi1 fr0`
14			`fldi1 fr1`
15			`fadd fr0, fr1`
16			`assert_fpreg_i 2 fr1`
17
18			`fldi0 fr0`
19			`fldi1 fr1`
20			`fadd fr0, fr1`
21			`assert_fpreg_i 1 fr1`
22
23			`fldi1 fr0`
24			`fldi0 fr1`
25			`fadd fr0, fr1`
26			`assert_fpreg_i 1 fr1`
27			`test_grs_a5a5`
28			`assert_fpreg_i 1 fr0`
29			`test_fpr_a5a5 fr2`
30			`test_fpr_a5a5 fr3`
31			`test_fpr_a5a5 fr4`
32			`test_fpr_a5a5 fr5`
33			`test_fpr_a5a5 fr6`
34			`test_fpr_a5a5 fr7`
35			`test_fpr_a5a5 fr8`
36			`test_fpr_a5a5 fr9`
37			`test_fpr_a5a5 fr10`
38			`test_fpr_a5a5 fr11`
39			`test_fpr_a5a5 fr12`
40			`test_fpr_a5a5 fr13`
41			`test_fpr_a5a5 fr14`
42			`test_fpr_a5a5 fr15`
43
44			`fadd_dreg_dreg_b0:`
45			`set_grs_a5a5`
46			`set_fprs_a5a5`
47			`double_prec`
48			`fldi1 fr0`
49			`fldi1 fr2`
50			`flds fr0, fpul`
51			`fcnvsd fpul, dr0`
52			`flds fr2, fpul`
53			`fcnvsd fpul, dr2`
54			`fadd dr0, dr2`
55			`fcnvds dr2, fpul`
56			`fsts fpul, fr0`
57
58			`test_grs_a5a5`
59			`assert_fpreg_i 2, fr0`
60			`assert_dpreg_i 2, dr2`
61			`test_fpr_a5a5 fr4`
62			`test_fpr_a5a5 fr5`
63			`test_fpr_a5a5 fr6`
64			`test_fpr_a5a5 fr7`
65			`test_fpr_a5a5 fr8`
66			`test_fpr_a5a5 fr9`
67			`test_fpr_a5a5 fr10`
68			`test_fpr_a5a5 fr11`
69			`test_fpr_a5a5 fr12`
70			`test_fpr_a5a5 fr13`
71			`test_fpr_a5a5 fr14`
72			`test_fpr_a5a5 fr15`
73
74			`pass`
75			`exit 0`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fadd.s] - Blame information for rev 301