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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fipr.s] - Blame information for rev 272

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Line No. Rev Author Line
1 24 jeremybenn
# sh testcase for fipr $fvm, $fvn
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# mach: sh
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# as(sh):       -defsym sim_cpu=0
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        .include "testutils.inc"
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        start
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initv0:
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        set_grs_a5a5
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        set_fprs_a5a5
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        # Load 1 into fr0.
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        fldi1   fr0
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        # Load 2 into fr1.
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        fldi1   fr1
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        fadd    fr1, fr1
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        # Load 4 into fr2.
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        fldi1   fr2
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        fadd    fr2, fr2
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        fadd    fr2, fr2
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        # Load 8 into fr3.
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        fmov    fr2, fr3
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        fadd    fr2, fr3
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initv8:
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        fldi1   fr8
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        fldi0   fr9
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        fldi1   fr10
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        fldi0   fr11
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        fipr    fv0, fv8
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test1:
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        # Result will be in fr11.
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        assert_fpreg_i  1, fr0
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        assert_fpreg_i  2, fr1
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        assert_fpreg_i  4, fr2
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        assert_fpreg_i  8, fr3
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        assert_fpreg_x  0xa5a5a5a5, fr4
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        assert_fpreg_x  0xa5a5a5a5, fr5
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        assert_fpreg_x  0xa5a5a5a5, fr6
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        assert_fpreg_x  0xa5a5a5a5, fr7
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        assert_fpreg_i  1, fr8
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        assert_fpreg_i  0, fr9
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        assert_fpreg_i  1, fr10
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        assert_fpreg_i  5, fr11
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        assert_fpreg_x  0xa5a5a5a5, fr12
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        assert_fpreg_x  0xa5a5a5a5, fr13
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        assert_fpreg_x  0xa5a5a5a5, fr14
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        assert_fpreg_x  0xa5a5a5a5, fr15
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        test_grs_a5a5
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test_infp:
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        # Test positive infinity
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        fldi0   fr11
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        mov.l   infp, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be plus infinity
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        assert_fpreg_x  0x7f800000, fr11
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test_infm:
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        # Test negitive infinity
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        fldi0   fr11
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        mov.l   infm, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be plus infinity
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        assert_fpreg_x  0xff800000, fr11
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test_qnanp:
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        # Test positive qnan
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        fldi0   fr11
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        mov.l   qnanp, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be plus qnan (or greater)
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        flds    fr11, fpul
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        sts     fpul, r1
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        cmp/ge  r0, r1
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        bt      .L0
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        fail
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.L0:
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test_snanp:
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        # Test positive snan
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        fldi0   fr11
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        mov.l   snanp, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be plus snan (or greater)
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        flds    fr11, fpul
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        sts     fpul, r1
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        cmp/ge  r0, r1
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        bt      .L1
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        fail
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.L1:
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.if 0
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        # Handling of nan and inf not implemented yet.
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test_qnanm:
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        # Test negantive qnan
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        fldi0   fr11
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        mov.l   qnanm, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be minus qnan (or less)
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        flds    fr11, fpul
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        sts     fpul, r1
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        cmp/ge  r1, r0
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        bt      .L2
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        fail
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.L2:
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test_snanm:
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        # Test negative snan
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        fldi0   fr11
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        mov.l   snanm, r0
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        lds     r0, fpul
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        fsts    fpul, fr0
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        fipr    fv0, fv8
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        # fr11 should be minus snan (or less)
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        flds    fr11, fpul
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        sts     fpul, r1
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        cmp/ge  r1, r0
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        bt      .L3
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        fail
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.L3:
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.endif
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        pass
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        exit 0
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        .align 2
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qnanp:  .long   0x7f800001
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qnanm:  .long   0xff800001
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snanp:  .long   0x7fc00000
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snanm:  .long   0xffc00000
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infp:   .long   0x7f800000
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infm:   .long   0xff800000

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