OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [float.s] - Blame information for rev 301

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# sh testcase for float
2
# mach: sh
3
# as(sh):       -defsym sim_cpu=0
4
 
5
        .include "testutils.inc"
6
 
7
        start
8
 
9
float_pos:
10
        set_grs_a5a5
11
        set_fprs_a5a5
12
        single_prec
13
        mov     #3, r0
14
        lds     r0, fpul
15
        float   fpul, fr2
16
 
17
        # Check the result.
18
        fldi1   fr0
19
        fldi1   fr1
20
        fadd    fr0, fr1
21
        fadd    fr0, fr1
22
        fcmp/eq fr1, fr2
23
        bt      float_neg
24
        fail
25
 
26
float_neg:
27
        mov     #3, r0
28
        neg     r0, r0
29
        lds     r0, fpul
30
        float   fpul, fr2
31
 
32
        # Check the result.
33
        fldi1   fr0
34
        fldi1   fr1
35
        fadd    fr0, fr1
36
        fadd    fr0, fr1
37
        fneg    fr1
38
        fcmp/eq fr1, fr2
39
        bt      .L0
40
        fail
41
.L0:
42
        assertreg0      -3
43
        test_gr_a5a5    r1
44
        test_gr_a5a5    r2
45
        test_gr_a5a5    r3
46
        test_gr_a5a5    r4
47
        test_gr_a5a5    r5
48
        test_gr_a5a5    r6
49
        test_gr_a5a5    r7
50
        test_gr_a5a5    r8
51
        test_gr_a5a5    r9
52
        test_gr_a5a5    r10
53
        test_gr_a5a5    r11
54
        test_gr_a5a5    r12
55
        test_gr_a5a5    r13
56
        test_gr_a5a5    r14
57
 
58
        assert_fpreg_i   1, fr0
59
        assert_fpreg_i  -3, fr1
60
        assert_fpreg_i  -3, fr2
61
        test_fpr_a5a5   fr3
62
        test_fpr_a5a5   fr4
63
        test_fpr_a5a5   fr5
64
        test_fpr_a5a5   fr6
65
        test_fpr_a5a5   fr7
66
        test_fpr_a5a5   fr8
67
        test_fpr_a5a5   fr9
68
        test_fpr_a5a5   fr10
69
        test_fpr_a5a5   fr11
70
        test_fpr_a5a5   fr12
71
        test_fpr_a5a5   fr13
72
        test_fpr_a5a5   fr14
73
        test_fpr_a5a5   fr15
74
 
75
double_pos:
76
        set_grs_a5a5
77
        set_fprs_a5a5
78
        double_prec
79
        mov     #3, r0
80
        lds     r0, fpul
81
        float   fpul, dr4
82
 
83
        # check the result.
84
        fldi1   fr0
85
        fldi1   fr1
86
        single_prec
87
        fadd    fr0, fr1
88
        fadd    fr0, fr1
89
        double_prec
90
        _s2d    fr1, dr2
91
        fcmp/eq dr2, dr4
92
        bt      double_neg
93
        fail
94
 
95
double_neg:
96
        double_prec
97
        mov     #3, r0
98
        neg     r0, r0
99
        lds     r0, fpul
100
        float   fpul, dr4
101
 
102
        # check the result.
103
        fldi1   fr0
104
        fldi1   fr1
105
        single_prec
106
        fadd    fr0, fr1
107
        fadd    fr0, fr1
108
        fneg    fr1
109
        double_prec
110
        _s2d    fr1, dr2
111
        fcmp/eq dr2, dr4
112
        bt      .L2
113
        fail
114
.L2:
115
        assertreg0      -3
116
        test_gr_a5a5    r1
117
        test_gr_a5a5    r2
118
        test_gr_a5a5    r3
119
        test_gr_a5a5    r4
120
        test_gr_a5a5    r5
121
        test_gr_a5a5    r6
122
        test_gr_a5a5    r7
123
        test_gr_a5a5    r8
124
        test_gr_a5a5    r9
125
        test_gr_a5a5    r10
126
        test_gr_a5a5    r11
127
        test_gr_a5a5    r12
128
        test_gr_a5a5    r13
129
        test_gr_a5a5    r14
130
 
131
        single_prec
132
        assert_fpreg_i   1, fr0
133
        assert_fpreg_i  -3, fr1
134
        double_prec
135
        assert_dpreg_i  -3, dr2
136
        assert_dpreg_i  -3, dr4
137
        test_fpr_a5a5   fr6
138
        test_fpr_a5a5   fr7
139
        test_fpr_a5a5   fr8
140
        test_fpr_a5a5   fr9
141
        test_fpr_a5a5   fr10
142
        test_fpr_a5a5   fr11
143
        test_fpr_a5a5   fr12
144
        test_fpr_a5a5   fr13
145
        test_fpr_a5a5   fr14
146
        test_fpr_a5a5   fr15
147
 
148
        pass
149
        exit 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.