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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fmac.s] - Blame information for rev 225

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Line No. Rev Author Line
1 24 jeremybenn
# sh testcase for fmac
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# mach: sh
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# as(sh):       -defsym sim_cpu=0
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        .include "testutils.inc"
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        start
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fmac_:
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        set_grs_a5a5
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        set_fprs_a5a5
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        # 0.0 * x + y = y.
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        fldi0   fr0
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        fldi1   fr1
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        fldi1   fr2
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        fmac    fr0, fr1, fr2
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        # check result.
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        fldi1   fr0
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        fcmp/eq fr0, fr2
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        bt      .L0
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        fail
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.L0:
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        # x * y + 0.0 = x * y.
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        fldi1   fr0
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        fldi1   fr1
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        fldi0   fr2
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        # double it.
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        fadd    fr1, fr2
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        fmac    fr0, fr1, fr2
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        # check result.
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        fldi1   fr0
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        fadd    fr0, fr0
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        fcmp/eq fr0, fr2
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        bt      .L1
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        fail
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.L1:
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        # x * 0.0 + y = y.
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        fldi1   fr0
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        fldi0   fr1
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        fldi1   fr2
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        fadd    fr2, fr2
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        fmac    fr0, fr1, fr2
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        # check result.
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        fldi1   fr0
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        # double fr0.
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        fadd    fr0, fr0
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        fcmp/eq fr0, fr2
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        bt      .L2
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        fail
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.L2:
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        # x * 0.0 + 0.0 = 0.0
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        fldi1   fr0
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        fadd    fr0, fr0
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        fldi0   fr1
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        fldi0   fr2
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        fmac    fr0, fr1, fr2
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        # check result.
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        fldi0   fr0
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        fcmp/eq fr0, fr2
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        bt      .L3
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        fail
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.L3:
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        # 0.0 * x + 0.0 = 0.0.
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        fldi0   fr0
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        fldi1   fr1
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        # double it.
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        fadd    fr1, fr1
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        fldi0   fr2
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        fmac    fr0, fr1, fr2
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        # check result.
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        fldi0   fr0
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        fcmp/eq fr0, fr2
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        bt      .L4
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        fail
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.L4:
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        test_grs_a5a5
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        assert_fpreg_i  0, fr0
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        assert_fpreg_i  2, fr1
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        assert_fpreg_i  0, fr2
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        test_fpr_a5a5   fr3
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        test_fpr_a5a5   fr4
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        test_fpr_a5a5   fr5
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        test_fpr_a5a5   fr6
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        test_fpr_a5a5   fr7
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        test_fpr_a5a5   fr8
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        test_fpr_a5a5   fr9
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        test_fpr_a5a5   fr10
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        test_fpr_a5a5   fr11
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        test_fpr_a5a5   fr12
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        test_fpr_a5a5   fr13
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        test_fpr_a5a5   fr14
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        test_fpr_a5a5   fr15
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        pass
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        exit 0

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