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# sh testcase for fsrra
# mach: sh
# as(sh):       -defsym sim_cpu=0
 
        .include "testutils.inc"
 
        start
fsrra_single:
        set_grs_a5a5
        set_fprs_a5a5
        # 1/sqrt(0.0) = +infinity.
        fldi0   fr0
        fsrra   fr0
        assert_fpreg_x  0x7f800000, fr0
 
        # 1/sqrt(1.0) = 1.0.
        fldi1   fr0
        fsrra   fr0
        assert_fpreg_i  1, fr0
 
        # 1/sqrt(4.0) = 1/2.0
        fldi1   fr0
        # Double it.
        fadd    fr0, fr0
        # Double it again.
        fadd    fr0, fr0
        fsrra   fr0
        fldi1   fr2
        # Double it.
        fadd    fr2, fr2
        fldi1   fr1
        # Divide
        fdiv    fr2, fr1
        fcmp/eq fr0, fr1
        bt      .L2
        fail
.L2:
        # Double-check (pun intended)
        fadd    fr0, fr0
        assert_fpreg_i  1, fr0
        fadd    fr1, fr1
        assert_fpreg_i  1, fr1
 
        # And make sure the rest of the regs are un-affected.
        assert_fpreg_i  2, fr2
        test_fpr_a5a5   fr3
        test_fpr_a5a5   fr4
        test_fpr_a5a5   fr5
        test_fpr_a5a5   fr6
        test_fpr_a5a5   fr7
        test_fpr_a5a5   fr8
        test_fpr_a5a5   fr9
        test_fpr_a5a5   fr10
        test_fpr_a5a5   fr11
        test_fpr_a5a5   fr12
        test_fpr_a5a5   fr13
        test_fpr_a5a5   fr14
        test_fpr_a5a5   fr15
        test_grs_a5a5
 
        pass
        exit 0

Line No.	Rev	Author	Line
1	24	jeremybenn	`# sh testcase for fsrra`
2			`# mach: sh`
3			`# as(sh): -defsym sim_cpu=0`
4
5			`.include "testutils.inc"`
6
7			`start`
8			`fsrra_single:`
9			`set_grs_a5a5`
10			`set_fprs_a5a5`
11			`# 1/sqrt(0.0) = +infinity.`
12			`fldi0 fr0`
13			`fsrra fr0`
14			`assert_fpreg_x 0x7f800000, fr0`
15
16			`# 1/sqrt(1.0) = 1.0.`
17			`fldi1 fr0`
18			`fsrra fr0`
19			`assert_fpreg_i 1, fr0`
20
21			`# 1/sqrt(4.0) = 1/2.0`
22			`fldi1 fr0`
23			`# Double it.`
24			`fadd fr0, fr0`
25			`# Double it again.`
26			`fadd fr0, fr0`
27			`fsrra fr0`
28			`fldi1 fr2`
29			`# Double it.`
30			`fadd fr2, fr2`
31			`fldi1 fr1`
32			`# Divide`
33			`fdiv fr2, fr1`
34			`fcmp/eq fr0, fr1`
35			`bt .L2`
36			`fail`
37			`.L2:`
38			`# Double-check (pun intended)`
39			`fadd fr0, fr0`
40			`assert_fpreg_i 1, fr0`
41			`fadd fr1, fr1`
42			`assert_fpreg_i 1, fr1`
43
44			`# And make sure the rest of the regs are un-affected.`
45			`assert_fpreg_i 2, fr2`
46			`test_fpr_a5a5 fr3`
47			`test_fpr_a5a5 fr4`
48			`test_fpr_a5a5 fr5`
49			`test_fpr_a5a5 fr6`
50			`test_fpr_a5a5 fr7`
51			`test_fpr_a5a5 fr8`
52			`test_fpr_a5a5 fr9`
53			`test_fpr_a5a5 fr10`
54			`test_fpr_a5a5 fr11`
55			`test_fpr_a5a5 fr12`
56			`test_fpr_a5a5 fr13`
57			`test_fpr_a5a5 fr14`
58			`test_fpr_a5a5 fr15`
59			`test_grs_a5a5`
60
61			`pass`
62			`exit 0`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fsrra.s] - Blame information for rev 450