OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [pmuls.s] - Blame information for rev 301

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# sh testcase for pmuls
2
# mach:  shdsp
3
# as(shdsp):    -defsym sim_cpu=1 -dsp
4
 
5
        .include "testutils.inc"
6
 
7
        start
8
        set_grs_a5a5
9
        lds     r0, a0
10
        pcopy   a0, a1
11
        lds     r0, x0
12
        lds     r0, x1
13
        lds     r0, y0
14
        lds     r0, y1
15
        pcopy   x0, m0
16
        pcopy   y1, m1
17
 
18
        # 2 x 2 = 8 (?)
19
        # (I don't understand why the result is x2,
20
        # but that's what it says in the manual...)
21
        mov     #2, r0
22
        shll16  r0
23
        lds     r0, y0
24
        lds     r0, y1
25
        pmuls   y0, y1, a0
26
 
27
        assert_sreg     8, a0
28
 
29
        set_greg 0xa5a5a5a5, r0
30
        test_grs_a5a5
31
        pass
32
        exit 0
33
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.