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# sh testcase for psha <reg>
# mach: all
# as(sh):       -defsym sim_cpu=0
# as(shdsp):    -defsym sim_cpu=1 -dsp
 
        .include "testutils.inc"
 
        start
 
psha_reg:                       ! shift arithmetic, register operand
        set_grs_a5a5
        lds     r0, a0
        pcopy   a0, a1
        lds     r0, x0
        lds     r0, x1
        lds     r0, y0
        lds     r0, y1
        pcopy   x0, m0
        pcopy   y1, m1
 
        set_sreg 0x1, x0
        set_sreg 0x0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x10000, y0
        psha    x0, y0, x0
        assert_sreg     0x2, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x20000, y0
        psha    x0, y0, x0
        assert_sreg     0x4, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x30000, y0
        psha    x0, y0, x0
        assert_sreg     0x8, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x40000, y0
        psha    x0, y0, x0
        assert_sreg     0x10, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x50000, y0
        psha    x0, y0, x0
        assert_sreg     0x20, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x60000, y0
        psha    x0, y0, x0
        assert_sreg     0x40, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x70000, y0
        psha    x0, y0, x0
        assert_sreg     0x80, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x80000, y0
        psha    x0, y0, x0
        assert_sreg     0x100, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x90000, y0
        psha    x0, y0, x0
        assert_sreg     0x200, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xa0000, y0
        psha    x0, y0, x0
        assert_sreg     0x400, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xb0000, y0
        psha    x0, y0, x0
        assert_sreg     0x800, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xc0000, y0
        psha    x0, y0, x0
        assert_sreg     0x1000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xd0000, y0
        psha    x0, y0, x0
        assert_sreg     0x2000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xe0000, y0
        psha    x0, y0, x0
        assert_sreg     0x4000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0xf0000, y0
        psha    x0, y0, x0
        assert_sreg     0x8000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x100000, y0
        psha    x0, y0, x0
        assert_sreg     0x10000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x110000, y0
        psha    x0, y0, x0
        assert_sreg     0x20000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x120000, y0
        psha    x0, y0, x0
        assert_sreg     0x40000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x130000, y0
        psha    x0, y0, x0
        assert_sreg     0x80000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x140000, y0
        psha    x0, y0, x0
        assert_sreg     0x100000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x150000, y0
        psha    x0, y0, x0
        assert_sreg     0x200000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x160000, y0
        psha    x0, y0, x0
        assert_sreg     0x400000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x170000, y0
        psha    x0, y0, x0
        assert_sreg     0x800000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x180000, y0
        psha    x0, y0, x0
        assert_sreg     0x1000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x190000, y0
        psha    x0, y0, x0
        assert_sreg     0x2000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1a0000, y0
        psha    x0, y0, x0
        assert_sreg     0x4000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1b0000, y0
        psha    x0, y0, x0
        assert_sreg     0x8000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1c0000, y0
        psha    x0, y0, x0
        assert_sreg     0x10000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1d0000, y0
        psha    x0, y0, x0
        assert_sreg     0x20000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1e0000, y0
        psha    x0, y0, x0
        assert_sreg     0x40000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0x1, x0
 
        set_sreg 0x1f0000, y0
        psha    x0, y0, x0
        assert_sreg     0x80000000, x0
        pneg    y0, y0
        psha    x0, y0, x0
        assert_sreg     0xffffffff, x0
 
        set_sreg 0x200000, y0
        psha    x0, y0, x0
        assert_sreg     0x00000000, x0
#       I don't grok what should happen here...
#       pneg    y0, y0
#       psha    x0, y0, x0
#       assert_sreg     0x0, x0
 
        test_grs_a5a5
        assert_sreg     0xa5a5a5a5, a0
        assert_sreg2    0xa5a5a5a5, a1
        assert_sreg     0xa5a5a5a5, x1
        assert_sreg     0xa5a5a5a5, y1
        assert_sreg2    0xa5a5a5a5, m0
        assert_sreg2    0xa5a5a5a5, m1
 
 
        pass
        exit 0
 

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Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [pshar.s] - Blame information for rev 301

Line No.	Rev	Author	Line
1	24	jeremybenn	`# sh testcase for psha <reg>`
2			`# mach: all`
3			`# as(sh): -defsym sim_cpu=0`
4			`# as(shdsp): -defsym sim_cpu=1 -dsp`
5
6			`.include "testutils.inc"`
7
8			`start`
9
10			`psha_reg: ! shift arithmetic, register operand`
11			`set_grs_a5a5`
12			`lds r0, a0`
13			`pcopy a0, a1`
14			`lds r0, x0`
15			`lds r0, x1`
16			`lds r0, y0`
17			`lds r0, y1`
18			`pcopy x0, m0`
19			`pcopy y1, m1`
20
21			`set_sreg 0x1, x0`
22			`set_sreg 0x0, y0`
23			`psha x0, y0, x0`
24			`assert_sreg 0x1, x0`
25			`pneg y0, y0`
26			`psha x0, y0, x0`
27			`assert_sreg 0x1, x0`
28
29			`set_sreg 0x10000, y0`
30			`psha x0, y0, x0`
31			`assert_sreg 0x2, x0`
32			`pneg y0, y0`
33			`psha x0, y0, x0`
34			`assert_sreg 0x1, x0`
35
36			`set_sreg 0x20000, y0`
37			`psha x0, y0, x0`
38			`assert_sreg 0x4, x0`
39			`pneg y0, y0`
40			`psha x0, y0, x0`
41			`assert_sreg 0x1, x0`
42
43			`set_sreg 0x30000, y0`
44			`psha x0, y0, x0`
45			`assert_sreg 0x8, x0`
46			`pneg y0, y0`
47			`psha x0, y0, x0`
48			`assert_sreg 0x1, x0`
49
50			`set_sreg 0x40000, y0`
51			`psha x0, y0, x0`
52			`assert_sreg 0x10, x0`
53			`pneg y0, y0`
54			`psha x0, y0, x0`
55			`assert_sreg 0x1, x0`
56
57			`set_sreg 0x50000, y0`
58			`psha x0, y0, x0`
59			`assert_sreg 0x20, x0`
60			`pneg y0, y0`
61			`psha x0, y0, x0`
62			`assert_sreg 0x1, x0`
63
64			`set_sreg 0x60000, y0`
65			`psha x0, y0, x0`
66			`assert_sreg 0x40, x0`
67			`pneg y0, y0`
68			`psha x0, y0, x0`
69			`assert_sreg 0x1, x0`
70
71			`set_sreg 0x70000, y0`
72			`psha x0, y0, x0`
73			`assert_sreg 0x80, x0`
74			`pneg y0, y0`
75			`psha x0, y0, x0`
76			`assert_sreg 0x1, x0`
77
78			`set_sreg 0x80000, y0`
79			`psha x0, y0, x0`
80			`assert_sreg 0x100, x0`
81			`pneg y0, y0`
82			`psha x0, y0, x0`
83			`assert_sreg 0x1, x0`
84
85			`set_sreg 0x90000, y0`
86			`psha x0, y0, x0`
87			`assert_sreg 0x200, x0`
88			`pneg y0, y0`
89			`psha x0, y0, x0`
90			`assert_sreg 0x1, x0`
91
92			`set_sreg 0xa0000, y0`
93			`psha x0, y0, x0`
94			`assert_sreg 0x400, x0`
95			`pneg y0, y0`
96			`psha x0, y0, x0`
97			`assert_sreg 0x1, x0`
98
99			`set_sreg 0xb0000, y0`
100			`psha x0, y0, x0`
101			`assert_sreg 0x800, x0`
102			`pneg y0, y0`
103			`psha x0, y0, x0`
104			`assert_sreg 0x1, x0`
105
106			`set_sreg 0xc0000, y0`
107			`psha x0, y0, x0`
108			`assert_sreg 0x1000, x0`
109			`pneg y0, y0`
110			`psha x0, y0, x0`
111			`assert_sreg 0x1, x0`
112
113			`set_sreg 0xd0000, y0`
114			`psha x0, y0, x0`
115			`assert_sreg 0x2000, x0`
116			`pneg y0, y0`
117			`psha x0, y0, x0`
118			`assert_sreg 0x1, x0`
119
120			`set_sreg 0xe0000, y0`
121			`psha x0, y0, x0`
122			`assert_sreg 0x4000, x0`
123			`pneg y0, y0`
124			`psha x0, y0, x0`
125			`assert_sreg 0x1, x0`
126
127			`set_sreg 0xf0000, y0`
128			`psha x0, y0, x0`
129			`assert_sreg 0x8000, x0`
130			`pneg y0, y0`
131			`psha x0, y0, x0`
132			`assert_sreg 0x1, x0`
133
134			`set_sreg 0x100000, y0`
135			`psha x0, y0, x0`
136			`assert_sreg 0x10000, x0`
137			`pneg y0, y0`
138			`psha x0, y0, x0`
139			`assert_sreg 0x1, x0`
140
141			`set_sreg 0x110000, y0`
142			`psha x0, y0, x0`
143			`assert_sreg 0x20000, x0`
144			`pneg y0, y0`
145			`psha x0, y0, x0`
146			`assert_sreg 0x1, x0`
147
148			`set_sreg 0x120000, y0`
149			`psha x0, y0, x0`
150			`assert_sreg 0x40000, x0`
151			`pneg y0, y0`
152			`psha x0, y0, x0`
153			`assert_sreg 0x1, x0`
154
155			`set_sreg 0x130000, y0`
156			`psha x0, y0, x0`
157			`assert_sreg 0x80000, x0`
158			`pneg y0, y0`
159			`psha x0, y0, x0`
160			`assert_sreg 0x1, x0`
161
162			`set_sreg 0x140000, y0`
163			`psha x0, y0, x0`
164			`assert_sreg 0x100000, x0`
165			`pneg y0, y0`
166			`psha x0, y0, x0`
167			`assert_sreg 0x1, x0`
168
169			`set_sreg 0x150000, y0`
170			`psha x0, y0, x0`
171			`assert_sreg 0x200000, x0`
172			`pneg y0, y0`
173			`psha x0, y0, x0`
174			`assert_sreg 0x1, x0`
175
176			`set_sreg 0x160000, y0`
177			`psha x0, y0, x0`
178			`assert_sreg 0x400000, x0`
179			`pneg y0, y0`
180			`psha x0, y0, x0`
181			`assert_sreg 0x1, x0`
182
183			`set_sreg 0x170000, y0`
184			`psha x0, y0, x0`
185			`assert_sreg 0x800000, x0`
186			`pneg y0, y0`
187			`psha x0, y0, x0`
188			`assert_sreg 0x1, x0`
189
190			`set_sreg 0x180000, y0`
191			`psha x0, y0, x0`
192			`assert_sreg 0x1000000, x0`
193			`pneg y0, y0`
194			`psha x0, y0, x0`
195			`assert_sreg 0x1, x0`
196
197			`set_sreg 0x190000, y0`
198			`psha x0, y0, x0`
199			`assert_sreg 0x2000000, x0`
200			`pneg y0, y0`
201			`psha x0, y0, x0`
202			`assert_sreg 0x1, x0`
203
204			`set_sreg 0x1a0000, y0`
205			`psha x0, y0, x0`
206			`assert_sreg 0x4000000, x0`
207			`pneg y0, y0`
208			`psha x0, y0, x0`
209			`assert_sreg 0x1, x0`
210
211			`set_sreg 0x1b0000, y0`
212			`psha x0, y0, x0`
213			`assert_sreg 0x8000000, x0`
214			`pneg y0, y0`
215			`psha x0, y0, x0`
216			`assert_sreg 0x1, x0`
217
218			`set_sreg 0x1c0000, y0`
219			`psha x0, y0, x0`
220			`assert_sreg 0x10000000, x0`
221			`pneg y0, y0`
222			`psha x0, y0, x0`
223			`assert_sreg 0x1, x0`
224
225			`set_sreg 0x1d0000, y0`
226			`psha x0, y0, x0`
227			`assert_sreg 0x20000000, x0`
228			`pneg y0, y0`
229			`psha x0, y0, x0`
230			`assert_sreg 0x1, x0`
231
232			`set_sreg 0x1e0000, y0`
233			`psha x0, y0, x0`
234			`assert_sreg 0x40000000, x0`
235			`pneg y0, y0`
236			`psha x0, y0, x0`
237			`assert_sreg 0x1, x0`
238
239			`set_sreg 0x1f0000, y0`
240			`psha x0, y0, x0`
241			`assert_sreg 0x80000000, x0`
242			`pneg y0, y0`
243			`psha x0, y0, x0`
244			`assert_sreg 0xffffffff, x0`
245
246			`set_sreg 0x200000, y0`
247			`psha x0, y0, x0`
248			`assert_sreg 0x00000000, x0`
249			`# I don't grok what should happen here...`
250			`# pneg y0, y0`
251			`# psha x0, y0, x0`
252			`# assert_sreg 0x0, x0`
253
254			`test_grs_a5a5`
255			`assert_sreg 0xa5a5a5a5, a0`
256			`assert_sreg2 0xa5a5a5a5, a1`
257			`assert_sreg 0xa5a5a5a5, x1`
258			`assert_sreg 0xa5a5a5a5, y1`
259			`assert_sreg2 0xa5a5a5a5, m0`
260			`assert_sreg2 0xa5a5a5a5, m1`
261
262
263			`pass`
264			`exit 0`
265