OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [swapb.cgs] - Blame information for rev 280

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn 
# sh testcase for swap.b $rm, $rn -*- Asm -*-
2 
# mach: all
3 
# as: -isa=shcompact
4 
# ld: -m shelf32
5 
 
6 
        .include "compact/testutils.inc"
7 
 
8 
        start
9 
 
10 
init:
11 
        # Build up a distinctive bit pattern.
12 
        mov #1, r0
13 
        shll8 r0
14 
        add #12, r0
15 
        shll8 r0
16 
        add #85, r0
17 
        shll8 r0
18 
        add #70, r0
19 
 
20 
test:
21 
        # Swap the lower two bytes into a different register.
22 
        swap.b r0, r1
23 
        mov #1, r7
24 
        shll8 r7
25 
        add #12, r7
26 
        shll8 r7
27 
        add #70, r7
28 
        shll8 r7
29 
        add #85, r7
30 
        cmp/eq r1, r7
31 
        bf wrong
32 
 
33 
swapback:
34 
        # Swap the lower two bytes into the same registers.
35 
        # R0 should now equal R1.
36 
        swap.b r1, r2
37 
        cmp/eq r0, r2
38 
        bf wrong
39 
 
40 
okay:
41 
        pass
42 
 
43 
wrong:
44 
        fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.