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1 227 jeremybenn
@section Architectures
2
BFD keeps one atom in a BFD describing the
3
architecture of the data attached to the BFD: a pointer to a
4
@code{bfd_arch_info_type}.
5
 
6
Pointers to structures can be requested independently of a BFD
7
so that an architecture's information can be interrogated
8
without access to an open BFD.
9
 
10
The architecture information is provided by each architecture package.
11
The set of default architectures is selected by the macro
12
@code{SELECT_ARCHITECTURES}.  This is normally set up in the
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@file{config/@var{target}.mt} file of your choice.  If the name is not
14
defined, then all the architectures supported are included.
15
 
16
When BFD starts up, all the architectures are called with an
17
initialize method.  It is up to the architecture back end to
18
insert as many items into the list of architectures as it wants to;
19
generally this would be one for each machine and one for the
20
default case (an item with a machine field of 0).
21
 
22
BFD's idea of an architecture is implemented in @file{archures.c}.
23
 
24
@subsection bfd_architecture
25
 
26
 
27
@strong{Description}@*
28
This enum gives the object file's CPU architecture, in a
29
global sense---i.e., what processor family does it belong to?
30
Another field indicates which processor within
31
the family is in use.  The machine gives a number which
32
distinguishes different versions of the architecture,
33
containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
34
and 68020 and 68030 for Motorola 68020 and 68030.
35
@example
36
enum bfd_architecture
37
@{
38
  bfd_arch_unknown,   /* File arch not known.  */
39
  bfd_arch_obscure,   /* Arch known, not one of these.  */
40
  bfd_arch_m68k,      /* Motorola 68xxx */
41
#define bfd_mach_m68000 1
42
#define bfd_mach_m68008 2
43
#define bfd_mach_m68010 3
44
#define bfd_mach_m68020 4
45
#define bfd_mach_m68030 5
46
#define bfd_mach_m68040 6
47
#define bfd_mach_m68060 7
48
#define bfd_mach_cpu32  8
49
#define bfd_mach_fido   9
50
#define bfd_mach_mcf_isa_a_nodiv 10
51
#define bfd_mach_mcf_isa_a 11
52
#define bfd_mach_mcf_isa_a_mac 12
53
#define bfd_mach_mcf_isa_a_emac 13
54
#define bfd_mach_mcf_isa_aplus 14
55
#define bfd_mach_mcf_isa_aplus_mac 15
56
#define bfd_mach_mcf_isa_aplus_emac 16
57
#define bfd_mach_mcf_isa_b_nousp 17
58
#define bfd_mach_mcf_isa_b_nousp_mac 18
59
#define bfd_mach_mcf_isa_b_nousp_emac 19
60
#define bfd_mach_mcf_isa_b 20
61
#define bfd_mach_mcf_isa_b_mac 21
62
#define bfd_mach_mcf_isa_b_emac 22
63
#define bfd_mach_mcf_isa_b_float 23
64
#define bfd_mach_mcf_isa_b_float_mac 24
65
#define bfd_mach_mcf_isa_b_float_emac 25
66
#define bfd_mach_mcf_isa_c 26
67
#define bfd_mach_mcf_isa_c_mac 27
68
#define bfd_mach_mcf_isa_c_emac 28
69
#define bfd_mach_mcf_isa_c_nodiv 29
70
#define bfd_mach_mcf_isa_c_nodiv_mac 30
71
#define bfd_mach_mcf_isa_c_nodiv_emac 31
72
  bfd_arch_vax,       /* DEC Vax */
73
  bfd_arch_i960,      /* Intel 960 */
74
    /* The order of the following is important.
75
       lower number indicates a machine type that
76
       only accepts a subset of the instructions
77
       available to machines with higher numbers.
78
       The exception is the "ca", which is
79
       incompatible with all other machines except
80
       "core".  */
81
 
82
#define bfd_mach_i960_core      1
83
#define bfd_mach_i960_ka_sa     2
84
#define bfd_mach_i960_kb_sb     3
85
#define bfd_mach_i960_mc        4
86
#define bfd_mach_i960_xa        5
87
#define bfd_mach_i960_ca        6
88
#define bfd_mach_i960_jx        7
89
#define bfd_mach_i960_hx        8
90
 
91
  bfd_arch_or32,      /* OpenRISC 32 */
92
 
93
  bfd_arch_sparc,     /* SPARC */
94
#define bfd_mach_sparc                 1
95
/* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
96
#define bfd_mach_sparc_sparclet        2
97
#define bfd_mach_sparc_sparclite       3
98
#define bfd_mach_sparc_v8plus          4
99
#define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
100
#define bfd_mach_sparc_sparclite_le    6
101
#define bfd_mach_sparc_v9              7
102
#define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
103
#define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
104
#define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
105
/* Nonzero if MACH has the v9 instruction set.  */
106
#define bfd_mach_sparc_v9_p(mach) \
107
  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
108
   && (mach) != bfd_mach_sparc_sparclite_le)
109
/* Nonzero if MACH is a 64 bit sparc architecture.  */
110
#define bfd_mach_sparc_64bit_p(mach) \
111
  ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
112
  bfd_arch_spu,       /* PowerPC SPU */
113
#define bfd_mach_spu           256
114
  bfd_arch_mips,      /* MIPS Rxxxx */
115
#define bfd_mach_mips3000              3000
116
#define bfd_mach_mips3900              3900
117
#define bfd_mach_mips4000              4000
118
#define bfd_mach_mips4010              4010
119
#define bfd_mach_mips4100              4100
120
#define bfd_mach_mips4111              4111
121
#define bfd_mach_mips4120              4120
122
#define bfd_mach_mips4300              4300
123
#define bfd_mach_mips4400              4400
124
#define bfd_mach_mips4600              4600
125
#define bfd_mach_mips4650              4650
126
#define bfd_mach_mips5000              5000
127
#define bfd_mach_mips5400              5400
128
#define bfd_mach_mips5500              5500
129
#define bfd_mach_mips6000              6000
130
#define bfd_mach_mips7000              7000
131
#define bfd_mach_mips8000              8000
132
#define bfd_mach_mips9000              9000
133
#define bfd_mach_mips10000             10000
134
#define bfd_mach_mips12000             12000
135
#define bfd_mach_mips14000             14000
136
#define bfd_mach_mips16000             16000
137
#define bfd_mach_mips16                16
138
#define bfd_mach_mips5                 5
139
#define bfd_mach_mips_loongson_2e      3001
140
#define bfd_mach_mips_loongson_2f      3002
141
#define bfd_mach_mips_sb1              12310201 /* octal 'SB', 01 */
142
#define bfd_mach_mips_octeon           6501
143
#define bfd_mach_mips_xlr              887682   /* decimal 'XLR'  */
144
#define bfd_mach_mipsisa32             32
145
#define bfd_mach_mipsisa32r2           33
146
#define bfd_mach_mipsisa64             64
147
#define bfd_mach_mipsisa64r2           65
148
  bfd_arch_i386,      /* Intel 386 */
149
#define bfd_mach_i386_i386 1
150
#define bfd_mach_i386_i8086 2
151
#define bfd_mach_i386_i386_intel_syntax 3
152
#define bfd_mach_x86_64 64
153
#define bfd_mach_x86_64_intel_syntax 65
154
  bfd_arch_l1om,   /* Intel L1OM */
155
#define bfd_mach_l1om 66
156
#define bfd_mach_l1om_intel_syntax 67
157
  bfd_arch_we32k,     /* AT&T WE32xxx */
158
  bfd_arch_tahoe,     /* CCI/Harris Tahoe */
159
  bfd_arch_i860,      /* Intel 860 */
160
  bfd_arch_i370,      /* IBM 360/370 Mainframes */
161
  bfd_arch_romp,      /* IBM ROMP PC/RT */
162
  bfd_arch_convex,    /* Convex */
163
  bfd_arch_m88k,      /* Motorola 88xxx */
164
  bfd_arch_m98k,      /* Motorola 98xxx */
165
  bfd_arch_pyramid,   /* Pyramid Technology */
166
  bfd_arch_h8300,     /* Renesas H8/300 (formerly Hitachi H8/300) */
167
#define bfd_mach_h8300    1
168
#define bfd_mach_h8300h   2
169
#define bfd_mach_h8300s   3
170
#define bfd_mach_h8300hn  4
171
#define bfd_mach_h8300sn  5
172
#define bfd_mach_h8300sx  6
173
#define bfd_mach_h8300sxn 7
174
  bfd_arch_pdp11,     /* DEC PDP-11 */
175
  bfd_arch_plugin,
176
  bfd_arch_powerpc,   /* PowerPC */
177
#define bfd_mach_ppc           32
178
#define bfd_mach_ppc64         64
179
#define bfd_mach_ppc_403       403
180
#define bfd_mach_ppc_403gc     4030
181
#define bfd_mach_ppc_405       405
182
#define bfd_mach_ppc_505       505
183
#define bfd_mach_ppc_601       601
184
#define bfd_mach_ppc_602       602
185
#define bfd_mach_ppc_603       603
186
#define bfd_mach_ppc_ec603e    6031
187
#define bfd_mach_ppc_604       604
188
#define bfd_mach_ppc_620       620
189
#define bfd_mach_ppc_630       630
190
#define bfd_mach_ppc_750       750
191
#define bfd_mach_ppc_860       860
192
#define bfd_mach_ppc_a35       35
193
#define bfd_mach_ppc_rs64ii    642
194
#define bfd_mach_ppc_rs64iii   643
195
#define bfd_mach_ppc_7400      7400
196
#define bfd_mach_ppc_e500      500
197
#define bfd_mach_ppc_e500mc    5001
198
#define bfd_mach_ppc_e500mc64  5005
199
#define bfd_mach_ppc_titan     83
200
  bfd_arch_rs6000,    /* IBM RS/6000 */
201
#define bfd_mach_rs6k          6000
202
#define bfd_mach_rs6k_rs1      6001
203
#define bfd_mach_rs6k_rsc      6003
204
#define bfd_mach_rs6k_rs2      6002
205
  bfd_arch_hppa,      /* HP PA RISC */
206
#define bfd_mach_hppa10        10
207
#define bfd_mach_hppa11        11
208
#define bfd_mach_hppa20        20
209
#define bfd_mach_hppa20w       25
210
  bfd_arch_d10v,      /* Mitsubishi D10V */
211
#define bfd_mach_d10v          1
212
#define bfd_mach_d10v_ts2      2
213
#define bfd_mach_d10v_ts3      3
214
  bfd_arch_d30v,      /* Mitsubishi D30V */
215
  bfd_arch_dlx,       /* DLX */
216
  bfd_arch_m68hc11,   /* Motorola 68HC11 */
217
  bfd_arch_m68hc12,   /* Motorola 68HC12 */
218
#define bfd_mach_m6812_default 0
219
#define bfd_mach_m6812         1
220
#define bfd_mach_m6812s        2
221
  bfd_arch_z8k,       /* Zilog Z8000 */
222
#define bfd_mach_z8001         1
223
#define bfd_mach_z8002         2
224
  bfd_arch_h8500,     /* Renesas H8/500 (formerly Hitachi H8/500) */
225
  bfd_arch_sh,        /* Renesas / SuperH SH (formerly Hitachi SH) */
226
#define bfd_mach_sh            1
227
#define bfd_mach_sh2        0x20
228
#define bfd_mach_sh_dsp     0x2d
229
#define bfd_mach_sh2a       0x2a
230
#define bfd_mach_sh2a_nofpu 0x2b
231
#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
232
#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
233
#define bfd_mach_sh2a_or_sh4  0x2a3
234
#define bfd_mach_sh2a_or_sh3e 0x2a4
235
#define bfd_mach_sh2e       0x2e
236
#define bfd_mach_sh3        0x30
237
#define bfd_mach_sh3_nommu  0x31
238
#define bfd_mach_sh3_dsp    0x3d
239
#define bfd_mach_sh3e       0x3e
240
#define bfd_mach_sh4        0x40
241
#define bfd_mach_sh4_nofpu  0x41
242
#define bfd_mach_sh4_nommu_nofpu  0x42
243
#define bfd_mach_sh4a       0x4a
244
#define bfd_mach_sh4a_nofpu 0x4b
245
#define bfd_mach_sh4al_dsp  0x4d
246
#define bfd_mach_sh5        0x50
247
  bfd_arch_alpha,     /* Dec Alpha */
248
#define bfd_mach_alpha_ev4  0x10
249
#define bfd_mach_alpha_ev5  0x20
250
#define bfd_mach_alpha_ev6  0x30
251
  bfd_arch_arm,       /* Advanced Risc Machines ARM.  */
252
#define bfd_mach_arm_unknown   0
253
#define bfd_mach_arm_2         1
254
#define bfd_mach_arm_2a        2
255
#define bfd_mach_arm_3         3
256
#define bfd_mach_arm_3M        4
257
#define bfd_mach_arm_4         5
258
#define bfd_mach_arm_4T        6
259
#define bfd_mach_arm_5         7
260
#define bfd_mach_arm_5T        8
261
#define bfd_mach_arm_5TE       9
262
#define bfd_mach_arm_XScale    10
263
#define bfd_mach_arm_ep9312    11
264
#define bfd_mach_arm_iWMMXt    12
265
#define bfd_mach_arm_iWMMXt2   13
266
  bfd_arch_ns32k,     /* National Semiconductors ns32000 */
267
  bfd_arch_w65,       /* WDC 65816 */
268
  bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
269
  bfd_arch_tic4x,     /* Texas Instruments TMS320C3X/4X */
270
#define bfd_mach_tic3x         30
271
#define bfd_mach_tic4x         40
272
  bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */
273
  bfd_arch_tic80,     /* TI TMS320c80 (MVP) */
274
  bfd_arch_v850,      /* NEC V850 */
275
#define bfd_mach_v850          1
276
#define bfd_mach_v850e         'E'
277
#define bfd_mach_v850e1        '1'
278
  bfd_arch_arc,       /* ARC Cores */
279
#define bfd_mach_arc_5         5
280
#define bfd_mach_arc_6         6
281
#define bfd_mach_arc_7         7
282
#define bfd_mach_arc_8         8
283
 bfd_arch_m32c,     /* Renesas M16C/M32C.  */
284
#define bfd_mach_m16c        0x75
285
#define bfd_mach_m32c        0x78
286
  bfd_arch_m32r,      /* Renesas M32R (formerly Mitsubishi M32R/D) */
287
#define bfd_mach_m32r          1 /* For backwards compatibility.  */
288
#define bfd_mach_m32rx         'x'
289
#define bfd_mach_m32r2         '2'
290
  bfd_arch_mn10200,   /* Matsushita MN10200 */
291
  bfd_arch_mn10300,   /* Matsushita MN10300 */
292
#define bfd_mach_mn10300               300
293
#define bfd_mach_am33          330
294
#define bfd_mach_am33_2        332
295
  bfd_arch_fr30,
296
#define bfd_mach_fr30          0x46523330
297
  bfd_arch_frv,
298
#define bfd_mach_frv           1
299
#define bfd_mach_frvsimple     2
300
#define bfd_mach_fr300         300
301
#define bfd_mach_fr400         400
302
#define bfd_mach_fr450         450
303
#define bfd_mach_frvtomcat     499     /* fr500 prototype */
304
#define bfd_mach_fr500         500
305
#define bfd_mach_fr550         550
306
  bfd_arch_moxie,       /* The moxie processor */
307
#define bfd_mach_moxie         1
308
  bfd_arch_mcore,
309
  bfd_arch_mep,
310
#define bfd_mach_mep           1
311
#define bfd_mach_mep_h1        0x6831
312
#define bfd_mach_mep_c5        0x6335
313
  bfd_arch_ia64,      /* HP/Intel ia64 */
314
#define bfd_mach_ia64_elf64    64
315
#define bfd_mach_ia64_elf32    32
316
  bfd_arch_ip2k,      /* Ubicom IP2K microcontrollers. */
317
#define bfd_mach_ip2022        1
318
#define bfd_mach_ip2022ext     2
319
 bfd_arch_iq2000,     /* Vitesse IQ2000.  */
320
#define bfd_mach_iq2000        1
321
#define bfd_mach_iq10          2
322
  bfd_arch_mt,
323
#define bfd_mach_ms1           1
324
#define bfd_mach_mrisc2        2
325
#define bfd_mach_ms2           3
326
  bfd_arch_pj,
327
  bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
328
#define bfd_mach_avr1          1
329
#define bfd_mach_avr2          2
330
#define bfd_mach_avr25         25
331
#define bfd_mach_avr3          3
332
#define bfd_mach_avr31         31
333
#define bfd_mach_avr35         35
334
#define bfd_mach_avr4          4
335
#define bfd_mach_avr5          5
336
#define bfd_mach_avr51         51
337
#define bfd_mach_avr6          6
338
  bfd_arch_bfin,        /* ADI Blackfin */
339
#define bfd_mach_bfin          1
340
  bfd_arch_cr16,       /* National Semiconductor CompactRISC (ie CR16). */
341
#define bfd_mach_cr16          1
342
  bfd_arch_cr16c,       /* National Semiconductor CompactRISC. */
343
#define bfd_mach_cr16c         1
344
  bfd_arch_crx,       /*  National Semiconductor CRX.  */
345
#define bfd_mach_crx           1
346
  bfd_arch_cris,      /* Axis CRIS */
347
#define bfd_mach_cris_v0_v10   255
348
#define bfd_mach_cris_v32      32
349
#define bfd_mach_cris_v10_v32  1032
350
  bfd_arch_rx,        /* Renesas RX.  */
351
#define bfd_mach_rx            0x75
352
  bfd_arch_s390,      /* IBM s390 */
353
#define bfd_mach_s390_31       31
354
#define bfd_mach_s390_64       64
355
  bfd_arch_score,     /* Sunplus score */
356
#define bfd_mach_score3         3
357
#define bfd_mach_score7         7
358
  bfd_arch_openrisc,  /* OpenRISC */
359
  bfd_arch_mmix,      /* Donald Knuth's educational processor.  */
360
  bfd_arch_xstormy16,
361
#define bfd_mach_xstormy16     1
362
  bfd_arch_msp430,    /* Texas Instruments MSP430 architecture.  */
363
#define bfd_mach_msp11          11
364
#define bfd_mach_msp110         110
365
#define bfd_mach_msp12          12
366
#define bfd_mach_msp13          13
367
#define bfd_mach_msp14          14
368
#define bfd_mach_msp15          15
369
#define bfd_mach_msp16          16
370
#define bfd_mach_msp21          21
371
#define bfd_mach_msp31          31
372
#define bfd_mach_msp32          32
373
#define bfd_mach_msp33          33
374
#define bfd_mach_msp41          41
375
#define bfd_mach_msp42          42
376
#define bfd_mach_msp43          43
377
#define bfd_mach_msp44          44
378
  bfd_arch_xc16x,     /* Infineon's XC16X Series.               */
379
#define bfd_mach_xc16x         1
380
#define bfd_mach_xc16xl        2
381
#define bfd_mach_xc16xs         3
382
  bfd_arch_xtensa,    /* Tensilica's Xtensa cores.  */
383
#define bfd_mach_xtensa        1
384
   bfd_arch_maxq,     /* Dallas MAXQ 10/20 */
385
#define bfd_mach_maxq10    10
386
#define bfd_mach_maxq20    20
387
  bfd_arch_z80,
388
#define bfd_mach_z80strict      1 /* No undocumented opcodes.  */
389
#define bfd_mach_z80            3 /* With ixl, ixh, iyl, and iyh.  */
390
#define bfd_mach_z80full        7 /* All undocumented instructions.  */
391
#define bfd_mach_r800           11 /* R800: successor with multiplication.  */
392
  bfd_arch_lm32,      /* Lattice Mico32 */
393
#define bfd_mach_lm32      1
394
  bfd_arch_microblaze,/* Xilinx MicroBlaze. */
395
  bfd_arch_last
396
  @};
397
@end example
398
 
399
@subsection bfd_arch_info
400
 
401
 
402
@strong{Description}@*
403
This structure contains information on architectures for use
404
within BFD.
405
@example
406
 
407
typedef struct bfd_arch_info
408
@{
409
  int bits_per_word;
410
  int bits_per_address;
411
  int bits_per_byte;
412
  enum bfd_architecture arch;
413
  unsigned long mach;
414
  const char *arch_name;
415
  const char *printable_name;
416
  unsigned int section_align_power;
417
  /* TRUE if this is the default machine for the architecture.
418
     The default arch should be the first entry for an arch so that
419
     all the entries for that arch can be accessed via @code{next}.  */
420
  bfd_boolean the_default;
421
  const struct bfd_arch_info * (*compatible)
422
    (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
423
 
424
  bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
425
 
426
  const struct bfd_arch_info *next;
427
@}
428
bfd_arch_info_type;
429
 
430
@end example
431
 
432
@findex bfd_printable_name
433
@subsubsection @code{bfd_printable_name}
434
@strong{Synopsis}
435
@example
436
const char *bfd_printable_name (bfd *abfd);
437
@end example
438
@strong{Description}@*
439
Return a printable string representing the architecture and machine
440
from the pointer to the architecture info structure.
441
 
442
@findex bfd_scan_arch
443
@subsubsection @code{bfd_scan_arch}
444
@strong{Synopsis}
445
@example
446
const bfd_arch_info_type *bfd_scan_arch (const char *string);
447
@end example
448
@strong{Description}@*
449
Figure out if BFD supports any cpu which could be described with
450
the name @var{string}.  Return a pointer to an @code{arch_info}
451
structure if a machine is found, otherwise NULL.
452
 
453
@findex bfd_arch_list
454
@subsubsection @code{bfd_arch_list}
455
@strong{Synopsis}
456
@example
457
const char **bfd_arch_list (void);
458
@end example
459
@strong{Description}@*
460
Return a freshly malloced NULL-terminated vector of the names
461
of all the valid BFD architectures.  Do not modify the names.
462
 
463
@findex bfd_arch_get_compatible
464
@subsubsection @code{bfd_arch_get_compatible}
465
@strong{Synopsis}
466
@example
467
const bfd_arch_info_type *bfd_arch_get_compatible
468
   (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
469
@end example
470
@strong{Description}@*
471
Determine whether two BFDs' architectures and machine types
472
are compatible.  Calculates the lowest common denominator
473
between the two architectures and machine types implied by
474
the BFDs and returns a pointer to an @code{arch_info} structure
475
describing the compatible machine.
476
 
477
@findex bfd_default_arch_struct
478
@subsubsection @code{bfd_default_arch_struct}
479
@strong{Description}@*
480
The @code{bfd_default_arch_struct} is an item of
481
@code{bfd_arch_info_type} which has been initialized to a fairly
482
generic state.  A BFD starts life by pointing to this
483
structure, until the correct back end has determined the real
484
architecture of the file.
485
@example
486
extern const bfd_arch_info_type bfd_default_arch_struct;
487
@end example
488
 
489
@findex bfd_set_arch_info
490
@subsubsection @code{bfd_set_arch_info}
491
@strong{Synopsis}
492
@example
493
void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
494
@end example
495
@strong{Description}@*
496
Set the architecture info of @var{abfd} to @var{arg}.
497
 
498
@findex bfd_default_set_arch_mach
499
@subsubsection @code{bfd_default_set_arch_mach}
500
@strong{Synopsis}
501
@example
502
bfd_boolean bfd_default_set_arch_mach
503
   (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
504
@end example
505
@strong{Description}@*
506
Set the architecture and machine type in BFD @var{abfd}
507
to @var{arch} and @var{mach}.  Find the correct
508
pointer to a structure and insert it into the @code{arch_info}
509
pointer.
510
 
511
@findex bfd_get_arch
512
@subsubsection @code{bfd_get_arch}
513
@strong{Synopsis}
514
@example
515
enum bfd_architecture bfd_get_arch (bfd *abfd);
516
@end example
517
@strong{Description}@*
518
Return the enumerated type which describes the BFD @var{abfd}'s
519
architecture.
520
 
521
@findex bfd_get_mach
522
@subsubsection @code{bfd_get_mach}
523
@strong{Synopsis}
524
@example
525
unsigned long bfd_get_mach (bfd *abfd);
526
@end example
527
@strong{Description}@*
528
Return the long type which describes the BFD @var{abfd}'s
529
machine.
530
 
531
@findex bfd_arch_bits_per_byte
532
@subsubsection @code{bfd_arch_bits_per_byte}
533
@strong{Synopsis}
534
@example
535
unsigned int bfd_arch_bits_per_byte (bfd *abfd);
536
@end example
537
@strong{Description}@*
538
Return the number of bits in one of the BFD @var{abfd}'s
539
architecture's bytes.
540
 
541
@findex bfd_arch_bits_per_address
542
@subsubsection @code{bfd_arch_bits_per_address}
543
@strong{Synopsis}
544
@example
545
unsigned int bfd_arch_bits_per_address (bfd *abfd);
546
@end example
547
@strong{Description}@*
548
Return the number of bits in one of the BFD @var{abfd}'s
549
architecture's addresses.
550
 
551
@findex bfd_default_compatible
552
@subsubsection @code{bfd_default_compatible}
553
@strong{Synopsis}
554
@example
555
const bfd_arch_info_type *bfd_default_compatible
556
   (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
557
@end example
558
@strong{Description}@*
559
The default function for testing for compatibility.
560
 
561
@findex bfd_default_scan
562
@subsubsection @code{bfd_default_scan}
563
@strong{Synopsis}
564
@example
565
bfd_boolean bfd_default_scan
566
   (const struct bfd_arch_info *info, const char *string);
567
@end example
568
@strong{Description}@*
569
The default function for working out whether this is an
570
architecture hit and a machine hit.
571
 
572
@findex bfd_get_arch_info
573
@subsubsection @code{bfd_get_arch_info}
574
@strong{Synopsis}
575
@example
576
const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
577
@end example
578
@strong{Description}@*
579
Return the architecture info struct in @var{abfd}.
580
 
581
@findex bfd_lookup_arch
582
@subsubsection @code{bfd_lookup_arch}
583
@strong{Synopsis}
584
@example
585
const bfd_arch_info_type *bfd_lookup_arch
586
   (enum bfd_architecture arch, unsigned long machine);
587
@end example
588
@strong{Description}@*
589
Look for the architecture info structure which matches the
590
arguments @var{arch} and @var{machine}. A machine of 0 matches the
591
machine/architecture structure which marks itself as the
592
default.
593
 
594
@findex bfd_printable_arch_mach
595
@subsubsection @code{bfd_printable_arch_mach}
596
@strong{Synopsis}
597
@example
598
const char *bfd_printable_arch_mach
599
   (enum bfd_architecture arch, unsigned long machine);
600
@end example
601
@strong{Description}@*
602
Return a printable string representing the architecture and
603
machine type.
604
 
605
This routine is depreciated.
606
 
607
@findex bfd_octets_per_byte
608
@subsubsection @code{bfd_octets_per_byte}
609
@strong{Synopsis}
610
@example
611
unsigned int bfd_octets_per_byte (bfd *abfd);
612
@end example
613
@strong{Description}@*
614
Return the number of octets (8-bit quantities) per target byte
615
(minimum addressable unit).  In most cases, this will be one, but some
616
DSP targets have 16, 32, or even 48 bits per byte.
617
 
618
@findex bfd_arch_mach_octets_per_byte
619
@subsubsection @code{bfd_arch_mach_octets_per_byte}
620
@strong{Synopsis}
621
@example
622
unsigned int bfd_arch_mach_octets_per_byte
623
   (enum bfd_architecture arch, unsigned long machine);
624
@end example
625
@strong{Description}@*
626
See bfd_octets_per_byte.
627
 
628
This routine is provided for those cases where a bfd * is not
629
available
630
 

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