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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [avr-tdep.c] - Blame information for rev 227

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1 227 jeremybenn
/* Target-dependent code for Atmel AVR, for GDB.
2
 
3
   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4
   2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
/* Contributed by Theodore A. Roth, troth@openavr.org */
22
 
23
/* Portions of this file were taken from the original gdb-4.18 patch developed
24
   by Denis Chertykov, denisc@overta.ru */
25
 
26
#include "defs.h"
27
#include "frame.h"
28
#include "frame-unwind.h"
29
#include "frame-base.h"
30
#include "trad-frame.h"
31
#include "gdbcmd.h"
32
#include "gdbcore.h"
33
#include "gdbtypes.h"
34
#include "inferior.h"
35
#include "symfile.h"
36
#include "arch-utils.h"
37
#include "regcache.h"
38
#include "gdb_string.h"
39
#include "dis-asm.h"
40
 
41
/* AVR Background:
42
 
43
   (AVR micros are pure Harvard Architecture processors.)
44
 
45
   The AVR family of microcontrollers have three distinctly different memory
46
   spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
47
   the most part to store program instructions. The sram is 8 bits wide and is
48
   used for the stack and the heap. Some devices lack sram and some can have
49
   an additional external sram added on as a peripheral.
50
 
51
   The eeprom is 8 bits wide and is used to store data when the device is
52
   powered down. Eeprom is not directly accessible, it can only be accessed
53
   via io-registers using a special algorithm. Accessing eeprom via gdb's
54
   remote serial protocol ('m' or 'M' packets) looks difficult to do and is
55
   not included at this time.
56
 
57
   [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or
58
   written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''.  For this to
59
   work, the remote target must be able to handle eeprom accesses and perform
60
   the address translation.]
61
 
62
   All three memory spaces have physical addresses beginning at 0x0. In
63
   addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
64
   bytes instead of the 16 bit wide words used by the real device for the
65
   Program Counter.
66
 
67
   In order for remote targets to work correctly, extra bits must be added to
68
   addresses before they are send to the target or received from the target
69
   via the remote serial protocol. The extra bits are the MSBs and are used to
70
   decode which memory space the address is referring to. */
71
 
72
#undef XMALLOC
73
#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
74
 
75
/* Constants: prefixed with AVR_ to avoid name space clashes */
76
 
77
enum
78
{
79
  AVR_REG_W = 24,
80
  AVR_REG_X = 26,
81
  AVR_REG_Y = 28,
82
  AVR_FP_REGNUM = 28,
83
  AVR_REG_Z = 30,
84
 
85
  AVR_SREG_REGNUM = 32,
86
  AVR_SP_REGNUM = 33,
87
  AVR_PC_REGNUM = 34,
88
 
89
  AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/,
90
  AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/,
91
 
92
  /* Pseudo registers.  */
93
  AVR_PSEUDO_PC_REGNUM = 35,
94
  AVR_NUM_PSEUDO_REGS = 1,
95
 
96
  AVR_PC_REG_INDEX = 35,        /* index into array of registers */
97
 
98
  AVR_MAX_PROLOGUE_SIZE = 64,   /* bytes */
99
 
100
  /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
101
  AVR_MAX_PUSHES = 18,
102
 
103
  /* Number of the last pushed register. r17 for current avr-gcc */
104
  AVR_LAST_PUSHED_REGNUM = 17,
105
 
106
  AVR_ARG1_REGNUM = 24,         /* Single byte argument */
107
  AVR_ARGN_REGNUM = 25,         /* Multi byte argments */
108
 
109
  AVR_RET1_REGNUM = 24,         /* Single byte return value */
110
  AVR_RETN_REGNUM = 25,         /* Multi byte return value */
111
 
112
  /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
113
     bits? Do these have to match the bfd vma values?. It sure would make
114
     things easier in the future if they didn't need to match.
115
 
116
     Note: I chose these values so as to be consistent with bfd vma
117
     addresses.
118
 
119
     TRoth/2002-04-08: There is already a conflict with very large programs
120
     in the mega128. The mega128 has 128K instruction bytes (64K words),
121
     thus the Most Significant Bit is 0x10000 which gets masked off my
122
     AVR_MEM_MASK.
123
 
124
     The problem manifests itself when trying to set a breakpoint in a
125
     function which resides in the upper half of the instruction space and
126
     thus requires a 17-bit address.
127
 
128
     For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
129
     from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
130
     but could be for some remote targets by just adding the correct offset
131
     to the address and letting the remote target handle the low-level
132
     details of actually accessing the eeprom. */
133
 
134
  AVR_IMEM_START = 0x00000000,  /* INSN memory */
135
  AVR_SMEM_START = 0x00800000,  /* SRAM memory */
136
#if 1
137
  /* No eeprom mask defined */
138
  AVR_MEM_MASK = 0x00f00000,    /* mask to determine memory space */
139
#else
140
  AVR_EMEM_START = 0x00810000,  /* EEPROM memory */
141
  AVR_MEM_MASK = 0x00ff0000,    /* mask to determine memory space */
142
#endif
143
};
144
 
145
/* Prologue types:
146
 
147
   NORMAL and CALL are the typical types (the -mcall-prologues gcc option
148
   causes the generation of the CALL type prologues).  */
149
 
150
enum {
151
    AVR_PROLOGUE_NONE,              /* No prologue */
152
    AVR_PROLOGUE_NORMAL,
153
    AVR_PROLOGUE_CALL,              /* -mcall-prologues */
154
    AVR_PROLOGUE_MAIN,
155
    AVR_PROLOGUE_INTR,              /* interrupt handler */
156
    AVR_PROLOGUE_SIG,               /* signal handler */
157
};
158
 
159
/* Any function with a frame looks like this
160
   .......    <-SP POINTS HERE
161
   LOCALS1    <-FP POINTS HERE
162
   LOCALS0
163
   SAVED FP
164
   SAVED R3
165
   SAVED R2
166
   RET PC
167
   FIRST ARG
168
   SECOND ARG */
169
 
170
struct avr_unwind_cache
171
{
172
  /* The previous frame's inner most stack address.  Used as this
173
     frame ID's stack_addr.  */
174
  CORE_ADDR prev_sp;
175
  /* The frame's base, optionally used by the high-level debug info.  */
176
  CORE_ADDR base;
177
  int size;
178
  int prologue_type;
179
  /* Table indicating the location of each and every register.  */
180
  struct trad_frame_saved_reg *saved_regs;
181
};
182
 
183
struct gdbarch_tdep
184
{
185
  /* Number of bytes stored to the stack by call instructions.
186
     2 bytes for avr1-5, 3 bytes for avr6.  */
187
  int call_length;
188
 
189
  /* Type for void.  */
190
  struct type *void_type;
191
  /* Type for a function returning void.  */
192
  struct type *func_void_type;
193
  /* Type for a pointer to a function.  Used for the type of PC.  */
194
  struct type *pc_type;
195
};
196
 
197
/* Lookup the name of a register given it's number. */
198
 
199
static const char *
200
avr_register_name (struct gdbarch *gdbarch, int regnum)
201
{
202
  static const char * const register_names[] = {
203
    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
204
    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
205
    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
206
    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
207
    "SREG", "SP", "PC2",
208
    "pc"
209
  };
210
  if (regnum < 0)
211
    return NULL;
212
  if (regnum >= (sizeof (register_names) / sizeof (*register_names)))
213
    return NULL;
214
  return register_names[regnum];
215
}
216
 
217
/* Return the GDB type object for the "standard" data type
218
   of data in register N.  */
219
 
220
static struct type *
221
avr_register_type (struct gdbarch *gdbarch, int reg_nr)
222
{
223
  if (reg_nr == AVR_PC_REGNUM)
224
    return builtin_type (gdbarch)->builtin_uint32;
225
  if (reg_nr == AVR_PSEUDO_PC_REGNUM)
226
    return gdbarch_tdep (gdbarch)->pc_type;
227
  if (reg_nr == AVR_SP_REGNUM)
228
    return builtin_type (gdbarch)->builtin_data_ptr;
229
  return builtin_type (gdbarch)->builtin_uint8;
230
}
231
 
232
/* Instruction address checks and convertions. */
233
 
234
static CORE_ADDR
235
avr_make_iaddr (CORE_ADDR x)
236
{
237
  return ((x) | AVR_IMEM_START);
238
}
239
 
240
/* FIXME: TRoth: Really need to use a larger mask for instructions. Some
241
   devices are already up to 128KBytes of flash space.
242
 
243
   TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
244
 
245
static CORE_ADDR
246
avr_convert_iaddr_to_raw (CORE_ADDR x)
247
{
248
  return ((x) & 0xffffffff);
249
}
250
 
251
/* SRAM address checks and convertions. */
252
 
253
static CORE_ADDR
254
avr_make_saddr (CORE_ADDR x)
255
{
256
  /* Return 0 for NULL.  */
257
  if (x == 0)
258
    return 0;
259
 
260
  return ((x) | AVR_SMEM_START);
261
}
262
 
263
static CORE_ADDR
264
avr_convert_saddr_to_raw (CORE_ADDR x)
265
{
266
  return ((x) & 0xffffffff);
267
}
268
 
269
/* EEPROM address checks and convertions. I don't know if these will ever
270
   actually be used, but I've added them just the same. TRoth */
271
 
272
/* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
273
   programs in the mega128. */
274
 
275
/*  static CORE_ADDR */
276
/*  avr_make_eaddr (CORE_ADDR x) */
277
/*  { */
278
/*    return ((x) | AVR_EMEM_START); */
279
/*  } */
280
 
281
/*  static int */
282
/*  avr_eaddr_p (CORE_ADDR x) */
283
/*  { */
284
/*    return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */
285
/*  } */
286
 
287
/*  static CORE_ADDR */
288
/*  avr_convert_eaddr_to_raw (CORE_ADDR x) */
289
/*  { */
290
/*    return ((x) & 0xffffffff); */
291
/*  } */
292
 
293
/* Convert from address to pointer and vice-versa. */
294
 
295
static void
296
avr_address_to_pointer (struct gdbarch *gdbarch,
297
                        struct type *type, gdb_byte *buf, CORE_ADDR addr)
298
{
299
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
300
 
301
  /* Is it a code address?  */
302
  if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
303
      || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
304
    {
305
      store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
306
                              avr_convert_iaddr_to_raw (addr >> 1));
307
    }
308
  else
309
    {
310
      /* Strip off any upper segment bits.  */
311
      store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
312
                              avr_convert_saddr_to_raw (addr));
313
    }
314
}
315
 
316
static CORE_ADDR
317
avr_pointer_to_address (struct gdbarch *gdbarch,
318
                        struct type *type, const gdb_byte *buf)
319
{
320
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
321
  CORE_ADDR addr
322
    = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
323
 
324
  /* Is it a code address?  */
325
  if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
326
      || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
327
      || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
328
    return avr_make_iaddr (addr << 1);
329
  else
330
    return avr_make_saddr (addr);
331
}
332
 
333
static CORE_ADDR
334
avr_integer_to_address (struct gdbarch *gdbarch,
335
                        struct type *type, const gdb_byte *buf)
336
{
337
  ULONGEST addr = unpack_long (type, buf);
338
 
339
  return avr_make_saddr (addr);
340
}
341
 
342
static CORE_ADDR
343
avr_read_pc (struct regcache *regcache)
344
{
345
  ULONGEST pc;
346
  regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc);
347
  return avr_make_iaddr (pc);
348
}
349
 
350
static void
351
avr_write_pc (struct regcache *regcache, CORE_ADDR val)
352
{
353
  regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
354
                                  avr_convert_iaddr_to_raw (val));
355
}
356
 
357
static void
358
avr_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
359
                          int regnum, gdb_byte *buf)
360
{
361
  ULONGEST val;
362
 
363
  switch (regnum)
364
    {
365
    case AVR_PSEUDO_PC_REGNUM:
366
      regcache_raw_read_unsigned (regcache, AVR_PC_REGNUM, &val);
367
      val >>= 1;
368
      store_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch), val);
369
      break;
370
    default:
371
      internal_error (__FILE__, __LINE__, _("invalid regnum"));
372
    }
373
}
374
 
375
static void
376
avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
377
                           int regnum, const gdb_byte *buf)
378
{
379
  ULONGEST val;
380
 
381
  switch (regnum)
382
    {
383
    case AVR_PSEUDO_PC_REGNUM:
384
      val = extract_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch));
385
      val <<= 1;
386
      regcache_raw_write_unsigned (regcache, AVR_PC_REGNUM, val);
387
      break;
388
    default:
389
      internal_error (__FILE__, __LINE__, _("invalid regnum"));
390
    }
391
}
392
 
393
/* Function: avr_scan_prologue
394
 
395
   This function decodes an AVR function prologue to determine:
396
     1) the size of the stack frame
397
     2) which registers are saved on it
398
     3) the offsets of saved regs
399
   This information is stored in the avr_unwind_cache structure.
400
 
401
   Some devices lack the sbiw instruction, so on those replace this:
402
        sbiw    r28, XX
403
   with this:
404
        subi    r28,lo8(XX)
405
        sbci    r29,hi8(XX)
406
 
407
   A typical AVR function prologue with a frame pointer might look like this:
408
        push    rXX        ; saved regs
409
        ...
410
        push    r28
411
        push    r29
412
        in      r28,__SP_L__
413
        in      r29,__SP_H__
414
        sbiw    r28,<LOCALS_SIZE>
415
        in      __tmp_reg__,__SREG__
416
        cli
417
        out     __SP_H__,r29
418
        out     __SREG__,__tmp_reg__
419
        out     __SP_L__,r28
420
 
421
   A typical AVR function prologue without a frame pointer might look like
422
   this:
423
        push    rXX        ; saved regs
424
        ...
425
 
426
   A main function prologue looks like this:
427
        ldi     r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
428
        ldi     r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
429
        out     __SP_H__,r29
430
        out     __SP_L__,r28
431
 
432
   A signal handler prologue looks like this:
433
        push    __zero_reg__
434
        push    __tmp_reg__
435
        in      __tmp_reg__, __SREG__
436
        push    __tmp_reg__
437
        clr     __zero_reg__
438
        push    rXX             ; save registers r18:r27, r30:r31
439
        ...
440
        push    r28             ; save frame pointer
441
        push    r29
442
        in      r28, __SP_L__
443
        in      r29, __SP_H__
444
        sbiw    r28, <LOCALS_SIZE>
445
        out     __SP_H__, r29
446
        out     __SP_L__, r28
447
 
448
   A interrupt handler prologue looks like this:
449
        sei
450
        push    __zero_reg__
451
        push    __tmp_reg__
452
        in      __tmp_reg__, __SREG__
453
        push    __tmp_reg__
454
        clr     __zero_reg__
455
        push    rXX             ; save registers r18:r27, r30:r31
456
        ...
457
        push    r28             ; save frame pointer
458
        push    r29
459
        in      r28, __SP_L__
460
        in      r29, __SP_H__
461
        sbiw    r28, <LOCALS_SIZE>
462
        cli
463
        out     __SP_H__, r29
464
        sei
465
        out     __SP_L__, r28
466
 
467
   A `-mcall-prologues' prologue looks like this (Note that the megas use a
468
   jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
469
   32 bit insn and rjmp is a 16 bit insn):
470
        ldi     r26,lo8(<LOCALS_SIZE>)
471
        ldi     r27,hi8(<LOCALS_SIZE>)
472
        ldi     r30,pm_lo8(.L_foo_body)
473
        ldi     r31,pm_hi8(.L_foo_body)
474
        rjmp    __prologue_saves__+RRR
475
        .L_foo_body:  */
476
 
477
/* Not really part of a prologue, but still need to scan for it, is when a
478
   function prologue moves values passed via registers as arguments to new
479
   registers. In this case, all local variables live in registers, so there
480
   may be some register saves. This is what it looks like:
481
        movw    rMM, rNN
482
        ...
483
 
484
   There could be multiple movw's. If the target doesn't have a movw insn, it
485
   will use two mov insns. This could be done after any of the above prologue
486
   types.  */
487
 
488
static CORE_ADDR
489
avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
490
                   struct avr_unwind_cache *info)
491
{
492
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
493
  int i;
494
  unsigned short insn;
495
  int scan_stage = 0;
496
  struct minimal_symbol *msymbol;
497
  unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
498
  int vpc = 0;
499
  int len;
500
 
501
  len = pc_end - pc_beg;
502
  if (len > AVR_MAX_PROLOGUE_SIZE)
503
    len = AVR_MAX_PROLOGUE_SIZE;
504
 
505
  /* FIXME: TRoth/2003-06-11: This could be made more efficient by only
506
     reading in the bytes of the prologue. The problem is that the figuring
507
     out where the end of the prologue is is a bit difficult. The old code
508
     tried to do that, but failed quite often.  */
509
  read_memory (pc_beg, prologue, len);
510
 
511
  /* Scanning main()'s prologue
512
     ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
513
     ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
514
     out __SP_H__,r29
515
     out __SP_L__,r28 */
516
 
517
  if (len >= 4)
518
    {
519
      CORE_ADDR locals;
520
      static const unsigned char img[] = {
521
        0xde, 0xbf,             /* out __SP_H__,r29 */
522
        0xcd, 0xbf              /* out __SP_L__,r28 */
523
      };
524
 
525
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
526
      /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */
527
      if ((insn & 0xf0f0) == 0xe0c0)
528
        {
529
          locals = (insn & 0xf) | ((insn & 0x0f00) >> 4);
530
          insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
531
          /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */
532
          if ((insn & 0xf0f0) == 0xe0d0)
533
            {
534
              locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
535
              if (vpc + 4 + sizeof (img) < len
536
                  && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
537
                {
538
                  info->prologue_type = AVR_PROLOGUE_MAIN;
539
                  info->base = locals;
540
                  return pc_beg + 4;
541
                }
542
            }
543
        }
544
    }
545
 
546
  /* Scanning `-mcall-prologues' prologue
547
     Classic prologue is 10 bytes, mega prologue is a 12 bytes long */
548
 
549
  while (1)     /* Using a while to avoid many goto's */
550
    {
551
      int loc_size;
552
      int body_addr;
553
      unsigned num_pushes;
554
      int pc_offset = 0;
555
 
556
      /* At least the fifth instruction must have been executed to
557
         modify frame shape.  */
558
      if (len < 10)
559
        break;
560
 
561
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
562
      /* ldi r26,<LOCALS_SIZE> */
563
      if ((insn & 0xf0f0) != 0xe0a0)
564
        break;
565
      loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4);
566
      pc_offset += 2;
567
 
568
      insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order);
569
      /* ldi r27,<LOCALS_SIZE> / 256 */
570
      if ((insn & 0xf0f0) != 0xe0b0)
571
        break;
572
      loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
573
      pc_offset += 2;
574
 
575
      insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order);
576
      /* ldi r30,pm_lo8(.L_foo_body) */
577
      if ((insn & 0xf0f0) != 0xe0e0)
578
        break;
579
      body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4);
580
      pc_offset += 2;
581
 
582
      insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order);
583
      /* ldi r31,pm_hi8(.L_foo_body) */
584
      if ((insn & 0xf0f0) != 0xe0f0)
585
        break;
586
      body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
587
      pc_offset += 2;
588
 
589
      msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
590
      if (!msymbol)
591
        break;
592
 
593
      insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
594
      /* rjmp __prologue_saves__+RRR */
595
      if ((insn & 0xf000) == 0xc000)
596
        {
597
          /* Extract PC relative offset from RJMP */
598
          i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
599
          /* Convert offset to byte addressable mode */
600
          i *= 2;
601
          /* Destination address */
602
          i += pc_beg + 10;
603
 
604
          if (body_addr != (pc_beg + 10)/2)
605
            break;
606
 
607
          pc_offset += 2;
608
        }
609
      else if ((insn & 0xfe0e) == 0x940c)
610
        {
611
          /* Extract absolute PC address from JMP */
612
          i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16)
613
               | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order)
614
                  & 0xffff));
615
          /* Convert address to byte addressable mode */
616
          i *= 2;
617
 
618
          if (body_addr != (pc_beg + 12)/2)
619
            break;
620
 
621
          pc_offset += 4;
622
        }
623
      else
624
        break;
625
 
626
      /* Resolve offset (in words) from __prologue_saves__ symbol.
627
         Which is a pushes count in `-mcall-prologues' mode */
628
      num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2;
629
 
630
      if (num_pushes > AVR_MAX_PUSHES)
631
        {
632
          fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"),
633
                              num_pushes);
634
          num_pushes = 0;
635
        }
636
 
637
      if (num_pushes)
638
        {
639
          int from;
640
 
641
          info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
642
          if (num_pushes >= 2)
643
            info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
644
 
645
          i = 0;
646
          for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
647
               from <= AVR_LAST_PUSHED_REGNUM; ++from)
648
            info->saved_regs [from].addr = ++i;
649
        }
650
      info->size = loc_size + num_pushes;
651
      info->prologue_type = AVR_PROLOGUE_CALL;
652
 
653
      return pc_beg + pc_offset;
654
    }
655
 
656
  /* Scan for the beginning of the prologue for an interrupt or signal
657
     function.  Note that we have to set the prologue type here since the
658
     third stage of the prologue may not be present (e.g. no saved registered
659
     or changing of the SP register).  */
660
 
661
  if (1)
662
    {
663
      static const unsigned char img[] = {
664
        0x78, 0x94,             /* sei */
665
        0x1f, 0x92,             /* push r1 */
666
        0x0f, 0x92,             /* push r0 */
667
        0x0f, 0xb6,             /* in r0,0x3f SREG */
668
        0x0f, 0x92,             /* push r0 */
669
        0x11, 0x24              /* clr r1 */
670
      };
671
      if (len >= sizeof (img)
672
          && memcmp (prologue, img, sizeof (img)) == 0)
673
        {
674
          info->prologue_type = AVR_PROLOGUE_INTR;
675
          vpc += sizeof (img);
676
          info->saved_regs[AVR_SREG_REGNUM].addr = 3;
677
          info->saved_regs[0].addr = 2;
678
          info->saved_regs[1].addr = 1;
679
          info->size += 3;
680
        }
681
      else if (len >= sizeof (img) - 2
682
               && memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
683
        {
684
          info->prologue_type = AVR_PROLOGUE_SIG;
685
          vpc += sizeof (img) - 2;
686
          info->saved_regs[AVR_SREG_REGNUM].addr = 3;
687
          info->saved_regs[0].addr = 2;
688
          info->saved_regs[1].addr = 1;
689
          info->size += 2;
690
        }
691
    }
692
 
693
  /* First stage of the prologue scanning.
694
     Scan pushes (saved registers) */
695
 
696
  for (; vpc < len; vpc += 2)
697
    {
698
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
699
      if ((insn & 0xfe0f) == 0x920f)    /* push rXX */
700
        {
701
          /* Bits 4-9 contain a mask for registers R0-R32. */
702
          int regno = (insn & 0x1f0) >> 4;
703
          info->size++;
704
          info->saved_regs[regno].addr = info->size;
705
          scan_stage = 1;
706
        }
707
      else
708
        break;
709
    }
710
 
711
  gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE);
712
 
713
  /* Handle static small stack allocation using rcall or push.  */
714
 
715
  while (scan_stage == 1 && vpc < len)
716
    {
717
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
718
      if (insn == 0xd000)       /* rcall .+0 */
719
        {
720
          info->size += gdbarch_tdep (gdbarch)->call_length;
721
          vpc += 2;
722
        }
723
      else if (insn == 0x920f)  /* push r0 */
724
        {
725
          info->size += 1;
726
          vpc += 2;
727
        }
728
      else
729
        break;
730
    }
731
 
732
  /* Second stage of the prologue scanning.
733
     Scan:
734
     in r28,__SP_L__
735
     in r29,__SP_H__ */
736
 
737
  if (scan_stage == 1 && vpc < len)
738
    {
739
      static const unsigned char img[] = {
740
        0xcd, 0xb7,             /* in r28,__SP_L__ */
741
        0xde, 0xb7              /* in r29,__SP_H__ */
742
      };
743
      unsigned short insn1;
744
 
745
      if (vpc + sizeof (img) < len
746
          && memcmp (prologue + vpc, img, sizeof (img)) == 0)
747
        {
748
          vpc += 4;
749
          scan_stage = 2;
750
        }
751
    }
752
 
753
  /* Third stage of the prologue scanning. (Really two stages)
754
     Scan for:
755
     sbiw r28,XX or subi r28,lo8(XX)
756
                    sbci r29,hi8(XX)
757
     in __tmp_reg__,__SREG__
758
     cli
759
     out __SP_H__,r29
760
     out __SREG__,__tmp_reg__
761
     out __SP_L__,r28 */
762
 
763
  if (scan_stage == 2 && vpc < len)
764
    {
765
      int locals_size = 0;
766
      static const unsigned char img[] = {
767
        0x0f, 0xb6,             /* in r0,0x3f */
768
        0xf8, 0x94,             /* cli */
769
        0xde, 0xbf,             /* out 0x3e,r29 ; SPH */
770
        0x0f, 0xbe,             /* out 0x3f,r0  ; SREG */
771
        0xcd, 0xbf              /* out 0x3d,r28 ; SPL */
772
      };
773
      static const unsigned char img_sig[] = {
774
        0xde, 0xbf,             /* out 0x3e,r29 ; SPH */
775
        0xcd, 0xbf              /* out 0x3d,r28 ; SPL */
776
      };
777
      static const unsigned char img_int[] = {
778
        0xf8, 0x94,             /* cli */
779
        0xde, 0xbf,             /* out 0x3e,r29 ; SPH */
780
        0x78, 0x94,             /* sei */
781
        0xcd, 0xbf              /* out 0x3d,r28 ; SPL */
782
      };
783
 
784
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
785
      if ((insn & 0xff30) == 0x9720)    /* sbiw r28,XXX */
786
        {
787
          locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2);
788
          vpc += 2;
789
        }
790
      else if ((insn & 0xf0f0) == 0x50c0)       /* subi r28,lo8(XX) */
791
        {
792
          locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
793
          vpc += 2;
794
          insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
795
          vpc += 2;
796
          locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8;
797
        }
798
      else
799
        return pc_beg + vpc;
800
 
801
      /* Scan the last part of the prologue. May not be present for interrupt
802
         or signal handler functions, which is why we set the prologue type
803
         when we saw the beginning of the prologue previously.  */
804
 
805
      if (vpc + sizeof (img_sig) < len
806
          && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
807
        {
808
          vpc += sizeof (img_sig);
809
        }
810
      else if (vpc + sizeof (img_int) < len
811
               && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
812
        {
813
          vpc += sizeof (img_int);
814
        }
815
      if (vpc + sizeof (img) < len
816
          && memcmp (prologue + vpc, img, sizeof (img)) == 0)
817
        {
818
          info->prologue_type = AVR_PROLOGUE_NORMAL;
819
          vpc += sizeof (img);
820
        }
821
 
822
      info->size += locals_size;
823
 
824
      /* Fall through.  */
825
    }
826
 
827
  /* If we got this far, we could not scan the prologue, so just return the pc
828
     of the frame plus an adjustment for argument move insns.  */
829
 
830
  for (; vpc < len; vpc += 2)
831
    {
832
      insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
833
      if ((insn & 0xff00) == 0x0100)    /* movw rXX, rYY */
834
        continue;
835
      else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */
836
        continue;
837
      else
838
          break;
839
    }
840
 
841
  return pc_beg + vpc;
842
}
843
 
844
static CORE_ADDR
845
avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
846
{
847
  CORE_ADDR func_addr, func_end;
848
  CORE_ADDR post_prologue_pc;
849
 
850
  /* See what the symbol table says */
851
 
852
  if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
853
    return pc;
854
 
855
  post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr);
856
  if (post_prologue_pc != 0)
857
    return max (pc, post_prologue_pc);
858
 
859
  {
860
    CORE_ADDR prologue_end = pc;
861
    struct avr_unwind_cache info = {0};
862
    struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
863
 
864
    info.saved_regs = saved_regs;
865
 
866
    /* Need to run the prologue scanner to figure out if the function has a
867
       prologue and possibly skip over moving arguments passed via registers
868
       to other registers.  */
869
 
870
    prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info);
871
 
872
    if (info.prologue_type != AVR_PROLOGUE_NONE)
873
      return prologue_end;
874
  }
875
 
876
  /* Either we didn't find the start of this function (nothing we can do),
877
     or there's no line info, or the line after the prologue is after
878
     the end of the function (there probably isn't a prologue). */
879
 
880
  return pc;
881
}
882
 
883
/* Not all avr devices support the BREAK insn. Those that don't should treat
884
   it as a NOP. Thus, it should be ok. Since the avr is currently a remote
885
   only target, this shouldn't be a problem (I hope). TRoth/2003-05-14  */
886
 
887
static const unsigned char *
888
avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr)
889
{
890
    static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
891
    *lenptr = sizeof (avr_break_insn);
892
    return avr_break_insn;
893
}
894
 
895
/* Determine, for architecture GDBARCH, how a return value of TYPE
896
   should be returned.  If it is supposed to be returned in registers,
897
   and READBUF is non-zero, read the appropriate value from REGCACHE,
898
   and copy it into READBUF.  If WRITEBUF is non-zero, write the value
899
   from WRITEBUF into REGCACHE.  */
900
 
901
static enum return_value_convention
902
avr_return_value (struct gdbarch *gdbarch, struct type *func_type,
903
                  struct type *valtype, struct regcache *regcache,
904
                  gdb_byte *readbuf, const gdb_byte *writebuf)
905
{
906
  int i;
907
  /* Single byte are returned in r24.
908
     Otherwise, the MSB of the return value is always in r25, calculate which
909
     register holds the LSB.  */
910
  int lsb_reg;
911
 
912
  if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
913
       || TYPE_CODE (valtype) == TYPE_CODE_UNION
914
       || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
915
      && TYPE_LENGTH (valtype) > 8)
916
    return RETURN_VALUE_STRUCT_CONVENTION;
917
 
918
  if (TYPE_LENGTH (valtype) <= 2)
919
    lsb_reg = 24;
920
  else if (TYPE_LENGTH (valtype) <= 4)
921
    lsb_reg = 22;
922
  else if (TYPE_LENGTH (valtype) <= 8)
923
    lsb_reg = 18;
924
  else
925
    gdb_assert (0);
926
 
927
  if (writebuf != NULL)
928
    {
929
      for (i = 0; i < TYPE_LENGTH (valtype); i++)
930
        regcache_cooked_write (regcache, lsb_reg + i, writebuf + i);
931
    }
932
 
933
  if (readbuf != NULL)
934
    {
935
      for (i = 0; i < TYPE_LENGTH (valtype); i++)
936
        regcache_cooked_read (regcache, lsb_reg + i, readbuf + i);
937
    }
938
 
939
  return RETURN_VALUE_REGISTER_CONVENTION;
940
}
941
 
942
 
943
/* Put here the code to store, into fi->saved_regs, the addresses of
944
   the saved registers of frame described by FRAME_INFO.  This
945
   includes special registers such as pc and fp saved in special ways
946
   in the stack frame.  sp is even more special: the address we return
947
   for it IS the sp for the next frame. */
948
 
949
static struct avr_unwind_cache *
950
avr_frame_unwind_cache (struct frame_info *this_frame,
951
                        void **this_prologue_cache)
952
{
953
  CORE_ADDR start_pc, current_pc;
954
  ULONGEST prev_sp;
955
  ULONGEST this_base;
956
  struct avr_unwind_cache *info;
957
  struct gdbarch *gdbarch;
958
  struct gdbarch_tdep *tdep;
959
  int i;
960
 
961
  if (*this_prologue_cache)
962
    return *this_prologue_cache;
963
 
964
  info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache);
965
  *this_prologue_cache = info;
966
  info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
967
 
968
  info->size = 0;
969
  info->prologue_type = AVR_PROLOGUE_NONE;
970
 
971
  start_pc = get_frame_func (this_frame);
972
  current_pc = get_frame_pc (this_frame);
973
  if ((start_pc > 0) && (start_pc <= current_pc))
974
    avr_scan_prologue (get_frame_arch (this_frame),
975
                       start_pc, current_pc, info);
976
 
977
  if ((info->prologue_type != AVR_PROLOGUE_NONE)
978
      && (info->prologue_type != AVR_PROLOGUE_MAIN))
979
    {
980
      ULONGEST high_base;       /* High byte of FP */
981
 
982
      /* The SP was moved to the FP.  This indicates that a new frame
983
         was created.  Get THIS frame's FP value by unwinding it from
984
         the next frame.  */
985
      this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
986
      high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
987
      this_base += (high_base << 8);
988
 
989
      /* The FP points at the last saved register.  Adjust the FP back
990
         to before the first saved register giving the SP.  */
991
      prev_sp = this_base + info->size;
992
   }
993
  else
994
    {
995
      /* Assume that the FP is this frame's SP but with that pushed
996
         stack space added back.  */
997
      this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
998
      prev_sp = this_base + info->size;
999
    }
1000
 
1001
  /* Add 1 here to adjust for the post-decrement nature of the push
1002
     instruction.*/
1003
  info->prev_sp = avr_make_saddr (prev_sp + 1);
1004
  info->base = avr_make_saddr (this_base);
1005
 
1006
  gdbarch = get_frame_arch (this_frame);
1007
 
1008
  /* Adjust all the saved registers so that they contain addresses and not
1009
     offsets.  */
1010
  for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
1011
    if (info->saved_regs[i].addr > 0)
1012
      info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
1013
 
1014
  /* Except for the main and startup code, the return PC is always saved on
1015
     the stack and is at the base of the frame. */
1016
 
1017
  if (info->prologue_type != AVR_PROLOGUE_MAIN)
1018
    info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
1019
 
1020
  /* The previous frame's SP needed to be computed.  Save the computed
1021
     value.  */
1022
  tdep = gdbarch_tdep (gdbarch);
1023
  trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
1024
                        info->prev_sp - 1 + tdep->call_length);
1025
 
1026
  return info;
1027
}
1028
 
1029
static CORE_ADDR
1030
avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1031
{
1032
  ULONGEST pc;
1033
 
1034
  pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM);
1035
 
1036
  return avr_make_iaddr (pc);
1037
}
1038
 
1039
static CORE_ADDR
1040
avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1041
{
1042
  ULONGEST sp;
1043
 
1044
  sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM);
1045
 
1046
  return avr_make_saddr (sp);
1047
}
1048
 
1049
/* Given a GDB frame, determine the address of the calling function's
1050
   frame.  This will be used to create a new GDB frame struct.  */
1051
 
1052
static void
1053
avr_frame_this_id (struct frame_info *this_frame,
1054
                   void **this_prologue_cache,
1055
                   struct frame_id *this_id)
1056
{
1057
  struct avr_unwind_cache *info
1058
    = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1059
  CORE_ADDR base;
1060
  CORE_ADDR func;
1061
  struct frame_id id;
1062
 
1063
  /* The FUNC is easy.  */
1064
  func = get_frame_func (this_frame);
1065
 
1066
  /* Hopefully the prologue analysis either correctly determined the
1067
     frame's base (which is the SP from the previous frame), or set
1068
     that base to "NULL".  */
1069
  base = info->prev_sp;
1070
  if (base == 0)
1071
    return;
1072
 
1073
  id = frame_id_build (base, func);
1074
  (*this_id) = id;
1075
}
1076
 
1077
static struct value *
1078
avr_frame_prev_register (struct frame_info *this_frame,
1079
                         void **this_prologue_cache, int regnum)
1080
{
1081
  struct gdbarch *gdbarch = get_frame_arch (this_frame);
1082
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1083
  struct avr_unwind_cache *info
1084
    = avr_frame_unwind_cache (this_frame, this_prologue_cache);
1085
 
1086
  if (regnum == AVR_PC_REGNUM || regnum == AVR_PSEUDO_PC_REGNUM)
1087
    {
1088
      if (trad_frame_addr_p (info->saved_regs, AVR_PC_REGNUM))
1089
        {
1090
          /* Reading the return PC from the PC register is slightly
1091
             abnormal.  register_size(AVR_PC_REGNUM) says it is 4 bytes,
1092
             but in reality, only two bytes (3 in upcoming mega256) are
1093
             stored on the stack.
1094
 
1095
             Also, note that the value on the stack is an addr to a word
1096
             not a byte, so we will need to multiply it by two at some
1097
             point.
1098
 
1099
             And to confuse matters even more, the return address stored
1100
             on the stack is in big endian byte order, even though most
1101
             everything else about the avr is little endian. Ick!  */
1102
          ULONGEST pc;
1103
          int i;
1104
          unsigned char buf[3];
1105
          struct gdbarch *gdbarch = get_frame_arch (this_frame);
1106
          struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1107
 
1108
          read_memory (info->saved_regs[AVR_PC_REGNUM].addr,
1109
                       buf, tdep->call_length);
1110
 
1111
          /* Extract the PC read from memory as a big-endian.  */
1112
          pc = 0;
1113
          for (i = 0; i < tdep->call_length; i++)
1114
            pc = (pc << 8) | buf[i];
1115
 
1116
          if (regnum == AVR_PC_REGNUM)
1117
            pc <<= 1;
1118
 
1119
          return frame_unwind_got_constant (this_frame, regnum, pc);
1120
        }
1121
 
1122
      return frame_unwind_got_optimized (this_frame, regnum);
1123
    }
1124
 
1125
  return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1126
}
1127
 
1128
static const struct frame_unwind avr_frame_unwind = {
1129
  NORMAL_FRAME,
1130
  avr_frame_this_id,
1131
  avr_frame_prev_register,
1132
  NULL,
1133
  default_frame_sniffer
1134
};
1135
 
1136
static CORE_ADDR
1137
avr_frame_base_address (struct frame_info *this_frame, void **this_cache)
1138
{
1139
  struct avr_unwind_cache *info
1140
    = avr_frame_unwind_cache (this_frame, this_cache);
1141
 
1142
  return info->base;
1143
}
1144
 
1145
static const struct frame_base avr_frame_base = {
1146
  &avr_frame_unwind,
1147
  avr_frame_base_address,
1148
  avr_frame_base_address,
1149
  avr_frame_base_address
1150
};
1151
 
1152
/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1153
   frame.  The frame ID's base needs to match the TOS value saved by
1154
   save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint.  */
1155
 
1156
static struct frame_id
1157
avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1158
{
1159
  ULONGEST base;
1160
 
1161
  base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
1162
  return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame));
1163
}
1164
 
1165
/* When arguments must be pushed onto the stack, they go on in reverse
1166
   order.  The below implements a FILO (stack) to do this. */
1167
 
1168
struct stack_item
1169
{
1170
  int len;
1171
  struct stack_item *prev;
1172
  void *data;
1173
};
1174
 
1175
static struct stack_item *
1176
push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
1177
{
1178
  struct stack_item *si;
1179
  si = xmalloc (sizeof (struct stack_item));
1180
  si->data = xmalloc (len);
1181
  si->len = len;
1182
  si->prev = prev;
1183
  memcpy (si->data, contents, len);
1184
  return si;
1185
}
1186
 
1187
static struct stack_item *pop_stack_item (struct stack_item *si);
1188
static struct stack_item *
1189
pop_stack_item (struct stack_item *si)
1190
{
1191
  struct stack_item *dead = si;
1192
  si = si->prev;
1193
  xfree (dead->data);
1194
  xfree (dead);
1195
  return si;
1196
}
1197
 
1198
/* Setup the function arguments for calling a function in the inferior.
1199
 
1200
   On the AVR architecture, there are 18 registers (R25 to R8) which are
1201
   dedicated for passing function arguments.  Up to the first 18 arguments
1202
   (depending on size) may go into these registers.  The rest go on the stack.
1203
 
1204
   All arguments are aligned to start in even-numbered registers (odd-sized
1205
   arguments, including char, have one free register above them). For example,
1206
   an int in arg1 and a char in arg2 would be passed as such:
1207
 
1208
      arg1 -> r25:r24
1209
      arg2 -> r22
1210
 
1211
   Arguments that are larger than 2 bytes will be split between two or more
1212
   registers as available, but will NOT be split between a register and the
1213
   stack. Arguments that go onto the stack are pushed last arg first (this is
1214
   similar to the d10v).  */
1215
 
1216
/* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
1217
   inaccurate.
1218
 
1219
   An exceptional case exists for struct arguments (and possibly other
1220
   aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but
1221
   not a multiple of WORDSIZE bytes.  In this case the argument is never split
1222
   between the registers and the stack, but instead is copied in its entirety
1223
   onto the stack, AND also copied into as many registers as there is room
1224
   for.  In other words, space in registers permitting, two copies of the same
1225
   argument are passed in.  As far as I can tell, only the one on the stack is
1226
   used, although that may be a function of the level of compiler
1227
   optimization.  I suspect this is a compiler bug.  Arguments of these odd
1228
   sizes are left-justified within the word (as opposed to arguments smaller
1229
   than WORDSIZE bytes, which are right-justified).
1230
 
1231
   If the function is to return an aggregate type such as a struct, the caller
1232
   must allocate space into which the callee will copy the return value.  In
1233
   this case, a pointer to the return value location is passed into the callee
1234
   in register R0, which displaces one of the other arguments passed in via
1235
   registers R0 to R2. */
1236
 
1237
static CORE_ADDR
1238
avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1239
                     struct regcache *regcache, CORE_ADDR bp_addr,
1240
                     int nargs, struct value **args, CORE_ADDR sp,
1241
                     int struct_return, CORE_ADDR struct_addr)
1242
{
1243
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1244
  int i;
1245
  unsigned char buf[3];
1246
  int call_length = gdbarch_tdep (gdbarch)->call_length;
1247
  CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr);
1248
  int regnum = AVR_ARGN_REGNUM;
1249
  struct stack_item *si = NULL;
1250
 
1251
  if (struct_return)
1252
    {
1253
      regcache_cooked_write_unsigned
1254
        (regcache, regnum--, (struct_addr >> 8) & 0xff);
1255
      regcache_cooked_write_unsigned
1256
        (regcache, regnum--, struct_addr & 0xff);
1257
      /* SP being post decremented, we need to reserve one byte so that the
1258
         return address won't overwrite the result (or vice-versa).  */
1259
      if (sp == struct_addr)
1260
        sp--;
1261
    }
1262
 
1263
  for (i = 0; i < nargs; i++)
1264
    {
1265
      int last_regnum;
1266
      int j;
1267
      struct value *arg = args[i];
1268
      struct type *type = check_typedef (value_type (arg));
1269
      const bfd_byte *contents = value_contents (arg);
1270
      int len = TYPE_LENGTH (type);
1271
 
1272
      /* Calculate the potential last register needed. */
1273
      last_regnum = regnum - (len + (len & 1));
1274
 
1275
      /* If there are registers available, use them. Once we start putting
1276
         stuff on the stack, all subsequent args go on stack. */
1277
      if ((si == NULL) && (last_regnum >= 8))
1278
        {
1279
          ULONGEST val;
1280
 
1281
          /* Skip a register for odd length args. */
1282
          if (len & 1)
1283
            regnum--;
1284
 
1285
          val = extract_unsigned_integer (contents, len, byte_order);
1286
          for (j = 0; j < len; j++)
1287
            regcache_cooked_write_unsigned
1288
              (regcache, regnum--, val >> (8 * (len - j - 1)));
1289
        }
1290
      /* No registers available, push the args onto the stack. */
1291
      else
1292
        {
1293
          /* From here on, we don't care about regnum. */
1294
          si = push_stack_item (si, contents, len);
1295
        }
1296
    }
1297
 
1298
  /* Push args onto the stack. */
1299
  while (si)
1300
    {
1301
      sp -= si->len;
1302
      /* Add 1 to sp here to account for post decr nature of pushes. */
1303
      write_memory (sp + 1, si->data, si->len);
1304
      si = pop_stack_item (si);
1305
    }
1306
 
1307
  /* Set the return address.  For the avr, the return address is the BP_ADDR.
1308
     Need to push the return address onto the stack noting that it needs to be
1309
     in big-endian order on the stack.  */
1310
  for (i = 1; i <= call_length; i++)
1311
    {
1312
      buf[call_length - i] = return_pc & 0xff;
1313
      return_pc >>= 8;
1314
    }
1315
 
1316
  sp -= call_length;
1317
  /* Use 'sp + 1' since pushes are post decr ops. */
1318
  write_memory (sp + 1, buf, call_length);
1319
 
1320
  /* Finally, update the SP register. */
1321
  regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
1322
                                  avr_convert_saddr_to_raw (sp));
1323
 
1324
  /* Return SP value for the dummy frame, where the return address hasn't been
1325
     pushed.  */
1326
  return sp + call_length;
1327
}
1328
 
1329
/* Unfortunately dwarf2 register for SP is 32.  */
1330
 
1331
static int
1332
avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1333
{
1334
  if (reg >= 0 && reg < 32)
1335
    return reg;
1336
  if (reg == 32)
1337
    return AVR_SP_REGNUM;
1338
 
1339
  warning (_("Unmapped DWARF Register #%d encountered."), reg);
1340
 
1341
  return -1;
1342
}
1343
 
1344
/* Initialize the gdbarch structure for the AVR's. */
1345
 
1346
static struct gdbarch *
1347
avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1348
{
1349
  struct gdbarch *gdbarch;
1350
  struct gdbarch_tdep *tdep;
1351
  struct gdbarch_list *best_arch;
1352
  int call_length;
1353
 
1354
  /* Avr-6 call instructions save 3 bytes.  */
1355
  switch (info.bfd_arch_info->mach)
1356
    {
1357
    case bfd_mach_avr1:
1358
    case bfd_mach_avr2:
1359
    case bfd_mach_avr3:
1360
    case bfd_mach_avr4:
1361
    case bfd_mach_avr5:
1362
    default:
1363
      call_length = 2;
1364
      break;
1365
    case bfd_mach_avr6:
1366
      call_length = 3;
1367
      break;
1368
    }
1369
 
1370
  /* If there is already a candidate, use it.  */
1371
  for (best_arch = gdbarch_list_lookup_by_info (arches, &info);
1372
       best_arch != NULL;
1373
       best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
1374
    {
1375
      if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length)
1376
        return best_arch->gdbarch;
1377
    }
1378
 
1379
  /* None found, create a new architecture from the information provided. */
1380
  tdep = XMALLOC (struct gdbarch_tdep);
1381
  gdbarch = gdbarch_alloc (&info, tdep);
1382
 
1383
  tdep->call_length = call_length;
1384
 
1385
  /* Create a type for PC.  We can't use builtin types here, as they may not
1386
     be defined.  */
1387
  tdep->void_type = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void");
1388
  tdep->func_void_type = make_function_type (tdep->void_type, NULL);
1389
  tdep->pc_type = arch_type (gdbarch, TYPE_CODE_PTR, 4, NULL);
1390
  TYPE_TARGET_TYPE (tdep->pc_type) = tdep->func_void_type;
1391
  TYPE_UNSIGNED (tdep->pc_type) = 1;
1392
 
1393
  set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1394
  set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1395
  set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1396
  set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1397
  set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1398
  set_gdbarch_addr_bit (gdbarch, 32);
1399
 
1400
  set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1401
  set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1402
  set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1403
 
1404
  set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1405
  set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1406
  set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1407
 
1408
  set_gdbarch_read_pc (gdbarch, avr_read_pc);
1409
  set_gdbarch_write_pc (gdbarch, avr_write_pc);
1410
 
1411
  set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS);
1412
 
1413
  set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM);
1414
  set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM);
1415
 
1416
  set_gdbarch_register_name (gdbarch, avr_register_name);
1417
  set_gdbarch_register_type (gdbarch, avr_register_type);
1418
 
1419
  set_gdbarch_num_pseudo_regs (gdbarch, AVR_NUM_PSEUDO_REGS);
1420
  set_gdbarch_pseudo_register_read (gdbarch, avr_pseudo_register_read);
1421
  set_gdbarch_pseudo_register_write (gdbarch, avr_pseudo_register_write);
1422
 
1423
  set_gdbarch_return_value (gdbarch, avr_return_value);
1424
  set_gdbarch_print_insn (gdbarch, print_insn_avr);
1425
 
1426
  set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
1427
 
1428
  set_gdbarch_dwarf2_reg_to_regnum (gdbarch, avr_dwarf_reg_to_regnum);
1429
 
1430
  set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer);
1431
  set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address);
1432
  set_gdbarch_integer_to_address (gdbarch, avr_integer_to_address);
1433
 
1434
  set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue);
1435
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1436
 
1437
  set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
1438
 
1439
  frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
1440
  frame_base_set_default (gdbarch, &avr_frame_base);
1441
 
1442
  set_gdbarch_dummy_id (gdbarch, avr_dummy_id);
1443
 
1444
  set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc);
1445
  set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp);
1446
 
1447
  return gdbarch;
1448
}
1449
 
1450
/* Send a query request to the avr remote target asking for values of the io
1451
   registers. If args parameter is not NULL, then the user has requested info
1452
   on a specific io register [This still needs implemented and is ignored for
1453
   now]. The query string should be one of these forms:
1454
 
1455
   "Ravr.io_reg" -> reply is "NN" number of io registers
1456
 
1457
   "Ravr.io_reg:addr,len" where addr is first register and len is number of
1458
   registers to be read. The reply should be "<NAME>,VV;" for each io register
1459
   where, <NAME> is a string, and VV is the hex value of the register.
1460
 
1461
   All io registers are 8-bit. */
1462
 
1463
static void
1464
avr_io_reg_read_command (char *args, int from_tty)
1465
{
1466
  LONGEST bufsiz = 0;
1467
  gdb_byte *buf;
1468
  char query[400];
1469
  char *p;
1470
  unsigned int nreg = 0;
1471
  unsigned int val;
1472
  int i, j, k, step;
1473
 
1474
  /* Find out how many io registers the target has. */
1475
  bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1476
                              "avr.io_reg", &buf);
1477
 
1478
  if (bufsiz <= 0)
1479
    {
1480
      fprintf_unfiltered (gdb_stderr,
1481
                          _("ERR: info io_registers NOT supported "
1482
                            "by current target\n"));
1483
      return;
1484
    }
1485
 
1486
  if (sscanf (buf, "%x", &nreg) != 1)
1487
    {
1488
      fprintf_unfiltered (gdb_stderr,
1489
                          _("Error fetching number of io registers\n"));
1490
      xfree (buf);
1491
      return;
1492
    }
1493
 
1494
  xfree (buf);
1495
 
1496
  reinitialize_more_filter ();
1497
 
1498
  printf_unfiltered (_("Target has %u io registers:\n\n"), nreg);
1499
 
1500
  /* only fetch up to 8 registers at a time to keep the buffer small */
1501
  step = 8;
1502
 
1503
  for (i = 0; i < nreg; i += step)
1504
    {
1505
      /* how many registers this round? */
1506
      j = step;
1507
      if ((i+j) >= nreg)
1508
        j = nreg - i;           /* last block is less than 8 registers */
1509
 
1510
      snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
1511
      bufsiz = target_read_alloc (&current_target, TARGET_OBJECT_AVR,
1512
                                  query, &buf);
1513
 
1514
      p = buf;
1515
      for (k = i; k < (i + j); k++)
1516
        {
1517
          if (sscanf (p, "%[^,],%x;", query, &val) == 2)
1518
            {
1519
              printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
1520
              while ((*p != ';') && (*p != '\0'))
1521
                p++;
1522
              p++;              /* skip over ';' */
1523
              if (*p == '\0')
1524
                break;
1525
            }
1526
        }
1527
 
1528
      xfree (buf);
1529
    }
1530
}
1531
 
1532
extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */
1533
 
1534
void
1535
_initialize_avr_tdep (void)
1536
{
1537
  register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init);
1538
 
1539
  /* Add a new command to allow the user to query the avr remote target for
1540
     the values of the io space registers in a saner way than just using
1541
     `x/NNNb ADDR`. */
1542
 
1543
  /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
1544
     io_registers' to signify it is not available on other platforms. */
1545
 
1546
  add_cmd ("io_registers", class_info, avr_io_reg_read_command,
1547
           _("query remote avr target for io space register values"),
1548
           &infolist);
1549
}

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