OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [features/] [rs6000/] [powerpc-e500.c] - Blame information for rev 299

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* THIS FILE IS GENERATED.  Original: powerpc-e500.xml */
2
 
3
#include "defs.h"
4
#include "target-descriptions.h"
5
 
6
struct target_desc *tdesc_powerpc_e500;
7
static void
8
initialize_tdesc_powerpc_e500 (void)
9
{
10
  struct target_desc *result = allocate_target_description ();
11
  struct tdesc_feature *feature;
12
  struct tdesc_type *field_type, *type;
13
 
14
  set_tdesc_architecture (result, bfd_scan_arch ("powerpc:e500"));
15
 
16
  feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
17
  tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
18
  tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
19
  tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
20
  tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
21
  tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
22
  tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
23
  tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
24
  tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
25
  tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
26
  tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
27
  tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
28
  tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
29
  tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
30
  tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
31
  tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
32
  tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
33
  tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32");
34
  tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32");
35
  tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32");
36
  tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32");
37
  tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32");
38
  tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32");
39
  tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32");
40
  tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32");
41
  tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32");
42
  tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32");
43
  tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32");
44
  tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32");
45
  tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32");
46
  tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32");
47
  tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32");
48
  tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32");
49
  tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr");
50
  tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32");
51
  tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
52
  tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr");
53
  tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32");
54
  tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
55
 
56
  feature = tdesc_create_feature (result, "org.gnu.gdb.power.spe");
57
  tdesc_create_reg (feature, "ev0h", 32, 1, NULL, 32, "int");
58
  tdesc_create_reg (feature, "ev1h", 33, 1, NULL, 32, "int");
59
  tdesc_create_reg (feature, "ev2h", 34, 1, NULL, 32, "int");
60
  tdesc_create_reg (feature, "ev3h", 35, 1, NULL, 32, "int");
61
  tdesc_create_reg (feature, "ev4h", 36, 1, NULL, 32, "int");
62
  tdesc_create_reg (feature, "ev5h", 37, 1, NULL, 32, "int");
63
  tdesc_create_reg (feature, "ev6h", 38, 1, NULL, 32, "int");
64
  tdesc_create_reg (feature, "ev7h", 39, 1, NULL, 32, "int");
65
  tdesc_create_reg (feature, "ev8h", 40, 1, NULL, 32, "int");
66
  tdesc_create_reg (feature, "ev9h", 41, 1, NULL, 32, "int");
67
  tdesc_create_reg (feature, "ev10h", 42, 1, NULL, 32, "int");
68
  tdesc_create_reg (feature, "ev11h", 43, 1, NULL, 32, "int");
69
  tdesc_create_reg (feature, "ev12h", 44, 1, NULL, 32, "int");
70
  tdesc_create_reg (feature, "ev13h", 45, 1, NULL, 32, "int");
71
  tdesc_create_reg (feature, "ev14h", 46, 1, NULL, 32, "int");
72
  tdesc_create_reg (feature, "ev15h", 47, 1, NULL, 32, "int");
73
  tdesc_create_reg (feature, "ev16h", 48, 1, NULL, 32, "int");
74
  tdesc_create_reg (feature, "ev17h", 49, 1, NULL, 32, "int");
75
  tdesc_create_reg (feature, "ev18h", 50, 1, NULL, 32, "int");
76
  tdesc_create_reg (feature, "ev19h", 51, 1, NULL, 32, "int");
77
  tdesc_create_reg (feature, "ev20h", 52, 1, NULL, 32, "int");
78
  tdesc_create_reg (feature, "ev21h", 53, 1, NULL, 32, "int");
79
  tdesc_create_reg (feature, "ev22h", 54, 1, NULL, 32, "int");
80
  tdesc_create_reg (feature, "ev23h", 55, 1, NULL, 32, "int");
81
  tdesc_create_reg (feature, "ev24h", 56, 1, NULL, 32, "int");
82
  tdesc_create_reg (feature, "ev25h", 57, 1, NULL, 32, "int");
83
  tdesc_create_reg (feature, "ev26h", 58, 1, NULL, 32, "int");
84
  tdesc_create_reg (feature, "ev27h", 59, 1, NULL, 32, "int");
85
  tdesc_create_reg (feature, "ev28h", 60, 1, NULL, 32, "int");
86
  tdesc_create_reg (feature, "ev29h", 61, 1, NULL, 32, "int");
87
  tdesc_create_reg (feature, "ev30h", 62, 1, NULL, 32, "int");
88
  tdesc_create_reg (feature, "ev31h", 63, 1, NULL, 32, "int");
89
  tdesc_create_reg (feature, "acc", 73, 1, NULL, 64, "int");
90
  tdesc_create_reg (feature, "spefscr", 74, 1, NULL, 32, "int");
91
 
92
  tdesc_powerpc_e500 = result;
93
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.