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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [i386-tdep.h] - Blame information for rev 227

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1 227 jeremybenn
/* Target-dependent code for the i386.
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   Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
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   Free Software Foundation, Inc.
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   This file is part of GDB.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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#ifndef I386_TDEP_H
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#define I386_TDEP_H
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struct frame_info;
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struct gdbarch;
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struct reggroup;
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struct regset;
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struct regcache;
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/* GDB's i386 target supports both the 32-bit Intel Architecture
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   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
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   a similar register layout for both.
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   - General purpose registers
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   - FPU data registers
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   - FPU control registers
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   - SSE data registers
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   - SSE control register
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   The general purpose registers for the x86-64 architecture are quite
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   different from IA-32.  Therefore, gdbarch_fp0_regnum
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   determines the register number at which the FPU data registers
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   start.  The number of FPU data and control registers is the same
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   for both architectures.  The number of SSE registers however,
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   differs and is determined by the num_xmm_regs member of `struct
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   gdbarch_tdep'.  */
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/* Convention for returning structures.  */
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enum struct_return
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{
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  pcc_struct_return,            /* Return "short" structures in memory.  */
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  reg_struct_return             /* Return "short" structures in registers.  */
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};
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/* Register classes as defined in the AMD x86-64 psABI.  */
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enum amd64_reg_class
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{
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  AMD64_INTEGER,
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  AMD64_SSE,
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  AMD64_SSEUP,
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  AMD64_X87,
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  AMD64_X87UP,
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  AMD64_COMPLEX_X87,
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  AMD64_NO_CLASS,
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  AMD64_MEMORY
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};
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/* i386 architecture specific information.  */
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struct gdbarch_tdep
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{
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  /* General-purpose registers.  */
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  struct regset *gregset;
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  int *gregset_reg_offset;
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  int gregset_num_regs;
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  size_t sizeof_gregset;
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  /* The general-purpose registers used to pass integers when making
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     function calls.  This only applies to amd64, as all parameters
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     are passed through the stack on x86.  */
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  int call_dummy_num_integer_regs;
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  int *call_dummy_integer_regs;
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  /* Used on amd64 only.  Classify TYPE according to calling conventions,
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     and store the result in CLASS.  */
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  void (*classify) (struct type *type, enum amd64_reg_class class[2]);
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  /* Used on amd64 only.  Non-zero if the first few MEMORY arguments
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     should be passed by pointer.
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     More precisely, MEMORY arguments are passed through the stack.
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     But certain architectures require that their address be passed
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     by register as well, if there are still some integer registers
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     available for argument passing.  */
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  int memory_args_by_pointer;
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  /* Used on amd64 only.
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     If non-zero, then the callers of a function are expected to reserve
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     some space in the stack just before the area where the PC is saved
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     so that the callee may save the integer-parameter registers there.
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     The amount of space is dependent on the list of registers used for
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     integer parameter passing (see component call_dummy_num_integer_regs
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     above).  */
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  int integer_param_regs_saved_in_caller_frame;
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  /* Floating-point registers.  */
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  struct regset *fpregset;
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  size_t sizeof_fpregset;
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  /* Register number for %st(0).  The register numbers for the other
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     registers follow from this one.  Set this to -1 to indicate the
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     absence of an FPU.  */
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  int st0_regnum;
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  /* Register number for %mm0.  Set this to -1 to indicate the absence
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     of MMX support.  */
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  int mm0_regnum;
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  /* Number of SSE registers.  */
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  int num_xmm_regs;
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  /* Offset of saved PC in jmp_buf.  */
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  int jb_pc_offset;
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  /* Convention for returning structures.  */
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  enum struct_return struct_return;
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  /* Address range where sigtramp lives.  */
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  CORE_ADDR sigtramp_start;
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  CORE_ADDR sigtramp_end;
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  /* Detect sigtramp.  */
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  int (*sigtramp_p) (struct frame_info *);
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  /* Get address of sigcontext for sigtramp.  */
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  CORE_ADDR (*sigcontext_addr) (struct frame_info *);
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  /* Offset of registers in `struct sigcontext'.  */
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  int *sc_reg_offset;
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  int sc_num_regs;
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  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
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     is deprecated, please use `sc_reg_offset' instead.  */
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  int sc_pc_offset;
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  int sc_sp_offset;
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  /* ISA-specific data types.  */
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  struct type *i386_eflags_type;
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  struct type *i386_mxcsr_type;
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  struct type *i386_mmx_type;
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  struct type *i386_sse_type;
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  struct type *i387_ext_type;
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  /* Process record/replay target.  */
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  /* The map for registers because the AMD64's registers order
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     in GDB is not same as I386 instructions.  */
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  const int *record_regmap;
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  /* Parse intx80 args.  */
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  int (*i386_intx80_record) (struct regcache *regcache);
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  /* Parse sysenter args.  */
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  int (*i386_sysenter_record) (struct regcache *regcache);
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  /* Parse syscall args.  */
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  int (*i386_syscall_record) (struct regcache *regcache);
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};
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/* Floating-point registers.  */
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/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
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   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
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   register cache.  */
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/* Return non-zero if REGNUM matches the FP register and the FP
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   register set is active.  */
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extern int i386_fp_regnum_p (struct gdbarch *, int);
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extern int i386_fpc_regnum_p (struct gdbarch *, int);
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179
/* Register numbers of various important registers.  */
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181
enum i386_regnum
182
{
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  I386_EAX_REGNUM,              /* %eax */
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  I386_ECX_REGNUM,              /* %ecx */
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  I386_EDX_REGNUM,              /* %edx */
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  I386_EBX_REGNUM,              /* %ebx */
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  I386_ESP_REGNUM,              /* %esp */
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  I386_EBP_REGNUM,              /* %ebp */
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  I386_ESI_REGNUM,              /* %esi */
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  I386_EDI_REGNUM,              /* %edi */
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  I386_EIP_REGNUM,              /* %eip */
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  I386_EFLAGS_REGNUM,           /* %eflags */
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  I386_CS_REGNUM,               /* %cs */
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  I386_SS_REGNUM,               /* %ss */
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  I386_DS_REGNUM,               /* %ds */
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  I386_ES_REGNUM,               /* %es */
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  I386_FS_REGNUM,               /* %fs */
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  I386_GS_REGNUM,               /* %gs */
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  I386_ST0_REGNUM               /* %st(0) */
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};
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/* Register numbers of RECORD_REGMAP.  */
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enum record_i386_regnum
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{
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  X86_RECORD_REAX_REGNUM,
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  X86_RECORD_RECX_REGNUM,
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  X86_RECORD_REDX_REGNUM,
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  X86_RECORD_REBX_REGNUM,
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  X86_RECORD_RESP_REGNUM,
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  X86_RECORD_REBP_REGNUM,
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  X86_RECORD_RESI_REGNUM,
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  X86_RECORD_REDI_REGNUM,
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  X86_RECORD_R8_REGNUM,
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  X86_RECORD_R9_REGNUM,
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  X86_RECORD_R10_REGNUM,
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  X86_RECORD_R11_REGNUM,
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  X86_RECORD_R12_REGNUM,
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  X86_RECORD_R13_REGNUM,
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  X86_RECORD_R14_REGNUM,
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  X86_RECORD_R15_REGNUM,
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  X86_RECORD_REIP_REGNUM,
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  X86_RECORD_EFLAGS_REGNUM,
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  X86_RECORD_CS_REGNUM,
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  X86_RECORD_SS_REGNUM,
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  X86_RECORD_DS_REGNUM,
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  X86_RECORD_ES_REGNUM,
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  X86_RECORD_FS_REGNUM,
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  X86_RECORD_GS_REGNUM,
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};
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#define I386_NUM_GREGS  16
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#define I386_NUM_FREGS  16
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#define I386_NUM_XREGS  9
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#define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
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                                 + I386_NUM_XREGS)
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/* Size of the largest register.  */
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#define I386_MAX_REGISTER_SIZE  16
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/* Types for i386-specific registers.  */
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extern struct type *i386_eflags_type (struct gdbarch *gdbarch);
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extern struct type *i386_mxcsr_type (struct gdbarch *gdbarch);
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extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
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extern struct type *i386_sse_type (struct gdbarch *gdbarch);
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extern struct type *i387_ext_type (struct gdbarch *gdbarch);
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/* Segment selectors.  */
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#define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
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#define I386_SEL_UPL    0x0003  /* User Privilige Level. */
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#define I386_SEL_KPL    0x0000  /* Kernel Privilige Level. */
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/* The length of the longest i386 instruction (according to
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   include/asm-i386/kprobes.h in Linux 2.6.  */
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#define I386_MAX_INSN_LEN (16)
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/* Functions exported from i386-tdep.c.  */
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extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
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                                               CORE_ADDR pc, char *name);
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extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
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/* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
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extern int i386_sigtramp_p (struct frame_info *this_frame);
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/* Return the name of register REGNUM.  */
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extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
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/* Return non-zero if REGNUM is a member of the specified group.  */
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extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
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                                     struct reggroup *group);
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/* Supply register REGNUM from the general-purpose register set REGSET
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   to register cache REGCACHE.  If REGNUM is -1, do this for all
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   registers in REGSET.  */
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extern void i386_supply_gregset (const struct regset *regset,
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                                 struct regcache *regcache, int regnum,
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                                 const void *gregs, size_t len);
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/* Collect register REGNUM from the register cache REGCACHE and store
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   it in the buffer specified by GREGS and LEN as described by the
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   general-purpose register set REGSET.  If REGNUM is -1, do this for
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   all registers in REGSET.  */
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extern void i386_collect_gregset (const struct regset *regset,
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                                  const struct regcache *regcache,
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                                  int regnum, void *gregs, size_t len);
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/* Return the appropriate register set for the core section identified
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   by SECT_NAME and SECT_SIZE.  */
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extern const struct regset *
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  i386_regset_from_core_section (struct gdbarch *gdbarch,
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                                 const char *sect_name, size_t sect_size);
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extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
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                                       struct displaced_step_closure *closure,
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                                       CORE_ADDR from, CORE_ADDR to,
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                                       struct regcache *regs);
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/* Initialize a basic ELF architecture variant.  */
301
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
302
 
303
/* Initialize a SVR4 architecture variant.  */
304
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
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306
extern int i386_process_record (struct gdbarch *gdbarch,
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                                struct regcache *regcache, CORE_ADDR addr);
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/* Functions and variables exported from i386bsd-tdep.c.  */
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312
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
313
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
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extern CORE_ADDR i386fbsd_sigtramp_end_addr;
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extern CORE_ADDR i386obsd_sigtramp_start_addr;
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extern CORE_ADDR i386obsd_sigtramp_end_addr;
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extern int i386fbsd4_sc_reg_offset[];
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extern int i386fbsd_sc_reg_offset[];
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extern int i386nbsd_sc_reg_offset[];
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extern int i386obsd_sc_reg_offset[];
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extern int i386bsd_sc_reg_offset[];
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#endif /* i386-tdep.h */

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