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227 |
jeremybenn |
/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
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Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include "regcache.h"
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#include "mn10300-tdep.h"
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#include "gdb_assert.h"
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#include "bfd.h"
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#include "elf-bfd.h"
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#include "osabi.h"
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#include "regset.h"
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#include "solib-svr4.h"
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#include "frame.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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#include <stdlib.h>
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/* Transliterated from <asm-mn10300/elf.h>... */
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#define MN10300_ELF_NGREG 28
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#define MN10300_ELF_NFPREG 32
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typedef gdb_byte mn10300_elf_greg_t[4];
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typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
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typedef gdb_byte mn10300_elf_fpreg_t[4];
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typedef struct
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{
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mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
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gdb_byte fpcr[4];
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} mn10300_elf_fpregset_t;
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/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
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#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
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#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
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#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
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#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
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#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
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#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
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/* New gdbarch API for corefile registers.
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Given a section name and size, create a struct reg object
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with a supply_register and a collect_register method. */
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/* Copy register value of REGNUM from regset to regcache.
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If REGNUM is -1, do this for all gp registers in regset. */
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static void
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am33_supply_gregset_method (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *gregs, size_t len)
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{
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char zerobuf[MAX_REGISTER_SIZE];
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const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
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int i;
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gdb_assert (len == sizeof (mn10300_elf_gregset_t));
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switch (regnum) {
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case E_D0_REGNUM:
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regcache_raw_supply (regcache, E_D0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
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break;
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case E_D1_REGNUM:
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regcache_raw_supply (regcache, E_D1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
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break;
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case E_D2_REGNUM:
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regcache_raw_supply (regcache, E_D2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
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break;
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case E_D3_REGNUM:
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regcache_raw_supply (regcache, E_D3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
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break;
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case E_A0_REGNUM:
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regcache_raw_supply (regcache, E_A0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
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break;
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case E_A1_REGNUM:
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regcache_raw_supply (regcache, E_A1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
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break;
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case E_A2_REGNUM:
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regcache_raw_supply (regcache, E_A2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
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break;
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case E_A3_REGNUM:
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regcache_raw_supply (regcache, E_A3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
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break;
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case E_SP_REGNUM:
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regcache_raw_supply (regcache, E_SP_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
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break;
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case E_PC_REGNUM:
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regcache_raw_supply (regcache, E_PC_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
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break;
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case E_MDR_REGNUM:
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regcache_raw_supply (regcache, E_MDR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
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break;
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case E_PSW_REGNUM:
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regcache_raw_supply (regcache, E_PSW_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
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break;
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case E_LIR_REGNUM:
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regcache_raw_supply (regcache, E_LIR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
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break;
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case E_LAR_REGNUM:
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regcache_raw_supply (regcache, E_LAR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
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break;
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case E_MDRQ_REGNUM:
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regcache_raw_supply (regcache, E_MDRQ_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
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break;
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case E_E0_REGNUM:
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regcache_raw_supply (regcache, E_E0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
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break;
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case E_E1_REGNUM:
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regcache_raw_supply (regcache, E_E1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
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break;
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case E_E2_REGNUM:
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regcache_raw_supply (regcache, E_E2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
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break;
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case E_E3_REGNUM:
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regcache_raw_supply (regcache, E_E3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
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break;
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case E_E4_REGNUM:
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regcache_raw_supply (regcache, E_E4_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
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break;
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case E_E5_REGNUM:
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regcache_raw_supply (regcache, E_E5_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
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break;
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case E_E6_REGNUM:
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regcache_raw_supply (regcache, E_E6_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
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break;
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case E_E7_REGNUM:
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regcache_raw_supply (regcache, E_E7_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
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break;
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/* ssp, msp, and usp are inaccessible. */
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case E_E8_REGNUM:
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
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break;
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case E_E9_REGNUM:
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
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break;
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case E_E10_REGNUM:
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
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break;
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case E_MCRH_REGNUM:
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regcache_raw_supply (regcache, E_MCRH_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
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break;
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case E_MCRL_REGNUM:
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regcache_raw_supply (regcache, E_MCRL_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
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break;
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case E_MCVF_REGNUM:
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regcache_raw_supply (regcache, E_MCVF_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
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break;
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case E_FPCR_REGNUM:
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/* FPCR is numbered among the GP regs, but handled as an FP reg.
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Do nothing. */
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break;
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case E_FPCR_REGNUM + 1:
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/* The two unused registers beyond fpcr are inaccessible. */
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
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break;
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case E_FPCR_REGNUM + 2:
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
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break;
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default: /* An error, obviously, but should we error out? */
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break;
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case -1:
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for (i = 0; i < MN10300_ELF_NGREG; i++)
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am33_supply_gregset_method (regset, regcache, i, gregs, len);
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break;
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238 |
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}
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239 |
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return;
|
240 |
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}
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241 |
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|
242 |
|
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/* Copy fp register value of REGNUM from regset to regcache.
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243 |
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If REGNUM is -1, do this for all fp registers in regset. */
|
244 |
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|
245 |
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static void
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246 |
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am33_supply_fpregset_method (const struct regset *regset,
|
247 |
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struct regcache *regcache,
|
248 |
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int regnum, const void *fpregs, size_t len)
|
249 |
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{
|
250 |
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const mn10300_elf_fpregset_t *fpregset = fpregs;
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251 |
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|
252 |
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gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
|
253 |
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|
254 |
|
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if (regnum == -1)
|
255 |
|
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{
|
256 |
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int i;
|
257 |
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|
258 |
|
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for (i = 0; i < MN10300_ELF_NFPREG; i++)
|
259 |
|
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am33_supply_fpregset_method (regset, regcache,
|
260 |
|
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E_FS0_REGNUM + i, fpregs, len);
|
261 |
|
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am33_supply_fpregset_method (regset, regcache,
|
262 |
|
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E_FPCR_REGNUM, fpregs, len);
|
263 |
|
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}
|
264 |
|
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else if (regnum == E_FPCR_REGNUM)
|
265 |
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regcache_raw_supply (regcache, E_FPCR_REGNUM,
|
266 |
|
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&fpregset->fpcr);
|
267 |
|
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else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
268 |
|
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regcache_raw_supply (regcache, regnum,
|
269 |
|
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&fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
270 |
|
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|
271 |
|
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return;
|
272 |
|
|
}
|
273 |
|
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|
274 |
|
|
/* Copy register values from regcache to regset. */
|
275 |
|
|
|
276 |
|
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static void
|
277 |
|
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am33_collect_gregset_method (const struct regset *regset,
|
278 |
|
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const struct regcache *regcache,
|
279 |
|
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int regnum, void *gregs, size_t len)
|
280 |
|
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{
|
281 |
|
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mn10300_elf_gregset_t *regp = gregs;
|
282 |
|
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int i;
|
283 |
|
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|
284 |
|
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gdb_assert (len == sizeof (mn10300_elf_gregset_t));
|
285 |
|
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|
286 |
|
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switch (regnum) {
|
287 |
|
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case E_D0_REGNUM:
|
288 |
|
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regcache_raw_collect (regcache, E_D0_REGNUM,
|
289 |
|
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
|
290 |
|
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break;
|
291 |
|
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case E_D1_REGNUM:
|
292 |
|
|
regcache_raw_collect (regcache, E_D1_REGNUM,
|
293 |
|
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
|
294 |
|
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break;
|
295 |
|
|
case E_D2_REGNUM:
|
296 |
|
|
regcache_raw_collect (regcache, E_D2_REGNUM,
|
297 |
|
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
|
298 |
|
|
break;
|
299 |
|
|
case E_D3_REGNUM:
|
300 |
|
|
regcache_raw_collect (regcache, E_D3_REGNUM,
|
301 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
|
302 |
|
|
break;
|
303 |
|
|
case E_A0_REGNUM:
|
304 |
|
|
regcache_raw_collect (regcache, E_A0_REGNUM,
|
305 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
|
306 |
|
|
break;
|
307 |
|
|
case E_A1_REGNUM:
|
308 |
|
|
regcache_raw_collect (regcache, E_A1_REGNUM,
|
309 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
|
310 |
|
|
break;
|
311 |
|
|
case E_A2_REGNUM:
|
312 |
|
|
regcache_raw_collect (regcache, E_A2_REGNUM,
|
313 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
|
314 |
|
|
break;
|
315 |
|
|
case E_A3_REGNUM:
|
316 |
|
|
regcache_raw_collect (regcache, E_A3_REGNUM,
|
317 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
|
318 |
|
|
break;
|
319 |
|
|
case E_SP_REGNUM:
|
320 |
|
|
regcache_raw_collect (regcache, E_SP_REGNUM,
|
321 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
|
322 |
|
|
break;
|
323 |
|
|
case E_PC_REGNUM:
|
324 |
|
|
regcache_raw_collect (regcache, E_PC_REGNUM,
|
325 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
|
326 |
|
|
break;
|
327 |
|
|
case E_MDR_REGNUM:
|
328 |
|
|
regcache_raw_collect (regcache, E_MDR_REGNUM,
|
329 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
|
330 |
|
|
break;
|
331 |
|
|
case E_PSW_REGNUM:
|
332 |
|
|
regcache_raw_collect (regcache, E_PSW_REGNUM,
|
333 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
|
334 |
|
|
break;
|
335 |
|
|
case E_LIR_REGNUM:
|
336 |
|
|
regcache_raw_collect (regcache, E_LIR_REGNUM,
|
337 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
|
338 |
|
|
break;
|
339 |
|
|
case E_LAR_REGNUM:
|
340 |
|
|
regcache_raw_collect (regcache, E_LAR_REGNUM,
|
341 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
|
342 |
|
|
break;
|
343 |
|
|
case E_MDRQ_REGNUM:
|
344 |
|
|
regcache_raw_collect (regcache, E_MDRQ_REGNUM,
|
345 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
|
346 |
|
|
break;
|
347 |
|
|
case E_E0_REGNUM:
|
348 |
|
|
regcache_raw_collect (regcache, E_E0_REGNUM,
|
349 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
|
350 |
|
|
break;
|
351 |
|
|
case E_E1_REGNUM:
|
352 |
|
|
regcache_raw_collect (regcache, E_E1_REGNUM,
|
353 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
|
354 |
|
|
break;
|
355 |
|
|
case E_E2_REGNUM:
|
356 |
|
|
regcache_raw_collect (regcache, E_E2_REGNUM,
|
357 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
|
358 |
|
|
break;
|
359 |
|
|
case E_E3_REGNUM:
|
360 |
|
|
regcache_raw_collect (regcache, E_E3_REGNUM,
|
361 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
|
362 |
|
|
break;
|
363 |
|
|
case E_E4_REGNUM:
|
364 |
|
|
regcache_raw_collect (regcache, E_E4_REGNUM,
|
365 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
|
366 |
|
|
break;
|
367 |
|
|
case E_E5_REGNUM:
|
368 |
|
|
regcache_raw_collect (regcache, E_E5_REGNUM,
|
369 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
|
370 |
|
|
break;
|
371 |
|
|
case E_E6_REGNUM:
|
372 |
|
|
regcache_raw_collect (regcache, E_E6_REGNUM,
|
373 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
|
374 |
|
|
break;
|
375 |
|
|
case E_E7_REGNUM:
|
376 |
|
|
regcache_raw_collect (regcache, E_E7_REGNUM,
|
377 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
|
378 |
|
|
break;
|
379 |
|
|
|
380 |
|
|
/* ssp, msp, and usp are inaccessible. */
|
381 |
|
|
case E_E8_REGNUM:
|
382 |
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
383 |
|
|
break;
|
384 |
|
|
case E_E9_REGNUM:
|
385 |
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
386 |
|
|
break;
|
387 |
|
|
case E_E10_REGNUM:
|
388 |
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
389 |
|
|
break;
|
390 |
|
|
case E_MCRH_REGNUM:
|
391 |
|
|
regcache_raw_collect (regcache, E_MCRH_REGNUM,
|
392 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
|
393 |
|
|
break;
|
394 |
|
|
case E_MCRL_REGNUM:
|
395 |
|
|
regcache_raw_collect (regcache, E_MCRL_REGNUM,
|
396 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
|
397 |
|
|
break;
|
398 |
|
|
case E_MCVF_REGNUM:
|
399 |
|
|
regcache_raw_collect (regcache, E_MCVF_REGNUM,
|
400 |
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
|
401 |
|
|
break;
|
402 |
|
|
case E_FPCR_REGNUM:
|
403 |
|
|
/* FPCR is numbered among the GP regs, but handled as an FP reg.
|
404 |
|
|
Do nothing. */
|
405 |
|
|
break;
|
406 |
|
|
case E_FPCR_REGNUM + 1:
|
407 |
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
408 |
|
|
break;
|
409 |
|
|
case E_FPCR_REGNUM + 2:
|
410 |
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
411 |
|
|
break;
|
412 |
|
|
default: /* An error, obviously, but should we error out? */
|
413 |
|
|
break;
|
414 |
|
|
case -1:
|
415 |
|
|
for (i = 0; i < MN10300_ELF_NGREG; i++)
|
416 |
|
|
am33_collect_gregset_method (regset, regcache, i, gregs, len);
|
417 |
|
|
break;
|
418 |
|
|
}
|
419 |
|
|
return;
|
420 |
|
|
}
|
421 |
|
|
|
422 |
|
|
/* Copy fp register values from regcache to regset. */
|
423 |
|
|
|
424 |
|
|
static void
|
425 |
|
|
am33_collect_fpregset_method (const struct regset *regset,
|
426 |
|
|
const struct regcache *regcache,
|
427 |
|
|
int regnum, void *fpregs, size_t len)
|
428 |
|
|
{
|
429 |
|
|
mn10300_elf_fpregset_t *fpregset = fpregs;
|
430 |
|
|
|
431 |
|
|
gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
|
432 |
|
|
|
433 |
|
|
if (regnum == -1)
|
434 |
|
|
{
|
435 |
|
|
int i;
|
436 |
|
|
for (i = 0; i < MN10300_ELF_NFPREG; i++)
|
437 |
|
|
am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
|
438 |
|
|
fpregs, len);
|
439 |
|
|
am33_collect_fpregset_method (regset, regcache,
|
440 |
|
|
E_FPCR_REGNUM, fpregs, len);
|
441 |
|
|
}
|
442 |
|
|
else if (regnum == E_FPCR_REGNUM)
|
443 |
|
|
regcache_raw_collect (regcache, E_FPCR_REGNUM,
|
444 |
|
|
&fpregset->fpcr);
|
445 |
|
|
else if (E_FS0_REGNUM <= regnum
|
446 |
|
|
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
447 |
|
|
regcache_raw_collect (regcache, regnum,
|
448 |
|
|
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
449 |
|
|
|
450 |
|
|
return;
|
451 |
|
|
}
|
452 |
|
|
|
453 |
|
|
/* Create a struct regset from a corefile register section. */
|
454 |
|
|
|
455 |
|
|
static const struct regset *
|
456 |
|
|
am33_regset_from_core_section (struct gdbarch *gdbarch,
|
457 |
|
|
const char *sect_name,
|
458 |
|
|
size_t sect_size)
|
459 |
|
|
{
|
460 |
|
|
/* We will call regset_alloc, and pass the names of the supply and
|
461 |
|
|
collect methods. */
|
462 |
|
|
|
463 |
|
|
if (sect_size == sizeof (mn10300_elf_fpregset_t))
|
464 |
|
|
return regset_alloc (gdbarch,
|
465 |
|
|
am33_supply_fpregset_method,
|
466 |
|
|
am33_collect_fpregset_method);
|
467 |
|
|
else
|
468 |
|
|
return regset_alloc (gdbarch,
|
469 |
|
|
am33_supply_gregset_method,
|
470 |
|
|
am33_collect_gregset_method);
|
471 |
|
|
}
|
472 |
|
|
|
473 |
|
|
static void
|
474 |
|
|
am33_linux_sigframe_cache_init (const struct tramp_frame *self,
|
475 |
|
|
struct frame_info *this_frame,
|
476 |
|
|
struct trad_frame_cache *this_cache,
|
477 |
|
|
CORE_ADDR func);
|
478 |
|
|
|
479 |
|
|
static const struct tramp_frame am33_linux_sigframe = {
|
480 |
|
|
SIGTRAMP_FRAME,
|
481 |
|
|
1,
|
482 |
|
|
{
|
483 |
|
|
/* mov 119,d0 */
|
484 |
|
|
{ 0x2c, -1 },
|
485 |
|
|
{ 0x77, -1 },
|
486 |
|
|
{ 0x00, -1 },
|
487 |
|
|
/* syscall 0 */
|
488 |
|
|
{ 0xf0, -1 },
|
489 |
|
|
{ 0xe0, -1 },
|
490 |
|
|
{ TRAMP_SENTINEL_INSN, -1 }
|
491 |
|
|
},
|
492 |
|
|
am33_linux_sigframe_cache_init
|
493 |
|
|
};
|
494 |
|
|
|
495 |
|
|
static const struct tramp_frame am33_linux_rt_sigframe = {
|
496 |
|
|
SIGTRAMP_FRAME,
|
497 |
|
|
1,
|
498 |
|
|
{
|
499 |
|
|
/* mov 173,d0 */
|
500 |
|
|
{ 0x2c, -1 },
|
501 |
|
|
{ 0xad, -1 },
|
502 |
|
|
{ 0x00, -1 },
|
503 |
|
|
/* syscall 0 */
|
504 |
|
|
{ 0xf0, -1 },
|
505 |
|
|
{ 0xe0, -1 },
|
506 |
|
|
{ TRAMP_SENTINEL_INSN, -1 }
|
507 |
|
|
},
|
508 |
|
|
am33_linux_sigframe_cache_init
|
509 |
|
|
};
|
510 |
|
|
|
511 |
|
|
/* Relevant struct definitions for signal handling...
|
512 |
|
|
|
513 |
|
|
From arch/mn10300/kernel/sigframe.h:
|
514 |
|
|
|
515 |
|
|
struct sigframe
|
516 |
|
|
{
|
517 |
|
|
void (*pretcode)(void);
|
518 |
|
|
int sig;
|
519 |
|
|
struct sigcontext *psc;
|
520 |
|
|
struct sigcontext sc;
|
521 |
|
|
struct fpucontext fpuctx;
|
522 |
|
|
unsigned long extramask[_NSIG_WORDS-1];
|
523 |
|
|
char retcode[8];
|
524 |
|
|
};
|
525 |
|
|
|
526 |
|
|
struct rt_sigframe
|
527 |
|
|
{
|
528 |
|
|
void (*pretcode)(void);
|
529 |
|
|
int sig;
|
530 |
|
|
struct siginfo *pinfo;
|
531 |
|
|
void *puc;
|
532 |
|
|
struct siginfo info;
|
533 |
|
|
struct ucontext uc;
|
534 |
|
|
struct fpucontext fpuctx;
|
535 |
|
|
char retcode[8];
|
536 |
|
|
};
|
537 |
|
|
|
538 |
|
|
From include/asm-mn10300/ucontext.h:
|
539 |
|
|
|
540 |
|
|
struct ucontext {
|
541 |
|
|
unsigned long uc_flags;
|
542 |
|
|
struct ucontext *uc_link;
|
543 |
|
|
stack_t uc_stack;
|
544 |
|
|
struct sigcontext uc_mcontext;
|
545 |
|
|
sigset_t uc_sigmask;
|
546 |
|
|
};
|
547 |
|
|
|
548 |
|
|
From include/asm-mn10300/sigcontext.h:
|
549 |
|
|
|
550 |
|
|
struct fpucontext {
|
551 |
|
|
unsigned long fs[32];
|
552 |
|
|
unsigned long fpcr;
|
553 |
|
|
};
|
554 |
|
|
|
555 |
|
|
struct sigcontext {
|
556 |
|
|
unsigned long d0;
|
557 |
|
|
unsigned long d1;
|
558 |
|
|
unsigned long d2;
|
559 |
|
|
unsigned long d3;
|
560 |
|
|
unsigned long a0;
|
561 |
|
|
unsigned long a1;
|
562 |
|
|
unsigned long a2;
|
563 |
|
|
unsigned long a3;
|
564 |
|
|
unsigned long e0;
|
565 |
|
|
unsigned long e1;
|
566 |
|
|
unsigned long e2;
|
567 |
|
|
unsigned long e3;
|
568 |
|
|
unsigned long e4;
|
569 |
|
|
unsigned long e5;
|
570 |
|
|
unsigned long e6;
|
571 |
|
|
unsigned long e7;
|
572 |
|
|
unsigned long lar;
|
573 |
|
|
unsigned long lir;
|
574 |
|
|
unsigned long mdr;
|
575 |
|
|
unsigned long mcvf;
|
576 |
|
|
unsigned long mcrl;
|
577 |
|
|
unsigned long mcrh;
|
578 |
|
|
unsigned long mdrq;
|
579 |
|
|
unsigned long sp;
|
580 |
|
|
unsigned long epsw;
|
581 |
|
|
unsigned long pc;
|
582 |
|
|
struct fpucontext *fpucontext;
|
583 |
|
|
unsigned long oldmask;
|
584 |
|
|
}; */
|
585 |
|
|
|
586 |
|
|
|
587 |
|
|
#define AM33_SIGCONTEXT_D0 0
|
588 |
|
|
#define AM33_SIGCONTEXT_D1 4
|
589 |
|
|
#define AM33_SIGCONTEXT_D2 8
|
590 |
|
|
#define AM33_SIGCONTEXT_D3 12
|
591 |
|
|
#define AM33_SIGCONTEXT_A0 16
|
592 |
|
|
#define AM33_SIGCONTEXT_A1 20
|
593 |
|
|
#define AM33_SIGCONTEXT_A2 24
|
594 |
|
|
#define AM33_SIGCONTEXT_A3 28
|
595 |
|
|
#define AM33_SIGCONTEXT_E0 32
|
596 |
|
|
#define AM33_SIGCONTEXT_E1 36
|
597 |
|
|
#define AM33_SIGCONTEXT_E2 40
|
598 |
|
|
#define AM33_SIGCONTEXT_E3 44
|
599 |
|
|
#define AM33_SIGCONTEXT_E4 48
|
600 |
|
|
#define AM33_SIGCONTEXT_E5 52
|
601 |
|
|
#define AM33_SIGCONTEXT_E6 56
|
602 |
|
|
#define AM33_SIGCONTEXT_E7 60
|
603 |
|
|
#define AM33_SIGCONTEXT_LAR 64
|
604 |
|
|
#define AM33_SIGCONTEXT_LIR 68
|
605 |
|
|
#define AM33_SIGCONTEXT_MDR 72
|
606 |
|
|
#define AM33_SIGCONTEXT_MCVF 76
|
607 |
|
|
#define AM33_SIGCONTEXT_MCRL 80
|
608 |
|
|
#define AM33_SIGCONTEXT_MCRH 84
|
609 |
|
|
#define AM33_SIGCONTEXT_MDRQ 88
|
610 |
|
|
#define AM33_SIGCONTEXT_SP 92
|
611 |
|
|
#define AM33_SIGCONTEXT_EPSW 96
|
612 |
|
|
#define AM33_SIGCONTEXT_PC 100
|
613 |
|
|
#define AM33_SIGCONTEXT_FPUCONTEXT 104
|
614 |
|
|
|
615 |
|
|
|
616 |
|
|
static void
|
617 |
|
|
am33_linux_sigframe_cache_init (const struct tramp_frame *self,
|
618 |
|
|
struct frame_info *this_frame,
|
619 |
|
|
struct trad_frame_cache *this_cache,
|
620 |
|
|
CORE_ADDR func)
|
621 |
|
|
{
|
622 |
|
|
CORE_ADDR sc_base, fpubase;
|
623 |
|
|
int i;
|
624 |
|
|
|
625 |
|
|
sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
|
626 |
|
|
if (self == &am33_linux_sigframe)
|
627 |
|
|
{
|
628 |
|
|
sc_base += 8;
|
629 |
|
|
sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
|
630 |
|
|
}
|
631 |
|
|
else
|
632 |
|
|
{
|
633 |
|
|
sc_base += 12;
|
634 |
|
|
sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
|
635 |
|
|
sc_base += 20;
|
636 |
|
|
}
|
637 |
|
|
|
638 |
|
|
trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
|
639 |
|
|
sc_base + AM33_SIGCONTEXT_D0);
|
640 |
|
|
trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
|
641 |
|
|
sc_base + AM33_SIGCONTEXT_D1);
|
642 |
|
|
trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
|
643 |
|
|
sc_base + AM33_SIGCONTEXT_D2);
|
644 |
|
|
trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
|
645 |
|
|
sc_base + AM33_SIGCONTEXT_D3);
|
646 |
|
|
|
647 |
|
|
trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
|
648 |
|
|
sc_base + AM33_SIGCONTEXT_A0);
|
649 |
|
|
trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
|
650 |
|
|
sc_base + AM33_SIGCONTEXT_A1);
|
651 |
|
|
trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
|
652 |
|
|
sc_base + AM33_SIGCONTEXT_A2);
|
653 |
|
|
trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
|
654 |
|
|
sc_base + AM33_SIGCONTEXT_A3);
|
655 |
|
|
|
656 |
|
|
trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
|
657 |
|
|
sc_base + AM33_SIGCONTEXT_E0);
|
658 |
|
|
trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
|
659 |
|
|
sc_base + AM33_SIGCONTEXT_E1);
|
660 |
|
|
trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
|
661 |
|
|
sc_base + AM33_SIGCONTEXT_E2);
|
662 |
|
|
trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
|
663 |
|
|
sc_base + AM33_SIGCONTEXT_E3);
|
664 |
|
|
trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
|
665 |
|
|
sc_base + AM33_SIGCONTEXT_E4);
|
666 |
|
|
trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
|
667 |
|
|
sc_base + AM33_SIGCONTEXT_E5);
|
668 |
|
|
trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
|
669 |
|
|
sc_base + AM33_SIGCONTEXT_E6);
|
670 |
|
|
trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
|
671 |
|
|
sc_base + AM33_SIGCONTEXT_E7);
|
672 |
|
|
|
673 |
|
|
trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
|
674 |
|
|
sc_base + AM33_SIGCONTEXT_LAR);
|
675 |
|
|
trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
|
676 |
|
|
sc_base + AM33_SIGCONTEXT_LIR);
|
677 |
|
|
trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
|
678 |
|
|
sc_base + AM33_SIGCONTEXT_MDR);
|
679 |
|
|
trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
|
680 |
|
|
sc_base + AM33_SIGCONTEXT_MCVF);
|
681 |
|
|
trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
|
682 |
|
|
sc_base + AM33_SIGCONTEXT_MCRL);
|
683 |
|
|
trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
|
684 |
|
|
sc_base + AM33_SIGCONTEXT_MDRQ);
|
685 |
|
|
|
686 |
|
|
trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
|
687 |
|
|
sc_base + AM33_SIGCONTEXT_SP);
|
688 |
|
|
trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
|
689 |
|
|
sc_base + AM33_SIGCONTEXT_EPSW);
|
690 |
|
|
trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
|
691 |
|
|
sc_base + AM33_SIGCONTEXT_PC);
|
692 |
|
|
|
693 |
|
|
fpubase = get_frame_memory_unsigned (this_frame,
|
694 |
|
|
sc_base + AM33_SIGCONTEXT_FPUCONTEXT, 4);
|
695 |
|
|
if (fpubase)
|
696 |
|
|
{
|
697 |
|
|
for (i = 0; i < 32; i++)
|
698 |
|
|
{
|
699 |
|
|
trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
|
700 |
|
|
fpubase + 4 * i);
|
701 |
|
|
}
|
702 |
|
|
trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
|
703 |
|
|
}
|
704 |
|
|
|
705 |
|
|
trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
|
706 |
|
|
}
|
707 |
|
|
|
708 |
|
|
/* AM33 GNU/Linux osabi has been recognized.
|
709 |
|
|
Now's our chance to register our corefile handling. */
|
710 |
|
|
|
711 |
|
|
static void
|
712 |
|
|
am33_linux_init_osabi (struct gdbarch_info gdbinfo, struct gdbarch *gdbarch)
|
713 |
|
|
{
|
714 |
|
|
set_gdbarch_regset_from_core_section (gdbarch,
|
715 |
|
|
am33_regset_from_core_section);
|
716 |
|
|
set_solib_svr4_fetch_link_map_offsets
|
717 |
|
|
(gdbarch, svr4_ilp32_fetch_link_map_offsets);
|
718 |
|
|
|
719 |
|
|
tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
|
720 |
|
|
tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
|
721 |
|
|
}
|
722 |
|
|
|
723 |
|
|
/* Provide a prototype to silence -Wmissing-prototypes. */
|
724 |
|
|
extern initialize_file_ftype _initialize_mn10300_linux_tdep;
|
725 |
|
|
|
726 |
|
|
void
|
727 |
|
|
_initialize_mn10300_linux_tdep (void)
|
728 |
|
|
{
|
729 |
|
|
gdbarch_register_osabi (bfd_arch_mn10300, 0,
|
730 |
|
|
GDB_OSABI_LINUX, am33_linux_init_osabi);
|
731 |
|
|
}
|
732 |
|
|
|