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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [or32-tdep.c] - Blame information for rev 227

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1 227 jeremybenn
/* Target-dependent code for the 32-bit OpenRISC 1000, for the GNU Debugger.
2
 
3
   Copyright 1988-2008, Free Software Foundation, Inc.
4
   Copyright (C) 2008, 2010 Embecosm Limited
5
 
6
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
7
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
9
 
10
   This file is part of GDB.
11
 
12
   This program is free software; you can redistribute it and/or modify it
13
   under the terms of the GNU General Public License as published by the Free
14
   Software Foundation; either version 3 of the License, or (at your option)
15
   any later version.
16
 
17
   This program is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
20
   more details.
21
 
22
   You should have received a copy of the GNU General Public License along
23
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
24
 
25
/*-----------------------------------------------------------------------------
26
   This version for the OpenRISC 1000 architecture is a rewrite by Jeremy
27
   Bennett of the old GDB 5.3 interface to make use of gdbarch for GDB 6.8.
28
 
29
   The code tries to follow the GDB coding style.
30
 
31
   Commenting is Doxygen compatible.
32
 
33
   Much has been stripped out in the interests of getting a basic working
34
   system. This is described as the OpenRISC 1000 target architecture, so
35
   should work with 16, 32 and 64 bit versions of that architecture and should
36
   work whether or not they have floating point and/or vector registers.
37
 
38
   There was never a capability to run simulator commands (no remote target
39
   implemented the required function), so that has been removed.
40
 
41
   The info trace command has been removed. The meaning of this is not clear -
42
   it relies on a value in register 255 of the debug group, which is
43
   undocumented.
44
 
45
   All the hardware trace has been removed for the time being. The new debug
46
   interface does not support hardware trace, so there is no plan to reinstate
47
   this functionality.
48
 
49
   Support for multiple contexts (which was rudimentary, and not working) has
50
   been removed. */
51
/*---------------------------------------------------------------------------*/
52
 
53
#include "demangle.h"
54
#include "defs.h"
55
#include "gdb_string.h"
56
#include "frame.h"
57
#include "inferior.h"
58
#include "symtab.h"
59
#include "value.h"
60
#include "gdbcmd.h"
61
#include "language.h"
62
#include "gdbcore.h"
63
#include "symfile.h"
64
#include "objfiles.h"
65
#include "gdbtypes.h"
66
#include "target.h"
67
#include "regcache.h"
68
 
69
#include "opcode/or32.h"
70
#include "or32-tdep.h"
71
 
72
#include "safe-ctype.h"
73
#include "block.h"
74
#include "reggroups.h"
75
#include "arch-utils.h"
76
#include "frame.h"
77
#include "frame-unwind.h"
78
#include "frame-base.h"
79
#include "dwarf2-frame.h"
80
#include "trad-frame.h"
81
 
82
#include <inttypes.h>
83
 
84
 
85
 
86
 
87
/* Support functions for the architecture definition */
88
 
89
 
90
/*----------------------------------------------------------------------------*/
91
/*!Get an instruction
92
 
93
   This reads from memory. The old version relied on the frame, this relies
94
   just on the architecture. The old version also guaranteed not to get a
95
   software breakpoint if one had been set. However that seems to happen just
96
   before execution and is removed immediately after, so we believe should not
97
   happen. The old function from GDB 6.8 to do this has been deleted.
98
 
99
   @param[in] gdbarch  Architecture for which we are getting the instruction.
100
   @param[in] addr     Address from which to get the instruction
101
 
102
   @return  The instruction */
103
/*---------------------------------------------------------------------------*/
104
 
105
static ULONGEST
106
or32_fetch_instruction (struct gdbarch *gdbarch,
107
                        CORE_ADDR       addr)
108
{
109
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
110
  char            buf[OR32_INSTLEN];
111
  int             status;
112
 
113
  status = target_read_memory (addr, buf, OR32_INSTLEN);
114
 
115
  if (status)
116
    {
117
      memory_error (status, addr);
118
    }
119
 
120
  return  extract_unsigned_integer (buf, OR32_INSTLEN, byte_order);
121
 
122
}       /* or32_fetch_instruction() */
123
 
124
 
125
/*---------------------------------------------------------------------------*/
126
/*!Generic function to read bits from an instruction
127
 
128
   printf style. Basic syntax
129
 
130
      or32_analyse_inst (inst, format, &arg1, &arg2 ...)
131
 
132
   Format string can contain the following characters:
133
 
134
   - SPACE:  Ignored, just for layout
135
   - 0:      Match with a zero bit
136
   - 1:      Match with a one bit
137
   - %<n>b:  Match <n> bits to the next argument (n decimal)
138
 
139
   If the arg corresponding to a bit field is non-null, the value will be
140
   assigned to that argument (using NULL allows fields to be skipped).
141
 
142
   Any bad string will cause a fatal error. These are constant strings, so
143
   should be correct.
144
 
145
   The bit field must be 32 bits long. A failure here will cause a fatal error
146
   for the same reason.
147
 
148
   @note The format string is presented MS field to LS field, left to
149
         right. This means that it is read lowest numbered char first.
150
 
151
   @note Some of the arg fields may be populated, even if recognition
152
         ultimately fails.
153
 
154
   @param[in]  inst    The instruction to analyse
155
   @param[in]  format  The format string
156
   @param[out] ...     Argument fields
157
 
158
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
159
/*---------------------------------------------------------------------------*/
160
static int
161
or32_analyse_inst (uint32_t    inst,
162
                   const char *format,
163
                   ...)
164
{
165
  /* Break out each field in turn, validating as we go. */
166
  va_list     ap;
167
 
168
  int         i;
169
  int         iptr = 0;                  /* Instruction pointer */
170
 
171
  va_start (ap, format);
172
 
173
  for (i = 0; 0 != format[i];)
174
    {
175
      const char *start_ptr;
176
      char       *end_ptr;
177
 
178
      uint32_t    bits;                 /* Bit substring of interest */
179
      uint32_t    width;                /* Substring width */
180
      uint32_t   *arg_ptr;
181
 
182
      switch (format[i])
183
        {
184
        case ' ': i++; break;   /* Formatting: ignored */
185
 
186
        case '0': case '1':     /* Constant bit field */
187
          bits = (inst >> (OR32_INSTBITLEN - iptr - 1)) & 0x1;
188
 
189
          if ((format[i] - '0') != bits)
190
            {
191
              return  0;
192
            }
193
 
194
          iptr++;
195
          i++;
196
          break;
197
 
198
        case '%':               /* Bit field */
199
          i++;
200
          start_ptr = &(format[i]);
201
          width     = strtoul (start_ptr, &end_ptr, 10);
202
 
203
          /* Check we got something, and if so skip on */
204
          if (start_ptr == end_ptr)
205
            {
206
              fatal ("bitstring \"%s\" at offset %d has no length field.\n",
207
                     format, i);
208
            }
209
 
210
          i += end_ptr - start_ptr;
211
 
212
          /* Look for and skip the terminating 'b'. If it's not there, we
213
             still give a fatal error, because these are fixed strings that
214
             just should not be wrong. */
215
          if ('b' != format[i++])
216
            {
217
              fatal ("bitstring \"%s\" at offset %d has no terminating 'b'.\n",
218
                     format, i);
219
            }
220
 
221
          /* Break out the field. There is a special case with a bit width of
222
             32. */
223
          if (32 == width)
224
            {
225
              bits = inst;
226
            }
227
          else
228
            {
229
              bits = (inst >> (OR32_INSTBITLEN - iptr - width)) & ((1 << width) - 1);
230
            }
231
 
232
          arg_ptr   = va_arg (ap, uint32_t *);
233
          *arg_ptr  = bits;
234
          iptr     += width;
235
          break;
236
 
237
        default:
238
          fatal ("invalid character in bitstring \"%s\" at offset %d.\n",
239
                 format, i);
240
          break;
241
        }
242
    }
243
 
244
  /* Is the length OK? */
245
  gdb_assert (OR32_INSTBITLEN == iptr);
246
 
247
  return  1;                            /* We succeeded */
248
 
249
}       /* or32_analyse_inst () */
250
 
251
 
252
/*---------------------------------------------------------------------------*/
253
/*!Analyse a l.addi instruction
254
 
255
   General form is:
256
 
257
     l.addi  rD,rA,I
258
 
259
   Makes use of the generic analysis function (@see or32_analyse_inst ()).
260
 
261
   @param[in]  inst      The instruction to analyse.
262
   @param[out] rd_ptr    Pointer to the rD value.
263
   @param[out] ra_ptr    Pointer to the rA value.
264
   @param[out] simm_ptr  Pointer to the signed immediate value.
265
 
266
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
267
/*---------------------------------------------------------------------------*/
268
static int
269
or32_analyse_l_addi (uint32_t      inst,
270
                     unsigned int *rd_ptr,
271
                     unsigned int *ra_ptr,
272
                     int          *simm_ptr)
273
{
274
  /* Instruction fields */
275
  uint32_t  rd, ra, i;
276
 
277
  if (or32_analyse_inst (inst, "10 0111 %5b %5b %16b", &rd, &ra, &i))
278
    {
279
      /* Found it. Construct the result fields */
280
      *rd_ptr   = (unsigned int) rd;
281
      *ra_ptr   = (unsigned int) ra;
282
      *simm_ptr = (int) (((i & 0x8000) == 0x8000) ? 0xffff0000 | i : i);
283
 
284
      return  1;                /* Success */
285
    }
286
  else
287
    {
288
      return  0;         /* Failure */
289
    }
290
}       /* or32_analyse_l_addi () */
291
 
292
 
293
/*---------------------------------------------------------------------------*/
294
/*!Analyse a l.sw instruction
295
 
296
   General form is:
297
 
298
     l.sw  I(rA),rB
299
 
300
   Makes use of the generic analysis function (@see or32_analyse_inst ()).
301
 
302
   @param[in]  inst      The instruction to analyse.
303
   @param[out] simm_ptr  Pointer to the signed immediate value.
304
   @param[out] ra_ptr    Pointer to the rA value.
305
   @param[out] rb_ptr    Pointer to the rB value.
306
 
307
   @return  1 (TRUE) if the instruction matches, 0 (FALSE) otherwise.        */
308
/*---------------------------------------------------------------------------*/
309
static int
310
or32_analyse_l_sw (uint32_t      inst,
311
                   int          *simm_ptr,
312
                   unsigned int *ra_ptr,
313
                   unsigned int *rb_ptr)
314
{
315
  /* Instruction fields */
316
  uint32_t  ihi, ilo, ra, rb;
317
 
318
  if (or32_analyse_inst (inst, "11 0101 %5b %5b %5b %11b", &ihi, &ra, &rb,
319
                         &ilo))
320
 
321
    {
322
      /* Found it. Construct the result fields */
323
      *simm_ptr  = (int) ((ihi << 11) | ilo);
324
      *simm_ptr |= ((ihi & 0x10) == 0x10) ? 0xffff0000 : 0;
325
 
326
      *ra_ptr    = (unsigned int) ra;
327
      *rb_ptr    = (unsigned int) rb;
328
 
329
      return  1;                /* Success */
330
    }
331
  else
332
    {
333
      return  0;         /* Failure */
334
    }
335
}       /* or32_analyse_l_sw () */
336
 
337
 
338
 
339
 
340
/* Functions defining the architecture */
341
 
342
 
343
/*----------------------------------------------------------------------------*/
344
/*!Determine the return convention used for a given type
345
 
346
   Optionally, fetch or set the return value via "readbuf" or "writebuf"
347
   respectively using "regcache" for the register values.
348
 
349
   The OpenRISC 1000 returns scalar values via R11 and (for 64 bit values on
350
   32 bit architectures) R12. Structs and unions are returned by reference,
351
   with the address in R11
352
 
353
   The result returned is independent of the function type, so we ignore that.
354
 
355
   Throughout use read_memory(), not target_read_memory(), since the address
356
   may be invalid and we want an error reported (read_memory() is
357
   target_read_memory() with error reporting).
358
 
359
   @todo This implementation is labelled OR32, but in fact is just for the 32
360
         bit version, OR32. This should be made explicit
361
 
362
   @param[in]  gdbarch   The GDB architecture being used
363
   @param[in]  functype  The type of the function to be called (may be NULL)
364
   @param[in]  valtype   The type of the entity to be returned
365
   @param[in]  regcache  The register cache
366
   @param[in]  readbuf   Buffer into which the return value should be written
367
   @param[out] writebuf  Buffer from which the return value should be written
368
 
369
   @return  The type of return value */
370
/*---------------------------------------------------------------------------*/
371
 
372
static enum return_value_convention
373
or32_return_value (struct gdbarch  *gdbarch,
374
                   struct type     *functype,
375
                   struct type     *valtype,
376
                   struct regcache *regcache,
377
                   gdb_byte        *readbuf,
378
                   const gdb_byte  *writebuf)
379
{
380
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
381
  enum type_code  rv_type    = TYPE_CODE (valtype);
382
  unsigned int    rv_size    = TYPE_LENGTH (valtype);
383
  ULONGEST        tmp;
384
 
385
  /* Deal with struct/union and large scalars first. Large (> 4 byte) scalars
386
     are returned via a pointer (despite what is says in the architecture
387
     document). Result pointed to by R11 */
388
 
389
  if((TYPE_CODE_STRUCT == rv_type) ||
390
     (TYPE_CODE_UNION  == rv_type) ||
391
     (rv_size          >  4))
392
    {
393
      if (readbuf)
394
        {
395
          regcache_cooked_read_unsigned (regcache, OR32_RV_REGNUM, &tmp);
396
          read_memory (tmp, readbuf, rv_size);
397
        }
398
      if (writebuf)
399
        {
400
          regcache_cooked_read_unsigned (regcache, OR32_RV_REGNUM, &tmp);
401
          write_memory (tmp, writebuf, rv_size);
402
        }
403
 
404
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
405
    }
406
 
407
  /* 1-4 byte scalars are returned in R11 */
408
 
409
  if (readbuf)
410
    {
411
      regcache_cooked_read_unsigned (regcache, OR32_RV_REGNUM, &tmp);
412
      store_unsigned_integer (readbuf, rv_size, byte_order, tmp);
413
    }
414
  if (writebuf)
415
    {
416
      gdb_byte buf[4];
417
      memset (buf, 0, sizeof (buf));     /* Pad with zeros if < 4 bytes */
418
 
419
      if (BFD_ENDIAN_BIG == byte_order)
420
        {
421
          memcpy (buf + sizeof (buf) - rv_size, writebuf, rv_size);
422
        }
423
      else
424
        {
425
          memcpy (buf,                          writebuf, rv_size);
426
        }
427
 
428
      regcache_cooked_write (regcache, OR32_RV_REGNUM, buf);
429
    }
430
 
431
  return RETURN_VALUE_REGISTER_CONVENTION;
432
 
433
}       /* or32_return_value() */
434
 
435
 
436
/*----------------------------------------------------------------------------*/
437
/*!Determine the instruction to use for a breakpoint.
438
 
439
   Given the address at which to insert a breakpoint (bp_addr), what will
440
   that breakpoint be?
441
 
442
   For or32, we have a breakpoint instruction. Since all or32 instructions
443
   are 32 bits, this is all we need, regardless of address.
444
 
445
   @param[in]  gdbarch  The GDB architecture being used
446
   @param[in]  bp_addr  The breakpoint address in question
447
   @param[out] bp_size  The size of instruction selected
448
 
449
   @return  The chosen breakpoint instruction */
450
/*---------------------------------------------------------------------------*/
451
 
452
static const gdb_byte *
453
or32_breakpoint_from_pc (struct gdbarch *gdbarch,
454
                         CORE_ADDR      *bp_addr,
455
                         int            *bp_size)
456
{
457
  static const gdb_byte breakpoint[] = OR32_BRK_INSTR_STRUCT;
458
 
459
  *bp_size = OR32_INSTLEN;
460
  return breakpoint;
461
 
462
}       /* or32_breakpoint_from_pc() */
463
 
464
 
465
/*----------------------------------------------------------------------------*/
466
/*!Determine if we are executing a delay slot
467
 
468
   Looks at the instruction at the previous instruction to see if it was one
469
   with a delay slot. But it also has to be the address prior to NPC, because
470
   we may have just taken an exception.
471
 
472
   @param[in] gdbarch     The GDB architecture being used
473
   @param[in] this_frame  Information about THIS frame
474
 
475
   @return  1 (true) if this instruction is executing a delay slot, 0 (false)
476
   otherwise. */
477
/*--------------------------------------------------------------------------*/
478
 
479
static int
480
or32_single_step_through_delay( struct gdbarch    *gdbarch,
481
                                struct frame_info *this_frame )
482
{
483
  struct regcache   *regcache = get_current_regcache ();
484
  ULONGEST           val;
485
  CORE_ADDR          ppc;
486
  CORE_ADDR          npc;
487
  int                index;
488
 
489
  /* Get and the previous and current instruction addresses. If they are not
490
     adjacent, we cannot be in a delay slot. */
491
  regcache_cooked_read_unsigned (regcache, OR32_PPC_REGNUM, &val);
492
  ppc        = (CORE_ADDR) val;
493
  regcache_cooked_read_unsigned (regcache, OR32_NPC_REGNUM, &val);
494
  npc        = (CORE_ADDR) val;
495
 
496
  if (0x4 != (npc - ppc))
497
    {
498
      return  0;
499
    }
500
 
501
  /* Decode the previous instruction to see if it was a branch or a jump, and
502
     hence we are in a delay slot. */
503
  index = insn_decode (or32_fetch_instruction (gdbarch, ppc));
504
  return  or32_opcodes[index].flags & OR32_IF_DELAY;
505
 
506
}       /* or32_single_step_through_delay() */
507
 
508
 
509
/*----------------------------------------------------------------------------*/
510
/*!Read a pseudo register
511
 
512
   Since we have no pseudo registers this is a null function for now.
513
 
514
   @todo The floating point and vector registers ought to be done as
515
         pseudo-registers.
516
 
517
   @param[in]  gdbarch   The GDB architecture to consider
518
   @param[in]  regcache  The cached register values as an array
519
   @param[in]  regnum    The register to read
520
   @param[out] buf       A buffer to put the result in */
521
/*---------------------------------------------------------------------------*/
522
 
523
static void
524
or32_pseudo_register_read (struct gdbarch  *gdbarch,
525
                           struct regcache *regcache,
526
                           int              regnum,
527
                           gdb_byte        *buf)
528
{
529
  return;
530
 
531
}       /* or32_pseudo_register_read() */
532
 
533
 
534
/*----------------------------------------------------------------------------*/
535
/*!Write a pseudo register
536
 
537
   Since we have no pseudo registers this is a null function for now.
538
 
539
   @todo The floating point and vector registers ought to be done as
540
         pseudo-registers.
541
 
542
   @param[in] gdbarch   The GDB architecture to consider
543
   @param[in] regcache  The cached register values as an array
544
   @param[in] regnum    The register to read
545
   @param[in] buf       A buffer with the value to write */
546
/*---------------------------------------------------------------------------*/
547
 
548
static void
549
or32_pseudo_register_write (struct gdbarch  *gdbarch,
550
                            struct regcache *regcache,
551
                            int              regnum,
552
                            const gdb_byte  *buf)
553
{
554
  return;
555
 
556
}       /* or32_pseudo_register_write() */
557
 
558
 
559
/*----------------------------------------------------------------------------*/
560
/*!Return the register name for the OpenRISC 1000 architecture
561
 
562
   This version converted to ANSI C, made static and incorporates the static
563
   table of register names (this is the only place it is referenced).
564
 
565
   @todo The floating point and vector registers ought to be done as
566
         pseudo-registers.
567
 
568
   @param[in] gdbarch  The GDB architecture being used
569
   @param[in] regnum    The register number
570
 
571
   @return  The textual name of the register */
572
/*---------------------------------------------------------------------------*/
573
 
574
static const char *
575
or32_register_name (struct gdbarch *gdbarch,
576
                    int             regnum)
577
{
578
  static char *or32_gdb_reg_names[OR32_TOTAL_NUM_REGS] =
579
    {
580
      /* general purpose registers */
581
      "gpr0",  "gpr1",  "gpr2",  "gpr3",  "gpr4",  "gpr5",  "gpr6",  "gpr7",
582
      "gpr8",  "gpr9",  "gpr10", "gpr11", "gpr12", "gpr13", "gpr14", "gpr15",
583
      "gpr16", "gpr17", "gpr18", "gpr19", "gpr20", "gpr21", "gpr22", "gpr23",
584
      "gpr24", "gpr25", "gpr26", "gpr27", "gpr28", "gpr29", "gpr30", "gpr31",
585
 
586
      /* previous program counter, next program counter and status register */
587
      "ppc",   "npc",   "sr"
588
 
589
      /* Floating point and vector registers may appear as pseudo registers in
590
         the future. */
591
    };
592
 
593
  return or32_gdb_reg_names[regnum];
594
 
595
}       /* or32_register_name() */
596
 
597
 
598
/*----------------------------------------------------------------------------*/
599
/*!Identify the type of a register
600
 
601
   @todo I don't fully understand exactly what this does, but I think this
602
         makes sense!
603
 
604
   @param[in] arch     The GDB architecture to consider
605
   @param[in] regnum   The register to identify
606
 
607
   @return  The type of the register */
608
/*---------------------------------------------------------------------------*/
609
 
610
static struct type *
611
or32_register_type (struct gdbarch *arch,
612
                    int             regnum)
613
{
614
  static struct type *void_func_ptr = NULL;
615
  static struct type *void_ptr      = NULL;
616
 
617
  /* Set up the static pointers once, the first time*/
618
  if (NULL == void_func_ptr)
619
    {
620
      struct type *void_type = builtin_type (arch)->builtin_void;
621
 
622
      void_ptr      = lookup_pointer_type (void_type);
623
      void_func_ptr = lookup_pointer_type (lookup_function_type (void_type));
624
    }
625
 
626
  if((regnum >= 0) && (regnum < OR32_TOTAL_NUM_REGS))
627
    {
628
      switch (regnum)
629
        {
630
        case OR32_PPC_REGNUM:
631
        case OR32_NPC_REGNUM:
632
          return void_func_ptr;                 /* Pointer to code */
633
 
634
        case OR32_SP_REGNUM:
635
        case OR32_FP_REGNUM:
636
          return void_ptr;                              /* Pointer to data */
637
 
638
        default:
639
          return builtin_type (arch)->builtin_uint32;   /* Data */
640
        }
641
    }
642
 
643
  internal_error (__FILE__, __LINE__,
644
                  _("or32_register_type: illegal register number %d"), regnum);
645
 
646
}       /* or32_register_type() */
647
 
648
 
649
/*----------------------------------------------------------------------------*/
650
/*!Handle the "info register" command
651
 
652
   Print the identified register, unless it is -1, in which case print all
653
   the registers. If all is 1 means all registers, otherwise only the core
654
   GPRs.
655
 
656
   @todo At present all registers are printed with the default method. Should
657
         there be something special for FP registers?
658
 
659
   @param[in] gdbarch  The GDB architecture being used
660
   @param[in] file     File handle for use with any custom I/O
661
   @param[in] frame    Frame info for use with custom output
662
   @param[in] regnum   Register of interest, or -1 if all registers
663
   @param[in] all      1 if all means all, 0 if all means just GPRs
664
 
665
   @return  The aligned stack frame address */
666
/*---------------------------------------------------------------------------*/
667
 
668
static void
669
or32_registers_info (struct gdbarch    *gdbarch,
670
                     struct ui_file    *file,
671
                     struct frame_info *frame,
672
                     int                regnum,
673
                     int                all)
674
{
675
  if (-1 == regnum)
676
    {
677
      /* Do all (valid) registers */
678
      unsigned int  lim = all ? OR32_NUM_REGS : OR32_MAX_GPR_REGS;
679
 
680
      for (regnum = 0; regnum < lim; regnum++) {
681
        if ('\0' != *(or32_register_name (gdbarch, regnum)))
682
          {
683
            or32_registers_info (gdbarch, file, frame, regnum, all);
684
          }
685
      }
686
    }
687
  else
688
    {
689
      /* Do one specified register - if it is part of this architecture */
690
      if ('\0' == *(or32_register_name (gdbarch, regnum)))
691
        {
692
          error ("Not a valid register for the current processor type");
693
        }
694
      else
695
        {
696
          default_print_registers_info (gdbarch, file, frame, regnum, all);
697
        }
698
    }
699
}       /* or32_registers_info() */
700
 
701
 
702
/*----------------------------------------------------------------------------*/
703
/*!Identify if a register belongs to a specified group
704
 
705
   Return true if the specified register is a member of the specified
706
   register group.
707
 
708
   These are the groups of registers that can be displayed via "info reg".
709
 
710
   @todo The Vector and Floating Point registers ought to be displayed as
711
         pseudo-registers.
712
 
713
   @param[in] gdbarch  The GDB architecture to consider
714
   @param[in] regnum   The register to consider
715
   @param[in] group    The group to consider
716
 
717
   @return  True (1) if regnum is a member of group */
718
/*---------------------------------------------------------------------------*/
719
 
720
static int
721
or32_register_reggroup_p (struct gdbarch  *gdbarch,
722
                          int              regnum,
723
                          struct reggroup *group)
724
{
725
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
726
 
727
  /* All register group */
728
  if (group == all_reggroup)
729
    {
730
      return ((regnum >= 0) &&
731
              (regnum < OR32_TOTAL_NUM_REGS) &&
732
              (or32_register_name (gdbarch, regnum)[0] != '\0'));
733
    }
734
 
735
  /* For now everything except the PC */
736
  if (group == general_reggroup)
737
    {
738
      return ((regnum >= OR32_ZERO_REGNUM) &&
739
              (regnum <  tdep->num_gpr_regs) &&
740
              (regnum != OR32_PPC_REGNUM) &&
741
              (regnum != OR32_NPC_REGNUM));
742
    }
743
 
744
  if (group == float_reggroup)
745
    {
746
      return 0;                  /* No float regs.  */
747
    }
748
 
749
  if (group == vector_reggroup)
750
    {
751
      return 0;                  /* No vector regs.  */
752
    }
753
 
754
  /* For any that are not handled above.  */
755
  return default_register_reggroup_p (gdbarch, regnum, group);
756
 
757
}       /* or32_register_reggroup_p() */
758
 
759
 
760
/*----------------------------------------------------------------------------*/
761
/*!Skip a function prolog
762
 
763
   If the input address, PC, is in a function prologue, return the address of
764
   the end of the prologue, otherwise return the input  address.
765
 
766
   @see For details of the stack frame, see the function
767
   or32_frame_cache().
768
 
769
   This function reuses the helper functions from or32_frame_cache() to
770
   locate the various parts of the prolog, any or all of which may be missing.
771
 
772
   @param[in] gdbarch  The GDB architecture being used
773
   @param[in] pc       Current program counter
774
 
775
   @return  The address of the end of the prolog if the PC is in a function
776
            prologue, otherwise the input  address.                           */
777
/*----------------------------------------------------------------------------*/
778
 
779
static CORE_ADDR
780
or32_skip_prologue (struct gdbarch *gdbarch,
781
                    CORE_ADDR       pc)
782
{
783
  CORE_ADDR     addr;
784
  uint32_t      inst;
785
 
786
  unsigned int  ra, rb, rd;             /* For instruction analysis */
787
  int           simm;
788
 
789
  int           frame_size = 0;
790
 
791
  /* Try using SAL first if we have symbolic information available. */
792
  if (find_pc_partial_function (pc, NULL, NULL, NULL))
793
    {
794
      CORE_ADDR  prologue_end = skip_prologue_using_sal( gdbarch, pc );
795
 
796
      return  (prologue_end > pc) ? prologue_end : pc;
797
    }
798
 
799
  /* Look to see if we can find any of the standard prologue sequence. All
800
     quite difficult, since any or all of it may be missing. So this is just a
801
     best guess! */
802
  addr = pc;                            /* Where we have got to */
803
  inst = or32_fetch_instruction (gdbarch, addr);
804
 
805
  /* Look for the new stack pointer being set up. */
806
  if (or32_analyse_l_addi (inst, &rd, &ra, &simm) &&
807
      (OR32_SP_REGNUM == rd) && (OR32_SP_REGNUM == ra) &&
808
      (simm < 0) && (0 == (simm % 4)))
809
    {
810
      frame_size  = -simm;
811
      addr       += OR32_INSTLEN;
812
      inst        = or32_fetch_instruction (gdbarch, addr);
813
    }
814
 
815
  /* Look for the frame pointer being manipulated. */
816
  if (or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
817
      (OR32_SP_REGNUM == ra) && (OR32_FP_REGNUM == rb) &&
818
      (simm >= 0) && (0 == (simm % 4)))
819
    {
820
      addr += OR32_INSTLEN;
821
      inst  = or32_fetch_instruction (gdbarch, addr);
822
 
823
      gdb_assert (or32_analyse_l_addi (inst, &rd, &ra, &simm) &&
824
                  (OR32_FP_REGNUM == rd) && (OR32_SP_REGNUM == ra) &&
825
                  (simm == frame_size));
826
 
827
      addr += OR32_INSTLEN;
828
      inst  = or32_fetch_instruction (gdbarch, addr);
829
    }
830
 
831
  /* Look for the link register being saved */
832
  if (or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
833
      (OR32_SP_REGNUM == ra) && (OR32_LR_REGNUM == rb) &&
834
      (simm >= 0) && (0 == (simm % 4)))
835
    {
836
      addr += OR32_INSTLEN;
837
      inst  = or32_fetch_instruction (gdbarch, addr);
838
    }
839
 
840
  /* Look for callee-saved register being saved. The register must be one
841
     of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
842
     r24, r26, r28, r30).*/
843
  while (1)
844
    {
845
      if (or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
846
          (OR32_SP_REGNUM == ra) && (rb >= OR32_FIRST_SAVED_REGNUM) &&
847
          (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
848
        {
849
          addr += OR32_INSTLEN;
850
          inst  = or32_fetch_instruction (gdbarch, addr);
851
        }
852
      else
853
        {
854
          /* Nothing else to look for. We have found the end of the prologue. */
855
          return  addr;
856
        }
857
    }
858
}       /* or32_skip_prologue() */
859
 
860
 
861
/*----------------------------------------------------------------------------*/
862
/*!Align the stack frame
863
 
864
   OpenRISC 1000 uses a falling stack frame, so this aligns down to the
865
   nearest 8 bytes. Useful when we'be building a dummy frame.
866
 
867
   @param[in] gdbarch  The GDB architecture being used
868
   @param[in] sp       Current stack pointer
869
 
870
   @return  The aligned stack frame address */
871
/*---------------------------------------------------------------------------*/
872
 
873
static CORE_ADDR
874
or32_frame_align (struct gdbarch *gdbarch,
875
                  CORE_ADDR       sp)
876
{
877
  return align_down (sp, OR32_STACK_ALIGN);
878
 
879
}       /* or32_frame_align() */
880
 
881
 
882
/*----------------------------------------------------------------------------*/
883
/*!Unwind the program counter from a stack frame
884
 
885
   This just uses the built in frame unwinder
886
 
887
   @param[in] gdbarch     The GDB architecture being used
888
   @param[in] next_frame  Frame info for the NEXT frame
889
 
890
   @return  The program counter for THIS frame */
891
/*---------------------------------------------------------------------------*/
892
 
893
static CORE_ADDR
894
or32_unwind_pc (struct gdbarch    *gdbarch,
895
                struct frame_info *next_frame)
896
{
897
  CORE_ADDR pc = frame_unwind_register_unsigned (next_frame, OR32_NPC_REGNUM);
898
 
899
  return pc;
900
 
901
}       /* or32_unwind_pc() */
902
 
903
 
904
/*----------------------------------------------------------------------------*/
905
/*!Unwind the stack pointer from a stack frame
906
 
907
   This just uses the built in frame unwinder
908
 
909
   @param[in] gdbarch     The GDB architecture being used
910
   @param[in] next_frame  Frame info for the NEXT frame
911
 
912
   @return  The stack pointer for THIS frame */
913
/*---------------------------------------------------------------------------*/
914
 
915
static CORE_ADDR
916
or32_unwind_sp (struct gdbarch    *gdbarch,
917
                struct frame_info *next_frame)
918
{
919
  CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, OR32_SP_REGNUM);
920
 
921
  return sp;
922
 
923
}       /* or32_unwind_sp() */
924
 
925
 
926
/*----------------------------------------------------------------------------*/
927
/*!Create a dummy stack frame
928
 
929
   The arguments are placed in registers and/or pushed on the stack as per the
930
   OR32 ABI.
931
 
932
   @param[in] gdbarch        The architecture to use
933
   @param[in] function       Pointer to the function that will be called
934
   @param[in] regcache       The register cache to use
935
   @param[in] bp_addr        Breakpoint address
936
   @param[in] nargs          Number of ags to push
937
   @param[in] args           The arguments
938
   @param[in] sp             The stack pointer
939
   @param[in] struct_return  True (1) if this returns a structure
940
   @param[in] struct_addr    Address for returning structures
941
 
942
   @return  The updated stack pointer */
943
/*---------------------------------------------------------------------------*/
944
 
945
static CORE_ADDR
946
or32_push_dummy_call (struct gdbarch  *gdbarch,
947
                      struct value    *function,
948
                      struct regcache *regcache,
949
                      CORE_ADDR        bp_addr,
950
                      int              nargs,
951
                      struct value   **args,
952
                      CORE_ADDR        sp,
953
                      int              struct_return,
954
                      CORE_ADDR        struct_addr)
955
{
956
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
957
 
958
  int             argreg;
959
  int             argnum;
960
  int             first_stack_arg;
961
  int             stack_offset = 0;
962
 
963
  unsigned int    bpa = (gdbarch_tdep (gdbarch))->bytes_per_address;
964
  unsigned int    bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
965
 
966
  /* Return address */
967
  regcache_cooked_write_unsigned (regcache, OR32_LR_REGNUM, bp_addr);
968
 
969
  /* Register for the next argument */
970
  argreg = OR32_FIRST_ARG_REGNUM;
971
 
972
  /* Location for a returned structure. This is passed as a silent first
973
     argument. */
974
 
975
  if (struct_return)
976
    {
977
      regcache_cooked_write_unsigned (regcache, OR32_FIRST_ARG_REGNUM,
978
                                      struct_addr);
979
      argreg++;
980
    }
981
 
982
  /* Put as many args as possible in registers */
983
  for (argnum = 0; argnum < nargs; argnum++)
984
    {
985
      char           *val;
986
      char            valbuf[sizeof (ULONGEST) ];
987
 
988
      struct value   *arg      = args[argnum];
989
      struct type    *arg_type = check_typedef (value_type (arg));
990
      int             len      = arg_type->length;
991
      enum type_code  typecode = arg_type->main_type->code;
992
 
993
      /* The EABI passes structures that do not fit in a register by
994
         reference. In all other cases, pass the structure by value.  */
995
      if((len > bpw) &&
996
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
997
        {
998
 
999
          store_unsigned_integer (valbuf, bpa, byte_order, value_offset (arg));
1000
          len      = bpa;
1001
          val      = valbuf;
1002
        }
1003
      else
1004
        {
1005
          val = (char *)value_contents (arg);
1006
        }
1007
 
1008
      if((len > bpw) && (argreg <= (OR32_LAST_ARG_REGNUM - 1)))
1009
        {
1010
 
1011
          /* Big scalars use two registers, must be pair aligned. This code
1012
             breaks if we can have quad-word scalars (e.g. long double). */
1013
          ULONGEST regval = extract_unsigned_integer (val, len, byte_order);
1014
 
1015
          gdb_assert (len <= (bpw * 2));
1016
 
1017
          argreg = 1 == (argreg & 1) ? argreg + 1 : argreg;
1018
          regcache_cooked_write_unsigned (regcache, argreg, regval >> bpw);
1019
          regcache_cooked_write_unsigned (regcache, argreg + 1,
1020
                                          regval && ((ULONGEST)(1 << bpw) - 1));
1021
          argreg += 2;
1022
        }
1023
      else if (argreg <= OR32_LAST_ARG_REGNUM)
1024
        {
1025
          regcache_cooked_write_unsigned (regcache, argreg,
1026
                                          extract_unsigned_integer (val, len,
1027
                                                                   byte_order));
1028
          argreg++;
1029
        }
1030
      else
1031
        {
1032
          /* Run out of regs */
1033
          break;
1034
        }
1035
    }
1036
 
1037
  first_stack_arg = argnum;
1038
 
1039
  /* If we get here with argnum < nargs, then arguments remain to be placed on
1040
     the stack. This is tricky, since they must be pushed in reverse order and
1041
     the stack in the end must be aligned. The only solution is to do it in
1042
     two stages, the first to compute the stack size, the second to save the
1043
     args. */
1044
 
1045
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1046
    {
1047
      struct value   *arg      = args[argnum];
1048
      struct type    *arg_type = check_typedef (value_type (arg));
1049
      int             len      = arg_type->length;
1050
      enum type_code  typecode = arg_type->main_type->code;
1051
 
1052
      if((len > bpw) &&
1053
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1054
        {
1055
          /* Large structures are passed as addresses */
1056
          sp -= bpa;
1057
        }
1058
      else
1059
        {
1060
        /* Big scalars use more than one word. Code here allows for future
1061
         quad-word entities (e.g. long double) */
1062
          sp -= ((len + bpw - 1) / bpw) * bpw;
1063
        }
1064
    }
1065
 
1066
  sp           = gdbarch_frame_align (gdbarch, sp);
1067
  stack_offset = 0;
1068
 
1069
  /* Push the remaining args on the stack */
1070
  for (argnum = first_stack_arg; argnum < nargs; argnum++)
1071
    {
1072
      char           *val;
1073
      char            valbuf[sizeof (ULONGEST) ];
1074
 
1075
      struct value   *arg      = args[argnum];
1076
      struct type    *arg_type = check_typedef (value_type (arg));
1077
      int             len      = arg_type->length;
1078
      enum type_code  typecode = arg_type->main_type->code;
1079
 
1080
      /* The EABI passes structures that do not fit in a register by
1081
         reference. In all other cases, pass the structure by value.  */
1082
      if((len > bpw) &&
1083
         ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)))
1084
        {
1085
 
1086
          store_unsigned_integer (valbuf, bpa, byte_order, value_offset (arg));
1087
          len      = bpa;
1088
          val      = valbuf;
1089
        }
1090
      else
1091
        {
1092
          val = (char *)value_contents (arg);
1093
        }
1094
 
1095
      gdb_assert (len <= (bpw * 2));
1096
 
1097
      write_memory (sp + stack_offset, val, len);
1098
      stack_offset += ((len + bpw - 1) / bpw) * bpw;
1099
    }
1100
 
1101
  /* Save the updated stack pointer */
1102
  regcache_cooked_write_unsigned (regcache, OR32_SP_REGNUM, sp);
1103
 
1104
  return sp;
1105
 
1106
}       /* or32_push_dummy_call() */
1107
 
1108
 
1109
/*----------------------------------------------------------------------------*/
1110
/*!Return the frame ID for a dummy stack frame
1111
 
1112
   Tear down a dummy frame created by or32_push_dummy_call(). This data has to
1113
   be constructed manually from the data in our hand.
1114
 
1115
   The stack pointer and program counter can be obtained from the frame info.
1116
 
1117
   @param[in] gdbarch     The architecture to use
1118
   @param[in] this_frame  Information about this frame
1119
 
1120
   @return  Frame ID of this frame */
1121
/*---------------------------------------------------------------------------*/
1122
 
1123
static struct frame_id
1124
or32_dummy_id (struct gdbarch    *gdbarch,
1125
               struct frame_info *this_frame)
1126
{
1127
  return  frame_id_build (get_frame_sp (this_frame), get_frame_pc (this_frame));
1128
 
1129
}       /* or32_dummy_id() */
1130
 
1131
 
1132
 
1133
 
1134
/* Support functions for frame handling */
1135
 
1136
/* -------------------------------------------------------------------------- */
1137
/*!Initialize a prologue cache
1138
 
1139
   This function is changed from its GDB 6.8 version (named
1140
   or32_frame_unwind_cache), in that it is based on THIS frame, not the NEXT
1141
   frame.
1142
 
1143
   Build up the information (saved registers etc) for the given frame if it
1144
   does not already exist.
1145
 
1146
   STACK FORMAT
1147
   ============
1148
 
1149
   The OR32 has a falling stack frame and a simple prolog. The Stack pointer
1150
   is R1 and the frame pointer R2. The frame base is therefore the address
1151
   held in R2 and the stack pointer (R1) is the frame base of the NEXT frame.
1152
 
1153
   @verbatim
1154
   l.addi  r1,r1,-frame_size    # SP now points to end of new stack frame
1155
   @endverbatim
1156
 
1157
   The stack pointer may not be set up in a frameless function (e.g. a simple
1158
   leaf function).
1159
 
1160
   @verbatim
1161
   l.sw    fp_loc(r1),r2        # old FP saved in new stack frame
1162
   l.addi  r2,r1,frame_size     # FP now points to base of new stack frame
1163
   @endverbatim
1164
 
1165
   The frame pointer is not necessarily saved right at the end of the stack
1166
   frame - OR32 saves enough space for any args to called functions right at
1167
   the end (this is a difference from the Architecture Manual).
1168
 
1169
   @verbatim
1170
   l.sw    lr_loc(r1),r9        # Link (return) address
1171
   @endverbatim
1172
 
1173
   The link register is usally saved at fp_loc - 4. It may not be saved at all
1174
   in a leaf function.
1175
 
1176
   @verbatim
1177
   l.sw    reg_loc(r1),ry       # Save any callee saved regs
1178
   @endverbatim
1179
 
1180
   The offsets x for the callee saved registers generally (always?) rise in
1181
   increments of 4, starting at fp_loc + 4. If the frame pointer is omitted
1182
   (an option to GCC), then it may not be saved at all. There may be no callee
1183
   saved registers.
1184
 
1185
   So in summary none of this may be present. However what is present seems
1186
   always to follow this fixed order, and occur before any substantive code
1187
   (it is possible for GCC to have more flexible scheduling of the prologue,
1188
   but this does not seem to occur for OR32).
1189
 
1190
   ANALYSIS
1191
   ========
1192
 
1193
   This prolog is used, even for -O3 with GCC.
1194
 
1195
   All this analysis must allow for the possibility that the PC is in the
1196
   middle of the prologue. Data should only be set up insofar as it has been
1197
   computed.
1198
 
1199
   A suite of "helper" routines are used, allowing reuse for
1200
   or32_skip_prologue().
1201
 
1202
   Reportedly, this is only valid for frames less than 0x7fff in size.
1203
 
1204
   @param[in]     this_frame      Our stack frame.
1205
   @param[in,out] prologue_cache  The prologue cache. If not supplied, we
1206
                                  build it.
1207
 
1208
   @return  The prolog cache (duplicates the return through the argument) */
1209
/* ---------------------------------------------------------------------------*/
1210
static struct trad_frame_cache *
1211
or32_frame_cache (struct frame_info  *this_frame,
1212
                  void              **prologue_cache)
1213
{
1214
  struct gdbarch          *gdbarch;
1215
  struct trad_frame_cache *info;
1216
 
1217
  CORE_ADDR                this_pc;
1218
  CORE_ADDR                this_sp;
1219
  int                      frame_size = 0;
1220
 
1221
  CORE_ADDR                start_addr;
1222
  CORE_ADDR                end_addr;
1223
 
1224
  /* Nothing to do if we already have this info */
1225
  if (NULL != *prologue_cache)
1226
    {
1227
      return *prologue_cache;
1228
    }
1229
 
1230
  /* Get a new prologue cache and populate it with default values */
1231
  info                 = trad_frame_cache_zalloc (this_frame);
1232
  *prologue_cache = info;
1233
 
1234
  /* Find the start address of THIS function (which is a NORMAL frame, even if
1235
     the NEXT frame is the sentinel frame) and the end of its prologue.  */
1236
  this_pc = get_frame_pc (this_frame);
1237
  find_pc_partial_function (this_pc, NULL, &start_addr, NULL);
1238
 
1239
  /* Return early if GDB couldn't find the function.  */
1240
  if (start_addr == 0)
1241
    {
1242
      return  info;
1243
    }
1244
 
1245
  /* Get the stack pointer if we have one (if there's no process executing yet
1246
     we won't have a frame. */
1247
  this_sp = (NULL == this_frame) ? 0 :
1248
                                   get_frame_register_unsigned (this_frame,
1249
                                                                OR32_SP_REGNUM);
1250
 
1251
  /* The frame base of THIS frame is its stack pointer. This is the same
1252
     whether we are frameless or not. */
1253
  trad_frame_set_this_base (info, this_sp);
1254
 
1255
  /* The default is to find the PC of the PREVIOUS frame in the link register
1256
     of this frame. This may be changed if we find the link register was saved
1257
     on the stack. */
1258
  trad_frame_set_reg_realreg (info, OR32_NPC_REGNUM, OR32_LR_REGNUM);
1259
 
1260
  /* We should only examine code that is in the prologue and which has been
1261
     executed. This is all code up to (but not including) end_addr or the PC,
1262
     whichever is first. */
1263
  gdbarch = get_frame_arch (this_frame);
1264
  end_addr = or32_skip_prologue (gdbarch, start_addr);
1265
  end_addr = (this_pc > end_addr) ? end_addr : this_pc;
1266
 
1267
  /* All the following analysis only occurs if we are in the prologue and have
1268
     executed the code. Check we have a sane prologue size, and if zero we
1269
     are frameless and can give up here. */
1270
  if (end_addr < start_addr)
1271
    {
1272
      fatal ("end addr 0x%08x is less than start addr 0x%08x\n",
1273
             (unsigned int) end_addr, (unsigned int) start_addr);
1274
    }
1275
 
1276
  if (end_addr == start_addr)
1277
    {
1278
      frame_size = 0;
1279
    }
1280
  else
1281
    {
1282
      /* have a frame. Look for the various components */
1283
      CORE_ADDR  addr = start_addr;     /* Where we have got to */
1284
      uint32_t   inst = or32_fetch_instruction (gdbarch, addr);
1285
 
1286
      unsigned int  ra, rb, rd;         /* For instruction analysis */
1287
      int           simm;
1288
 
1289
      /* Look for the new stack pointer being set up. */
1290
      if (or32_analyse_l_addi (inst, &rd, &ra, &simm) &&
1291
          (OR32_SP_REGNUM == rd) && (OR32_SP_REGNUM == ra) &&
1292
          (simm < 0) && (0 == (simm % 4)))
1293
        {
1294
          frame_size  = -simm;
1295
          addr       += OR32_INSTLEN;
1296
          inst        = or32_fetch_instruction (gdbarch, addr);
1297
 
1298
          /* The stack pointer of the PREVIOUS frame is frame_size greater
1299
             than the stack pointer of THIS frame. */
1300
          trad_frame_set_reg_value (info, OR32_SP_REGNUM,
1301
                                    this_sp + frame_size);
1302
        }
1303
 
1304
      /* Look for the frame pointer being manipulated. */
1305
      if ((addr < end_addr) &&
1306
          or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
1307
          (OR32_SP_REGNUM == ra) && (OR32_FP_REGNUM == rb) &&
1308
          (simm >= 0) && (0 == (simm % 4)))
1309
        {
1310
          addr += OR32_INSTLEN;
1311
          inst  = or32_fetch_instruction (gdbarch, addr);
1312
 
1313
          /* At this stage, we can find the frame pointer of the PREVIOUS
1314
             frame on the stack of the current frame. */
1315
          trad_frame_set_reg_addr (info, OR32_FP_REGNUM, this_sp + simm);
1316
 
1317
          /* Look for the new frame pointer being set up */
1318
          if (addr < end_addr)
1319
            {
1320
              gdb_assert (or32_analyse_l_addi (inst, &rd, &ra, &simm) &&
1321
                          (OR32_FP_REGNUM == rd) && (OR32_SP_REGNUM == ra) &&
1322
                          (simm == frame_size));
1323
 
1324
              addr += OR32_INSTLEN;
1325
              inst  = or32_fetch_instruction (gdbarch, addr);
1326
 
1327
              /* If we have got this far, the stack pointer of the PREVIOUS
1328
                 frame is the frame pointer of THIS frame. */
1329
              trad_frame_set_reg_realreg (info, OR32_SP_REGNUM, OR32_FP_REGNUM);
1330
            }
1331
        }
1332
 
1333
      /* Look for the link register being saved */
1334
      if ((addr < end_addr) &&
1335
          or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
1336
          (OR32_SP_REGNUM == ra) && (OR32_LR_REGNUM == rb) &&
1337
          (simm >= 0) && (0 == (simm % 4)))
1338
        {
1339
          addr += OR32_INSTLEN;
1340
          inst  = or32_fetch_instruction (gdbarch, addr);
1341
 
1342
          /* If the link register is saved in the THIS frame, it holds the
1343
             value of the PC in the PREVIOUS frame. This overwrites the
1344
             previous information about finding the PC in the link
1345
             register. */
1346
          trad_frame_set_reg_addr (info, OR32_NPC_REGNUM, this_sp + simm);
1347
        }
1348
 
1349
      /* Look for callee-saved register being save. The register must be one
1350
         of the 10 callee saved registers (r10, r12, r14, r16, r18, r20, r22,
1351
         r24, r26, r28, r30).*/
1352
      while (addr < end_addr)
1353
        {
1354
          if (or32_analyse_l_sw (inst, &simm, &ra, &rb) &&
1355
              (OR32_SP_REGNUM == ra) && (rb >= OR32_FIRST_SAVED_REGNUM) &&
1356
              (0 == rb % 2) && (simm >= 0) && (0 == (simm % 4)))
1357
            {
1358
              addr += OR32_INSTLEN;
1359
              inst  = or32_fetch_instruction (gdbarch, addr);
1360
 
1361
              /* The register in the PREVIOUS frame can be found at this
1362
                 location in THIS frame */
1363
              trad_frame_set_reg_addr (info, rb, this_sp + simm);
1364
            }
1365
          else
1366
            {
1367
              break;                    /* Not a register save instruction */
1368
            }
1369
        }
1370
    }
1371
 
1372
  /* Build the frame ID */
1373
  trad_frame_set_id (info, frame_id_build (this_sp, start_addr));
1374
 
1375
  return info;
1376
 
1377
}       /* or32_frame_cache() */
1378
 
1379
 
1380
/* -------------------------------------------------------------------------- */
1381
/*!Find the frame ID of this frame
1382
 
1383
   This function has changed since GDB 6.8 to use THIS frame, rather than the
1384
   NEXT frame.
1385
 
1386
   Given a GDB frame, return its frame_id.
1387
 
1388
   @param[in]  this_frame      Our frame, for which the ID is wanted.
1389
   @param[in]  prologue_cache  Any cached prologue for THIS function.
1390
   @param[out] this_id         Frame ID of our own frame.
1391
 
1392
   @return  Frame ID for THIS frame */
1393
/* ------------------------------------------------------------------------- */
1394
static void
1395
or32_frame_this_id (struct frame_info  *this_frame,
1396
                    void              **prologue_cache,
1397
                    struct frame_id    *this_id)
1398
{
1399
  struct trad_frame_cache *info =
1400
    or32_frame_cache (this_frame, prologue_cache);
1401
 
1402
  trad_frame_get_id (info, this_id);
1403
 
1404
}       /* or32_frame_this_id() */
1405
 
1406
 
1407
/*----------------------------------------------------------------------------*/
1408
/*!Get a register from the PREVIOUS frame
1409
 
1410
   This function has changed from GDB 6.8. It now takes a reference to THIS
1411
   frame, not the NEXT frame. It returns it results via a structure, not its
1412
   argument list.
1413
 
1414
   Given a pointer to the THIS frame, return the details of a register in the
1415
   PREVIOUS frame.
1416
 
1417
   @param[in] this_frame      The stack frame under consideration
1418
   @param[in] prologue_cache  Any cached prologue associated with THIS frame,
1419
                              which may therefore tell us about registers in
1420
                              the PREVIOUS frame.
1421
   @param[in] regnum          The register of interest in the PREVIOUS frame
1422
 
1423
   @return  A value structure representing the register.                      */
1424
/* -------------------------------------------------------------------------- */
1425
static struct value *
1426
or32_frame_prev_register (struct frame_info  *this_frame,
1427
                          void              **prologue_cache,
1428
                          int                 regnum)
1429
{
1430
  struct trad_frame_cache *info = or32_frame_cache (this_frame,
1431
                                                    prologue_cache);
1432
 
1433
  return  trad_frame_get_register (info, this_frame, regnum);
1434
 
1435
}       /* or32_frame_prev_register() */
1436
 
1437
 
1438
/* -------------------------------------------------------------------------- */
1439
/*!Structure defining the OR32 frame unwind functions
1440
 
1441
   Must be global (to this file), since referred to by multiple functions.
1442
 
1443
   Since we are the fallback unwinder, we use the default frame sniffer, which
1444
   always accepts the frame
1445
 
1446
   This applies to NORMAL frames only. We provide the following functions.
1447
   - to give the ID of THIS frame
1448
   - to give the details of a register in PREVIOUS frame
1449
   - a frame sniffer.                                                         */
1450
/* -------------------------------------------------------------------------- */
1451
static const struct frame_unwind or32_frame_unwind = {
1452
  .type          = NORMAL_FRAME,
1453
  .this_id       = or32_frame_this_id,
1454
  .prev_register = or32_frame_prev_register,
1455
  .unwind_data   = NULL,
1456
  .sniffer       = default_frame_sniffer,
1457
  .dealloc_cache = NULL,
1458
  .prev_arch     = NULL
1459
};
1460
 
1461
 
1462
/*----------------------------------------------------------------------------*/
1463
/*!Return the base address of the frame
1464
 
1465
   The implementations has changed since GDB 6.8, since we are now provided
1466
   with the address of THIS frame, rather than the NEXT frame.
1467
 
1468
   For the OR32, the base address is defined to be the stack pointer.
1469
 
1470
   @param[in] this_frame      The current stack frame.
1471
   @param[in] prologue_cache  Any cached prologue for THIS function.
1472
 
1473
   @return  The frame base address */
1474
/*---------------------------------------------------------------------------*/
1475
 
1476
static CORE_ADDR
1477
or32_frame_base_address (struct frame_info  *this_frame,
1478
                         void              **prologue_cache)
1479
{
1480
  return  (CORE_ADDR) get_frame_register_unsigned (this_frame, OR32_SP_REGNUM);
1481
 
1482
}       /* or32_frame_base_address() */
1483
 
1484
 
1485
/* -------------------------------------------------------------------------- */
1486
/*!Identify our frame base sniffer functions
1487
 
1488
   This function just identifies our family of frame sniffing functions.
1489
 
1490
   @param[in] this_frame  The frame of THIS function. Not used here.
1491
 
1492
   @return  A pointer to a struct identifying the frame base sniffing
1493
            functions.                                                        */
1494
/* -------------------------------------------------------------------------- */
1495
static const struct frame_base *
1496
or32_frame_base_sniffer (struct frame_info *this_frame)
1497
{
1498
  /* Structure defining how the frame base is to be identified. */
1499
  static const struct frame_base  or32_frame_base =
1500
    {
1501
      .unwind      = &or32_frame_unwind,
1502
      .this_base   = or32_frame_base_address,
1503
      .this_locals = or32_frame_base_address,
1504
      .this_args   = or32_frame_base_address
1505
    };
1506
 
1507
  return &or32_frame_base;
1508
 
1509
}       /* or32_frame_base_sniffer () */
1510
 
1511
 
1512
/* -------------------------------------------------------------------------- */
1513
/*!Architecture initialization for OpenRISC 1000
1514
 
1515
   Looks for a candidate architecture in the list of architectures supplied
1516
   using the info supplied. If none match, create a new architecture.
1517
 
1518
   @param[in] info    Information about the target architecture
1519
   @param[in] arches  The list of currently know architectures
1520
 
1521
   @return  A structure describing the target architecture                    */
1522
/* -------------------------------------------------------------------------- */
1523
static struct gdbarch *
1524
or32_gdbarch_init (struct gdbarch_info  info,
1525
                   struct gdbarch_list *arches)
1526
{
1527
  static struct frame_base     or32_frame_base;
1528
  struct        gdbarch       *gdbarch;
1529
  struct        gdbarch_tdep  *tdep;
1530
  const struct  bfd_arch_info *binfo;
1531
 
1532
  /* Find a candidate among the list of pre-declared architectures.  */
1533
  arches = gdbarch_list_lookup_by_info (arches, &info);
1534
  if (NULL != arches)
1535
    {
1536
      return arches->gdbarch;
1537
    }
1538
 
1539
  /* None found, create a new architecture from the information
1540
     provided. Can't initialize all the target dependencies until we actually
1541
     know which target we are talking to, but put in some defaults for now. */
1542
 
1543
  binfo                   = info.bfd_arch_info;
1544
  tdep                    = xmalloc (sizeof *tdep);
1545
  tdep->num_matchpoints   = OR32_MAX_MATCHPOINTS;
1546
  tdep->num_gpr_regs      = OR32_MAX_GPR_REGS;
1547
  tdep->bytes_per_word    = binfo->bits_per_word    / binfo->bits_per_byte;
1548
  tdep->bytes_per_address = binfo->bits_per_address / binfo->bits_per_byte;
1549
  gdbarch                 = gdbarch_alloc (&info, tdep);
1550
 
1551
  /* Target data types.  */
1552
  set_gdbarch_short_bit             (gdbarch, 16);
1553
  set_gdbarch_int_bit               (gdbarch, 32);
1554
  set_gdbarch_long_bit              (gdbarch, 32);
1555
  set_gdbarch_long_long_bit         (gdbarch, 64);
1556
  set_gdbarch_float_bit             (gdbarch, 32);
1557
  set_gdbarch_float_format          (gdbarch, floatformats_ieee_single);
1558
  set_gdbarch_double_bit            (gdbarch, 64);
1559
  set_gdbarch_double_format         (gdbarch, floatformats_ieee_double);
1560
  set_gdbarch_long_double_bit       (gdbarch, 64);
1561
  set_gdbarch_long_double_format    (gdbarch, floatformats_ieee_double);
1562
  set_gdbarch_ptr_bit               (gdbarch, binfo->bits_per_address);
1563
  set_gdbarch_addr_bit              (gdbarch, binfo->bits_per_address);
1564
  set_gdbarch_char_signed           (gdbarch, 1);
1565
 
1566
  /* Information about the target architecture */
1567
  set_gdbarch_return_value          (gdbarch, or32_return_value);
1568
  set_gdbarch_breakpoint_from_pc    (gdbarch, or32_breakpoint_from_pc);
1569
  set_gdbarch_single_step_through_delay
1570
                                    (gdbarch, or32_single_step_through_delay);
1571
  set_gdbarch_have_nonsteppable_watchpoint
1572
                                    (gdbarch, 1);
1573
  switch (gdbarch_byte_order (gdbarch))
1574
    {
1575
    case BFD_ENDIAN_BIG:
1576
      set_gdbarch_print_insn        (gdbarch, print_insn_big_or32);
1577
      break;
1578
 
1579
    case BFD_ENDIAN_LITTLE:
1580
      set_gdbarch_print_insn        (gdbarch, print_insn_little_or32);
1581
      break;
1582
 
1583
    case BFD_ENDIAN_UNKNOWN:
1584
      error ("or32_gdbarch_init: Unknown endianness");
1585
      break;
1586
    }
1587
 
1588
  /* Register architecture */
1589
  set_gdbarch_pseudo_register_read  (gdbarch, or32_pseudo_register_read);
1590
  set_gdbarch_pseudo_register_write (gdbarch, or32_pseudo_register_write);
1591
  set_gdbarch_num_regs              (gdbarch, OR32_NUM_REGS);
1592
  set_gdbarch_num_pseudo_regs       (gdbarch, OR32_NUM_PSEUDO_REGS);
1593
  set_gdbarch_sp_regnum             (gdbarch, OR32_SP_REGNUM);
1594
  set_gdbarch_pc_regnum             (gdbarch, OR32_NPC_REGNUM);
1595
  set_gdbarch_ps_regnum             (gdbarch, OR32_SR_REGNUM);
1596
  set_gdbarch_deprecated_fp_regnum  (gdbarch, OR32_FP_REGNUM);
1597
 
1598
  /* Functions to supply register information */
1599
  set_gdbarch_register_name         (gdbarch, or32_register_name);
1600
  set_gdbarch_register_type         (gdbarch, or32_register_type);
1601
  set_gdbarch_print_registers_info  (gdbarch, or32_registers_info);
1602
  set_gdbarch_register_reggroup_p   (gdbarch, or32_register_reggroup_p);
1603
 
1604
  /* Functions to analyse frames */
1605
  set_gdbarch_skip_prologue         (gdbarch, or32_skip_prologue);
1606
  set_gdbarch_inner_than            (gdbarch, core_addr_lessthan);
1607
  set_gdbarch_frame_align           (gdbarch, or32_frame_align);
1608
  set_gdbarch_frame_red_zone_size   (gdbarch, OR32_FRAME_RED_ZONE_SIZE);
1609
 
1610
  /* Functions to access frame data */
1611
  set_gdbarch_unwind_pc             (gdbarch, or32_unwind_pc);
1612
  set_gdbarch_unwind_sp             (gdbarch, or32_unwind_sp);
1613
 
1614
  /* Functions handling dummy frames */
1615
  set_gdbarch_push_dummy_call       (gdbarch, or32_push_dummy_call);
1616
  set_gdbarch_dummy_id              (gdbarch, or32_dummy_id);
1617
 
1618
  /* Set up sniffers for the frame base. Use DWARF debug info if available,
1619
     otherwise use our own sniffer. */
1620
  frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
1621
  frame_base_append_sniffer (gdbarch, or32_frame_base_sniffer);
1622
 
1623
  /* Frame unwinders. Use DWARF debug info if available, otherwise use our
1624
     own unwinder. */
1625
  dwarf2_append_unwinders (gdbarch);
1626
  frame_unwind_append_unwinder (gdbarch, &or32_frame_unwind);
1627
 
1628
  return gdbarch;
1629
 
1630
}       /* or32_gdbarch_init() */
1631
 
1632
 
1633
/*----------------------------------------------------------------------------*/
1634
/*!Dump the target specific data for this architecture
1635
 
1636
   @param[in] gdbarch  The architecture of interest
1637
   @param[in] file     Where to dump the data */
1638
/*---------------------------------------------------------------------------*/
1639
 
1640
static void
1641
or32_dump_tdep (struct gdbarch *gdbarch,
1642
                struct ui_file *file)
1643
{
1644
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1645
 
1646
  if (NULL == tdep)
1647
    {
1648
      return;                   /* Nothing to report */
1649
    }
1650
 
1651
  fprintf_unfiltered (file, "or32_dump_tdep: %d matchpoints available\n",
1652
                      tdep->num_matchpoints);
1653
  fprintf_unfiltered (file, "or32_dump_tdep: %d general purpose registers\n",
1654
                      tdep->num_gpr_regs);
1655
  fprintf_unfiltered (file, "or32_dump_tdep: %d bytes per word\n",
1656
                      tdep->bytes_per_word);
1657
  fprintf_unfiltered (file, "or32_dump_tdep: %d bytes per address\n",
1658
                      tdep->bytes_per_address);
1659
 
1660
}       /* or32_dump_tdep() */
1661
 
1662
 
1663
 
1664
/* Functions to add extra commands to GDB */
1665
 
1666
 
1667
/*----------------------------------------------------------------------------*/
1668
/*!Returns a special purpose register group name
1669
 
1670
   @param[in]  group  The SPR group number
1671
 
1672
   @return  The SPR name (pointer to the name argument) */
1673
/*---------------------------------------------------------------------------*/
1674
 
1675
static const char *
1676
or32_spr_group_name (int  group)
1677
{
1678
  static const char *or32_group_names[OR32_NUM_SPGS] =
1679
    {
1680
      "SYS",
1681
      "DMMU",
1682
      "IMMU",
1683
      "DCACHE",
1684
      "ICACHE",
1685
      "MAC",
1686
      "DEBUG",
1687
      "PERF",
1688
      "POWER",
1689
      "PIC",
1690
      "TIMER",
1691
      "FPU"
1692
    };
1693
 
1694
  if ((0 <= group) && (group < OR32_NUM_SPGS))
1695
    {
1696
      return or32_group_names[group];
1697
    }
1698
  else
1699
    {
1700
      return "";
1701
    }
1702
}       /* or32_spr_group_name() */
1703
 
1704
 
1705
/*----------------------------------------------------------------------------*/
1706
/*!Returns a special purpose register name
1707
 
1708
   @param[in]  group  The SPR group
1709
   @param[in]  index  The index within the SPR group
1710
   @param[out] name   Array to put the name in
1711
 
1712
   @return  The SPR name (pointer to the name argument) */
1713
/*---------------------------------------------------------------------------*/
1714
 
1715
static char *
1716
or32_spr_register_name (int   group,
1717
                        int   index,
1718
                        char *name)
1719
{
1720
  char di;
1721
 
1722
  switch (group)
1723
    {
1724
 
1725
    case OR32_SPG_SYS:
1726
      /* 1:1 names */
1727
      switch (index)
1728
        {
1729
        case OR32_SPG_SYS_VR:       sprintf (name, "VR"      ); return  name;
1730
        case OR32_SPG_SYS_UPR:      sprintf (name, "UPR"     ); return  name;
1731
        case OR32_SPG_SYS_CPUCFGR:  sprintf (name, "CPUCFGR" ); return  name;
1732
        case OR32_SPG_SYS_DMMUCFGR: sprintf (name, "DMMUCFGR"); return  name;
1733
        case OR32_SPG_SYS_IMMUCFGR: sprintf (name, "IMMUCFGR"); return  name;
1734
        case OR32_SPG_SYS_DCCFGR:   sprintf (name, "DCCFGR"  ); return  name;
1735
        case OR32_SPG_SYS_ICCFGR:   sprintf (name, "ICCFGR"  ); return  name;
1736
        case OR32_SPG_SYS_DCFGR:    sprintf (name, "DCFGR"   ); return  name;
1737
        case OR32_SPG_SYS_PCCFGR:   sprintf (name, "PCCFGR"  ); return  name;
1738
        case OR32_SPG_SYS_NPC:      sprintf (name, "NPC"     ); return  name;
1739
        case OR32_SPG_SYS_SR:       sprintf (name, "SR"      ); return  name;
1740
        case OR32_SPG_SYS_PPC:      sprintf (name, "PPC"     ); return  name;
1741
        case OR32_SPG_SYS_FPCSR:    sprintf (name, "FPCSR"   ); return  name;
1742
        }
1743
 
1744
      /* Exception PC regs */
1745
      if((OR32_SPG_SYS_EPCR <= index) &&
1746
         (index             <= OR32_SPG_SYS_EPCR_END))
1747
        {
1748
          sprintf (name, "EPCR%d", index - OR32_SPG_SYS_EPCR);
1749
          return  name;
1750
        }
1751
 
1752
      /* Exception EA regs */
1753
      if((OR32_SPG_SYS_EEAR <= index) &&
1754
         (index             <= OR32_SPG_SYS_EEAR_END))
1755
        {
1756
          sprintf (name, "EEAR%d", index - OR32_SPG_SYS_EEAR);
1757
          return  name;
1758
        }
1759
 
1760
      /* Exception SR regs */
1761
      if((OR32_SPG_SYS_ESR <= index) &&
1762
         (index            <= OR32_SPG_SYS_ESR_END))
1763
        {
1764
          sprintf (name, "ESR%d", index - OR32_SPG_SYS_ESR);
1765
          return  name;
1766
        }
1767
 
1768
      /* GPRs */
1769
      if((OR32_SPG_SYS_GPR <= index) &&
1770
         (index            <= OR32_SPG_SYS_GPR_END))
1771
        {
1772
          sprintf (name, "GPR%d", index - OR32_SPG_SYS_GPR);
1773
          return  name;
1774
        }
1775
 
1776
      break;
1777
 
1778
    case OR32_SPG_DMMU:
1779
    case OR32_SPG_IMMU:
1780
      /* MMU registers. Use DMMU constants throughout, but these are identical
1781
         to the corresponding IMMU constants */
1782
      di = OR32_SPG_DMMU == group ? 'D' : 'I';
1783
 
1784
      /* 1:1 names */
1785
      switch (index)
1786
        {
1787
        case OR32_SPG_DMMU_DMMUCR:
1788
          sprintf (name, "%cMMUCR",  di); return  name;
1789
        case OR32_SPG_DMMU_DMMUPR:
1790
          sprintf (name, "%cMMUPR",  di); return  name;
1791
        case OR32_SPG_DMMU_DTLBEIR:
1792
          sprintf (name, "%cTLBEIR", di); return  name;
1793
        }
1794
 
1795
      /* ATB Match registers */
1796
      if((OR32_SPG_DMMU_DATBMR <= index) &&
1797
         (index                <= OR32_SPG_DMMU_DATBMR_END))
1798
        {
1799
          sprintf (name, "%cATBMR%d", di, index - OR32_SPG_DMMU_DATBMR);
1800
          return  name;
1801
        }
1802
 
1803
      /* ATB Translate registers */
1804
      if((OR32_SPG_DMMU_DATBTR <= index) &&
1805
         (index                <= OR32_SPG_DMMU_DATBTR_END))
1806
        {
1807
          sprintf (name, "%cATBTR%d", di, index - OR32_SPG_DMMU_DATBTR);
1808
          return  name;
1809
        }
1810
 
1811
      /* TLB Way 1 Match registers */
1812
      if((OR32_SPG_DMMU_DTLBW1MR <= index) &&
1813
         (index                <= OR32_SPG_DMMU_DTLBW1MR_END))
1814
        {
1815
          sprintf (name, "%cTLBW1MR%d", di, index - OR32_SPG_DMMU_DTLBW1MR);
1816
          return  name;
1817
        }
1818
 
1819
      /* TLB Way 1 Translate registers */
1820
      if((OR32_SPG_DMMU_DTLBW1TR <= index) &&
1821
         (index                <= OR32_SPG_DMMU_DTLBW1TR_END))
1822
        {
1823
          sprintf (name, "%cTLBW1TR%d", di, index - OR32_SPG_DMMU_DTLBW1TR);
1824
          return  name;
1825
        }
1826
 
1827
      /* TLB Way 2 Match registers */
1828
      if((OR32_SPG_DMMU_DTLBW2MR <= index) &&
1829
         (index                <= OR32_SPG_DMMU_DTLBW2MR_END))
1830
        {
1831
          sprintf (name, "%cTLBW2MR%d", di, index - OR32_SPG_DMMU_DTLBW2MR);
1832
          return  name;
1833
        }
1834
 
1835
      /* TLB Way 2 Translate registers */
1836
      if((OR32_SPG_DMMU_DTLBW2TR <= index) &&
1837
         (index                <= OR32_SPG_DMMU_DTLBW2TR_END))
1838
        {
1839
          sprintf (name, "%cTLBW2TR%d", di, index - OR32_SPG_DMMU_DTLBW2TR);
1840
          return  name;
1841
        }
1842
 
1843
      /* TLB Way 3 Match registers */
1844
      if((OR32_SPG_DMMU_DTLBW3MR <= index) &&
1845
         (index                <= OR32_SPG_DMMU_DTLBW3MR_END))
1846
        {
1847
          sprintf (name, "%cTLBW3MR%d", di, index - OR32_SPG_DMMU_DTLBW3MR);
1848
          return  name;
1849
        }
1850
 
1851
      /* TLB Way 3 Translate registers */
1852
      if((OR32_SPG_DMMU_DTLBW3TR <= index) &&
1853
         (index                <= OR32_SPG_DMMU_DTLBW3TR_END))
1854
        {
1855
          sprintf (name, "%cTLBW3TR%d", di, index - OR32_SPG_DMMU_DTLBW3TR);
1856
          return  name;
1857
        }
1858
 
1859
      break;
1860
 
1861
    case OR32_SPG_DC:
1862
      /* Data cache registers. These do not have an exact correspondence with
1863
         their instruction cache counterparts, so must be done separately. */
1864
 
1865
      /* 1:1 names */
1866
      switch (index)
1867
        {
1868
        case OR32_SPG_DC_DCCR:  sprintf (name, "DCCR" ); return  name;
1869
        case OR32_SPG_DC_DCBPR: sprintf (name, "DCBPR"); return  name;
1870
        case OR32_SPG_DC_DCBFR: sprintf (name, "DCBFR"); return  name;
1871
        case OR32_SPG_DC_DCBIR: sprintf (name, "DCBIR"); return  name;
1872
        case OR32_SPG_DC_DCBWR: sprintf (name, "DCBWR"); return  name;
1873
        case OR32_SPG_DC_DCBLR: sprintf (name, "DCBLR"); return  name;
1874
        }
1875
 
1876
      break;
1877
 
1878
    case OR32_SPG_IC:
1879
      /* Instruction cache registers */
1880
 
1881
      /* 1:1 names */
1882
      switch (index)
1883
        {
1884
        case OR32_SPG_IC_ICCR:  sprintf (name, "ICCR" ); return  name;
1885
        case OR32_SPG_IC_ICBPR: sprintf (name, "ICBPR"); return  name;
1886
        case OR32_SPG_IC_ICBIR: sprintf (name, "ICBIR"); return  name;
1887
        case OR32_SPG_IC_ICBLR: sprintf (name, "ICBLR"); return  name;
1888
        }
1889
 
1890
      break;
1891
 
1892
    case OR32_SPG_MAC:
1893
      /* MAC registers */
1894
 
1895
      /* 1:1 names */
1896
      switch (index)
1897
        {
1898
        case OR32_SPG_MAC_MACLO: sprintf (name, "MACLO"); return  name;
1899
        case OR32_SPG_MAC_MACHI: sprintf (name, "MACHI"); return  name;
1900
        }
1901
 
1902
      break;
1903
 
1904
    case OR32_SPG_DEBUG:
1905
      /* Debug registers */
1906
 
1907
      /* Debug Value registers */
1908
      if((OR32_SPG_DEBUG_DVR <= index) &&
1909
         (index                <= OR32_SPG_DEBUG_DVR_END))
1910
        {
1911
          sprintf (name, "DVR%d", index - OR32_SPG_DEBUG_DVR);
1912
          return  name;
1913
        }
1914
 
1915
      /* Debug Control registers */
1916
      if((OR32_SPG_DEBUG_DCR <= index) &&
1917
         (index                <= OR32_SPG_DEBUG_DCR_END))
1918
        {
1919
          sprintf (name, "DCR%d", index - OR32_SPG_DEBUG_DCR);
1920
          return  name;
1921
        }
1922
 
1923
      /* 1:1 names */
1924
      switch (index)
1925
        {
1926
        case OR32_SPG_DEBUG_DMR1:  sprintf (name, "DMR1" ); return  name;
1927
        case OR32_SPG_DEBUG_DMR2:  sprintf (name, "DMR2" ); return  name;
1928
        case OR32_SPG_DEBUG_DCWR0: sprintf (name, "DCWR0"); return  name;
1929
        case OR32_SPG_DEBUG_DCWR1: sprintf (name, "DCWR1"); return  name;
1930
        case OR32_SPG_DEBUG_DSR:   sprintf (name, "DSR"  ); return  name;
1931
        case OR32_SPG_DEBUG_DRR:   sprintf (name, "DRR"  ); return  name;
1932
        }
1933
 
1934
      break;
1935
 
1936
    case OR32_SPG_PC:
1937
      /* Performance Counter registers */
1938
 
1939
      /* Performance Counters Count registers */
1940
      if((OR32_SPG_PC_PCCR <= index) &&
1941
         (index                <= OR32_SPG_PC_PCCR_END))
1942
        {
1943
          sprintf (name, "PCCR%d", index - OR32_SPG_PC_PCCR);
1944
          return  name;
1945
        }
1946
 
1947
      /* Performance Counters Mode registers */
1948
      if((OR32_SPG_PC_PCMR <= index) &&
1949
         (index                <= OR32_SPG_PC_PCMR_END))
1950
        {
1951
          sprintf (name, "PCMR%d", index - OR32_SPG_PC_PCMR);
1952
          return  name;
1953
        }
1954
 
1955
      break;
1956
 
1957
    case OR32_SPG_PM:
1958
      /* Power Management registers */
1959
 
1960
      /* 1:1 names */
1961
      switch (index)
1962
        {
1963
        case OR32_SPG_PM_PMR:  sprintf (name, "PMR"); return  name;
1964
        }
1965
 
1966
      break;
1967
 
1968
    case OR32_SPG_PIC:
1969
      /* Programmable Interrupt Controller registers */
1970
 
1971
      /* 1:1 names */
1972
      switch (index)
1973
        {
1974
        case OR32_SPG_PIC_PICMR:  sprintf (name, "PICMR"); return  name;
1975
        case OR32_SPG_PIC_PICSR:  sprintf (name, "PICSR"); return  name;
1976
        }
1977
 
1978
      break;
1979
 
1980
    case OR32_SPG_TT:
1981
      /* Tick Timer registers */
1982
 
1983
      /* 1:1 names */
1984
      switch (index)
1985
        {
1986
        case OR32_SPG_TT_TTMR:  sprintf (name, "TTMR"); return  name;
1987
        case OR32_SPG_TT_TTCR:  sprintf (name, "TTCR"); return  name;
1988
        }
1989
 
1990
      break;
1991
 
1992
    case OR32_SPG_FPU:
1993
 
1994
      break;
1995
    }
1996
 
1997
  /* Not a recognized register */
1998
  strcpy (name, "");
1999
  return  name;
2000
 
2001
}       /* or32_spr_register_name() */
2002
 
2003
 
2004
/*----------------------------------------------------------------------------*/
2005
/*!Get SPR group number from a name
2006
 
2007
   @param[in] group_name  SPR register group
2008
 
2009
   @return  The index, or negative if no match. */
2010
/*----------------------------------------------------------------------------*/
2011
 
2012
static int
2013
or32_groupnum_from_name (char *group_name)
2014
{
2015
  int  group;
2016
 
2017
  for (group = 0; group < OR32_NUM_SPGS; group++)
2018
    {
2019
      if (0 == strcasecmp (group_name, or32_spr_group_name (group)))
2020
        {
2021
          return group;
2022
        }
2023
    }
2024
 
2025
  return -1;
2026
 
2027
}       /* or32_groupnum_from_name() */
2028
 
2029
 
2030
/*----------------------------------------------------------------------------*/
2031
/*!Get register index in special purpose register group from name
2032
 
2033
   The name may either be SPR<group_num>_<index> or a known unique name. In
2034
   either case the group number must match the supplied group number.
2035
 
2036
   @param[in] group  SPR register group
2037
   @param[in] name   Register name
2038
 
2039
   @return  The index, or negative if no match. */
2040
/*----------------------------------------------------------------------------*/
2041
 
2042
static int
2043
or32_regnum_from_name (int   group,
2044
                       char *name)
2045
{
2046
  /* Last valid register in each group. */
2047
  static const int  or32_spr_group_last[OR32_NUM_SPGS] =
2048
    {
2049
      OR32_SPG_SYS_LAST,
2050
      OR32_SPG_DMMU_LAST,
2051
      OR32_SPG_IMMU_LAST,
2052
      OR32_SPG_DC_LAST,
2053
      OR32_SPG_IC_LAST,
2054
      OR32_SPG_MAC_LAST,
2055
      OR32_SPG_DEBUG_LAST,
2056
      OR32_SPG_PC_LAST,
2057
      OR32_SPG_PM_LAST,
2058
      OR32_SPG_PIC_LAST,
2059
      OR32_SPG_TT_LAST,
2060
      OR32_SPG_FPU_LAST
2061
    };
2062
 
2063
  int  i;
2064
  char  spr_name[32];
2065
 
2066
  if (0 == strcasecmp (name, "SPR"))
2067
    {
2068
      char *ptr_c;
2069
 
2070
      /* Skip SPR */
2071
      name += 3;
2072
 
2073
      /* Get group number */
2074
      i = (int) strtoul (name, &ptr_c, 10);
2075
      if (*ptr_c != '_' || i != group)
2076
        {
2077
          return -1;
2078
        }
2079
 
2080
      /* Get index */
2081
      ptr_c++;
2082
      i = (int) strtoul (name, &ptr_c, 10);
2083
      if (*ptr_c)
2084
        {
2085
          return -1;
2086
        }
2087
      else
2088
        {
2089
          return  i;
2090
        }
2091
    }
2092
 
2093
  /* Look for a "known" name in this group */
2094
  for (i = 0; i <= or32_spr_group_last[group]; i++)
2095
    {
2096
      char *s = or32_spr_register_name (group, i, spr_name);
2097
 
2098
      if (0 == strcasecmp (name, s))
2099
        {
2100
          return i;
2101
        }
2102
    }
2103
 
2104
  /* Failure */
2105
  return -1;
2106
 
2107
}       /* or32_regnum_from_name() */
2108
 
2109
 
2110
/*----------------------------------------------------------------------------*/
2111
/*!Get the next token from a string
2112
 
2113
   I can't believe there isn't a library argument for this, but strtok is
2114
   deprecated.
2115
 
2116
   Take a string and find the start of the next token and its length. A token
2117
   is anything containing non-blank characters.
2118
 
2119
   @param[in]  str  The string to look at (may be NULL).
2120
   @param[out] tok  Pointer to the start of the token within str. May be NULL
2121
                    if this result is not wanted (e.g. just the length is
2122
                    wanted. If no token is found will be the NULL char at the
2123
                    end of the string, if the original str was NULL, this will
2124
                    be NULL.
2125
 
2126
                    @return  The length of the token found */
2127
/*----------------------------------------------------------------------------*/
2128
 
2129
static int
2130
or32_tokenize (char  *str,
2131
               char **tok)
2132
{
2133
  char *ptr;
2134
  int   len;
2135
 
2136
  /* Deal with NULL argument */
2137
  if (NULL == str)
2138
    {
2139
      if (NULL != tok)
2140
        {
2141
          *tok = NULL;
2142
        }
2143
      return 0;
2144
    }
2145
 
2146
  /* Find the start */
2147
  for (ptr = str; ISBLANK (*ptr) ; ptr++)
2148
    {
2149
      continue;
2150
    }
2151
 
2152
  /* Return the start pointer if requested */
2153
  if (NULL != tok)
2154
    {
2155
      *tok = ptr;
2156
    }
2157
 
2158
  /* Find the end and put in EOS */
2159
  for (len = 0;  ('\0' != ptr[len]) && (!ISBLANK (ptr[len])); len++)
2160
    {
2161
      continue;
2162
    }
2163
 
2164
  return len;
2165
 
2166
}       /* or32_tokenize() */
2167
 
2168
 
2169
/*----------------------------------------------------------------------------*/
2170
/*!Parses args for spr commands
2171
 
2172
   Determines the special purpose register (SPR) name and puts result into
2173
   group and index
2174
 
2175
   Syntax is:
2176
 
2177
   @verbatim
2178
   <spr_args>    -> <group_ref> | <reg_name>
2179
   <group_ref>   -> <group_id> <index>
2180
   <group_id>    -> <group_num> | <group_name>
2181
   @endverbatim
2182
 
2183
   Where the indices/names have to be valid.
2184
 
2185
   So to parse, we look for 1 or 2 args. If 1 it must be a unique register
2186
   name. If 2, the first must be a group number or name and the second an
2187
   index within that group.
2188
 
2189
   Also responsible for providing diagnostics if the arguments do not match.
2190
 
2191
   Rewritten for GDB 6.8 to use the new UI calls and remove assorted
2192
   bugs. Syntax also slightly restricted to be more comprehensible.
2193
 
2194
   @param[in]  arg_str  The argument string
2195
   @param[out] group    The group this SPR belongs in, or -1 to indicate
2196
                        failure
2197
   @param[out] index    Index of the register within the group, or -1 to
2198
                        indicate the whole group
2199
   @param[in]  is_set   1 (true) if we are called from the "spr" command (so
2200
                        there is an extra arg) rather than the "info spr"
2201
                        command. Needed to distinguish between the case where
2202
                        info is sought from a register specified as group and
2203
                        index and setting a uniquely identified register to a
2204
                        value.
2205
 
2206
                        @return  A pointer to any remaining args */
2207
/*---------------------------------------------------------------------------*/
2208
 
2209
static char *
2210
or32_parse_spr_params (char *arg_str,
2211
                       int  *group,
2212
                       int  *index,
2213
                       int   is_set)
2214
{
2215
  struct {
2216
    char              *str;
2217
    int                len;
2218
    unsigned long int  val;
2219
    int                is_num;
2220
  } arg[3] = {
2221
    {
2222
      .str    = NULL,
2223
      .len    = 0,
2224
      .val    = 0,
2225
      .is_num = 0,
2226
    },
2227
   {
2228
      .str    = NULL,
2229
      .len    = 0,
2230
      .val    = 0,
2231
      .is_num = 0,
2232
    },
2233
   {
2234
      .str    = NULL,
2235
      .len    = 0,
2236
      .val    = 0,
2237
      .is_num = 0,
2238
    }
2239
  };
2240
 
2241
  int   num_args;
2242
  char *trailer  = arg_str;
2243
  char *tmp_str;
2244
  int   i;
2245
 
2246
  char  spr_name[32];
2247
 
2248
  /* Break out the arguments. Note that the strings are NOT null terminated
2249
     (we don't want to change arg_str), so we must rely on len. The stroul
2250
     call will still work, since there is always a non-digit char (possibly EOS)
2251
     after the last digit. */
2252
  if (NULL == arg_str)
2253
    {
2254
      num_args = 0;
2255
    }
2256
  else
2257
    {
2258
      for (num_args = 0; num_args < 3; num_args++)
2259
        {
2260
          arg[num_args].len = or32_tokenize (trailer, &(arg[num_args].str));
2261
          trailer           = arg[num_args].str + arg[num_args].len;
2262
 
2263
          if (0 == arg[num_args].len)
2264
            {
2265
              break;
2266
            }
2267
        }
2268
    }
2269
 
2270
  /* Patch nulls into the arg strings and see about values. Couldn't do this
2271
     earlier, since we needed the next char clean to check later args. This
2272
     means advancing trailer, UNLESS it was already at EOS */
2273
 
2274
  if((NULL != arg_str) && ('\0' != *trailer))
2275
    {
2276
      trailer++;
2277
    }
2278
 
2279
  for (i = 0; i < num_args; i++)
2280
    {
2281
      (arg[i].str)[arg[i].len] = '\0';
2282
      errno                    = 0;
2283
      arg[i].val               = strtoul (arg[i].str, &tmp_str, 0);
2284
      arg[i].is_num            = (0 == errno) && ('\0' == *tmp_str);
2285
    }
2286
 
2287
  /* Deal with the case where we are setting a register, so the final argument
2288
     should be disregarded (it is the trailer). Do this anyway if we get a
2289
     third argument */
2290
  if ((is_set & (num_args > 0)) || (num_args > 2))
2291
    {
2292
      trailer = arg[num_args - 1].str;
2293
      num_args--;
2294
    }
2295
 
2296
  /* Deal with different numbers of args */
2297
 
2298
  switch (num_args)
2299
    {
2300
 
2301
    case 0:
2302
      ui_out_message (uiout, 0,
2303
                      "Usage: <command> <register>      |\n"
2304
                      "       <command> <group>         |\n"
2305
                      "       <command> <group> <index>\n"
2306
                      "Valid groups are:\n");
2307
      for (i = 0; i < OR32_NUM_SPGS; i++)
2308
        {
2309
          ui_out_field_string (uiout, NULL, or32_spr_group_name  (i));
2310
          ui_out_spaces (uiout, 1);
2311
          ui_out_wrap_hint (uiout, NULL);
2312
        }
2313
      ui_out_field_string (uiout, NULL, "\n");
2314
 
2315
      *index = -1;
2316
      return  trailer;
2317
 
2318
    case 1:
2319
      /* See if it is a numeric group */
2320
      if (arg[0].is_num)
2321
        {
2322
          if (arg[0].val < OR32_NUM_SPGS)
2323
            {
2324
              *group = arg[0].val;
2325
              *index = -1;
2326
              return trailer;
2327
            }
2328
          else
2329
            {
2330
              ui_out_message (uiout, 0,
2331
                              "Group index should be in the range 0 - %d\n",
2332
                              OR32_NUM_SPGS);
2333
              *group = -1;
2334
              *index = -1;
2335
              return trailer;
2336
            }
2337
        }
2338
 
2339
      /* Is is it a group name? */
2340
      *group = or32_groupnum_from_name (arg[0].str);
2341
      if (*group >= 0)
2342
        {
2343
          *index = -1;
2344
          return trailer;
2345
        }
2346
 
2347
      /* See if it is a valid register name in any group */
2348
      for (*group = 0; *group < OR32_NUM_SPGS; (*group)++)
2349
        {
2350
          *index = or32_regnum_from_name (*group, arg[0].str);
2351
 
2352
          if (*index >= 0)
2353
            {
2354
              return  trailer;
2355
            }
2356
        }
2357
 
2358
      /* Couldn't find it - print out a rude message */
2359
      ui_out_message (uiout, 0,
2360
                      "Group or register name not recognized.\n"
2361
                      "Valid groups are:\n");
2362
      for (i = 0; i < OR32_NUM_SPGS; i++)
2363
        {
2364
          ui_out_field_string (uiout, NULL, or32_spr_group_name (i));
2365
          ui_out_spaces (uiout, 1);
2366
          ui_out_wrap_hint (uiout, NULL);
2367
        }
2368
      ui_out_field_string (uiout, NULL, "\n");
2369
 
2370
      *group = -1;
2371
      *index = -1;
2372
      return  trailer;
2373
 
2374
    case 2:
2375
      /* See if first arg is a numeric group */
2376
      if (arg[0].is_num)
2377
        {
2378
          if (arg[0].val < OR32_NUM_SPGS)
2379
            {
2380
              *group = arg[0].val;
2381
              *index = -1;
2382
            }
2383
          else
2384
            {
2385
              ui_out_message (uiout, 0,
2386
                              "Group index should be in the range 0 - %d\n",
2387
                              OR32_NUM_SPGS - 1);
2388
              *group = -1;
2389
              *index = -1;
2390
              return trailer;
2391
            }
2392
        }
2393
      else
2394
        {
2395
          /* Is is it a group name? */
2396
          *group = or32_groupnum_from_name (arg[0].str);
2397
          if (*group >= 0)
2398
            {
2399
              *index = -1;
2400
            }
2401
          else
2402
            {
2403
              ui_out_message (uiout, 0,
2404
                              "Group name not recognized.\n"
2405
                              "Valid groups are:\n");
2406
              for (i = 0; i < OR32_NUM_SPGS; i++)
2407
                {
2408
                  ui_out_field_string (uiout, NULL, or32_spr_group_name (i));
2409
                  ui_out_spaces (uiout, 1);
2410
                  ui_out_wrap_hint (uiout, NULL);
2411
                }
2412
              ui_out_field_string (uiout, NULL, "\n");
2413
 
2414
              *group = -1;
2415
              *index = -1;
2416
              return  trailer;
2417
            }
2418
        }
2419
 
2420
      /* Is second arg an index or name? */
2421
      if (arg[1].is_num)
2422
        {
2423
          if (arg[1].val < OR32_SPG_SIZE)
2424
            {
2425
              /* Check this really is a register */
2426
              if (0 != strlen (or32_spr_register_name (*group, arg[1].val,
2427
                                                       spr_name)))
2428
                {
2429
                  *index = arg[1].val;
2430
                  return trailer;
2431
                }
2432
              else
2433
                {
2434
                  ui_out_message (uiout, 0,
2435
                                  "No valid register at that index in group\n");
2436
                  *group = -1;
2437
                  *index = -1;
2438
                  return  trailer;
2439
                }
2440
            }
2441
          else
2442
            {
2443
              ui_out_message (uiout, 0,
2444
                              "Register index should be in the range 0 - %d\n",
2445
                              OR32_SPG_SIZE - 1);
2446
              *group = -1;
2447
              *index = -1;
2448
              return  trailer;
2449
            }
2450
        }
2451
 
2452
      /* Must be a name */
2453
      *index = or32_regnum_from_name (*group, arg[1].str);
2454
 
2455
      if (*index >= 0)
2456
        {
2457
          return trailer;
2458
        }
2459
 
2460
      /* Couldn't find it - print out a rude message */
2461
      ui_out_message (uiout, 0, "Register name not recognized in group.\n");
2462
      *group = -1;
2463
      *index = -1;
2464
      return  trailer;
2465
 
2466
    default:
2467
      /* Anything else is an error */
2468
      ui_out_message (uiout, 0, "Unable to parse arguments\n");
2469
      *group = -1;
2470
      *index = -1;
2471
      return  trailer;
2472
    }
2473
}       /* or32_parse_spr_params() */
2474
 
2475
 
2476
/*---------------------------------------------------------------------------*/
2477
/*!Read a special purpose register from the target
2478
 
2479
   This has to be done using the target remote command "readspr"
2480
 
2481
   @param[in] regnum  The register to read
2482
 
2483
   @return  The value read */
2484
/*---------------------------------------------------------------------------*/
2485
 
2486
static ULONGEST
2487
or32_read_spr (unsigned int  regnum)
2488
{
2489
  struct ui_file    *uibuf = mem_fileopen ();
2490
  char               cmd[sizeof ("readspr ffff")];
2491
  unsigned long int  data;
2492
  char              *res;
2493
  long int           len;
2494
 
2495
  /* Create the command string and pass it to target remote command function */
2496
  sprintf (cmd, "readspr %4x", regnum);
2497
  target_rcmd (cmd, uibuf);
2498
 
2499
  /* Get the output for the UI file as a string */
2500
  res = ui_file_xstrdup (uibuf, &len);
2501
  sscanf (res, "%lx", &data);
2502
 
2503
  /* Tidy up */
2504
  xfree (res);
2505
  ui_file_delete (uibuf);
2506
 
2507
  return  (ULONGEST)data;
2508
 
2509
}       /* or32_read_spr() */
2510
 
2511
 
2512
/*---------------------------------------------------------------------------*/
2513
/*!Write a special purpose register on the target
2514
 
2515
   This has to be done using the target remote command "writespr"
2516
 
2517
   Since the SPRs may map to GPR's or the other GDB register (PPC, NPC, SR),
2518
   any register cache is flushed.
2519
 
2520
   @param[in] regnum  The register to write
2521
   @param[in] data  The value to write */
2522
/*---------------------------------------------------------------------------*/
2523
 
2524
static void
2525
or32_write_spr (unsigned int  regnum,
2526
                ULONGEST      data)
2527
{
2528
  struct ui_file    *uibuf = mem_fileopen ();
2529
  char               cmd[sizeof ("writespr ffff ffffffff")];
2530
  char              *res;
2531
  long int           len;
2532
 
2533
  /* Create the command string and pass it to target remote command function */
2534
  sprintf (cmd, "writespr %4x %8llx", regnum, (long long unsigned int)data);
2535
  target_rcmd (cmd, uibuf);
2536
 
2537
  /* Flush the register cache */
2538
  registers_changed ();
2539
 
2540
  /* We ignore the result - Rcmd can put out its own error messages. Just
2541
     tidy up */
2542
  ui_file_delete (uibuf);
2543
 
2544
}       /* or32_write_spr() */
2545
 
2546
 
2547
/*----------------------------------------------------------------------------*/
2548
/*!Show the value of a special purpose register or group
2549
 
2550
   This is a custom extension to the GDB info command.
2551
 
2552
   @param[in] args
2553
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2554
   otherwise. */
2555
/*---------------------------------------------------------------------------*/
2556
 
2557
static void
2558
or32_info_spr_command (char *args,
2559
                       int   from_tty)
2560
{
2561
  int  group;
2562
  int  index;
2563
 
2564
  char  spr_name[32];
2565
 
2566
  or32_parse_spr_params (args, &group, &index, 0);
2567
 
2568
  if (group < 0)
2569
    {
2570
      return;                   /* Couldn't parse the args */
2571
    }
2572
 
2573
  if (index >= 0)
2574
    {
2575
      ULONGEST  value = or32_read_spr (OR32_SPR (group, index));
2576
 
2577
      ui_out_field_fmt (uiout, NULL, "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2578
                        or32_spr_group_name (group),
2579
                        or32_spr_register_name (group, index, spr_name), group,
2580
                        index, (long long unsigned int)value, (long long unsigned int)value);
2581
    }
2582
  else
2583
    {
2584
      /* Print all valid registers in the group */
2585
      for (index = 0; index < OR32_SPG_SIZE; index++)
2586
        {
2587
          if (0 != strlen (or32_spr_register_name (group, index, spr_name)))
2588
            {
2589
              ULONGEST  value = or32_read_spr (OR32_SPR (group, index));
2590
 
2591
              ui_out_field_fmt (uiout, NULL,
2592
                                "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
2593
                                or32_spr_group_name (group),
2594
                                or32_spr_register_name (group, index, spr_name),
2595
                                group, index, (long long unsigned int)value, (long long unsigned int)value);
2596
            }
2597
        }
2598
    }
2599
}       /* or32_info_spr_command() */
2600
 
2601
 
2602
/*----------------------------------------------------------------------------*/
2603
/*!Set a special purpose register
2604
 
2605
   This is a custom command added to GDB.
2606
 
2607
   @param[in] args
2608
   @param[in] from_tty  True (1) if GDB is running from a TTY, false (0)
2609
   otherwise. */
2610
/*---------------------------------------------------------------------------*/
2611
 
2612
static void
2613
or32_spr_command (char *args,
2614
                  int   from_tty)
2615
{
2616
  int   group;
2617
  int   index;
2618
  char *tmp_str;
2619
  char *nargs = or32_parse_spr_params (args, &group, &index, 1);
2620
 
2621
  ULONGEST  old_val;
2622
  ULONGEST  new_val;
2623
 
2624
  char  spr_name[32];
2625
 
2626
  /* Do we have a valid register spec? */
2627
  if (index < 0)
2628
    {
2629
      return;           /* Parser will have printed the error message */
2630
    }
2631
 
2632
  /* Do we have a value to set? */
2633
 
2634
  errno = 0;
2635
  new_val = (ULONGEST)strtoul (nargs, &tmp_str, 0);
2636
 
2637
  if((0 != errno) || ('\0' != *tmp_str))
2638
    {
2639
      ui_out_message (uiout, 0, "Invalid value - register not changed\n");
2640
      return;
2641
    }
2642
 
2643
  old_val = or32_read_spr (OR32_SPR (group, index));
2644
 
2645
  or32_write_spr (OR32_SPR (group, index) , new_val);
2646
 
2647
  ui_out_field_fmt (uiout, NULL,
2648
                    "%s.%s (SPR%i_%i) set to %llu (0x%llx), "
2649
                    "was: %llu (0x%llx)\n",
2650
                    or32_spr_group_name (group),
2651
                    or32_spr_register_name (group, index, spr_name) , group,
2652
                    index, (long long unsigned int)new_val, (long long unsigned int)new_val, (long long unsigned int)old_val, (long long unsigned int)old_val);
2653
 
2654
}       /* or32_spr_command() */
2655
 
2656
 
2657
/*----------------------------------------------------------------------------*/
2658
/*!Main entry point for target architecture initialization
2659
 
2660
   In this version initializes the architecture via
2661
   registers_gdbarch_init(). Add a command to set and show special purpose
2662
   registers. */
2663
/*---------------------------------------------------------------------------*/
2664
 
2665
void
2666
_initialize_or32_tdep (void)
2667
{
2668
  /* Register this architecture. We should do this for or16 and or64 when
2669
     they have their BFD defined. */
2670
  gdbarch_register (bfd_arch_or32, or32_gdbarch_init, or32_dump_tdep);
2671
 
2672
  /* Initialize the automata for the assembler */
2673
  build_automata();
2674
 
2675
  /* Commands to show and set special purpose registers */
2676
  add_info ("spr", or32_info_spr_command,
2677
            "Show the value of a special purpose register");
2678
  add_com ("spr", class_support, or32_spr_command,
2679
           "Set a special purpose register");
2680
 
2681
}       /* _initialize_or32_tdep() */

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