URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [regformats/] [reg-arm.dat] - Blame information for rev 612

Line No.	Rev	Author	Line
1	227	jeremybenn	`name:arm`
2			`xmlarch:arm`
3			`expedite:r11,sp,pc`
4			`32:r0`
5			`32:r1`
6			`32:r2`
7			`32:r3`
8			`32:r4`
9			`32:r5`
10			`32:r6`
11			`32:r7`
12			`32:r8`
13			`32:r9`
14			`32:r10`
15			`32:r11`
16			`32:r12`
17			`32:sp`
18			`32:lr`
19			`32:pc`
20			`96:f0`
21			`96:f1`
22			`96:f2`
23			`96:f3`
24			`96:f4`
25			`96:f5`
26			`96:f6`
27			`96:f7`
28			`32:fps`
29			`32:cpsr`