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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [sh-tdep.h] - Blame information for rev 407

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1 227 jeremybenn
/* Target-specific definition for a Renesas Super-H.
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   Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
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   2003, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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   This file is part of GDB.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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#ifndef SH_TDEP_H
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#define SH_TDEP_H
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/* Contributed by Steve Chamberlain sac@cygnus.com */
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/* Registers for all SH variants.  Used also by sh3-rom.c. */
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enum
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  {
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    R0_REGNUM = 0,
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    STRUCT_RETURN_REGNUM = 2,
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    ARG0_REGNUM = 4,
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    ARGLAST_REGNUM = 7,
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    FP_REGNUM = 14,
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    PC_REGNUM = 16,
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    PR_REGNUM = 17,
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    GBR_REGNUM = 18,
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    VBR_REGNUM = 19,
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    MACH_REGNUM = 20,
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    MACL_REGNUM = 21,
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    SR_REGNUM = 22,
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    FPUL_REGNUM = 23,
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    /* Floating point registers */
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    FPSCR_REGNUM = 24,
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    FR0_REGNUM = 25,
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    FLOAT_ARG0_REGNUM = 29,
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    FLOAT_ARGLAST_REGNUM = 36,
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    FP_LAST_REGNUM = 40,
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    /* sh3,sh4 registers */
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    SSR_REGNUM = 41,
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    SPC_REGNUM = 42,
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    /* DSP registers */
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    DSR_REGNUM = 24,
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    A0G_REGNUM = 25,
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    A0_REGNUM = 26,
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    A1G_REGNUM = 27,
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    A1_REGNUM = 28,
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    M0_REGNUM = 29,
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    M1_REGNUM = 30,
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    X0_REGNUM = 31,
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    X1_REGNUM = 32,
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    Y0_REGNUM = 33,
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    Y1_REGNUM = 34,
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    MOD_REGNUM = 40,
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    RS_REGNUM = 43,
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    RE_REGNUM = 44,
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    DSP_R0_BANK_REGNUM = 51,
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    DSP_R7_BANK_REGNUM = 58,
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    /* sh2a register */
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    R0_BANK0_REGNUM = 43,
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    MACHB_REGNUM = 58,
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    IVNB_REGNUM = 59,
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    PRB_REGNUM = 60,
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    GBRB_REGNUM = 61,
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    MACLB_REGNUM = 62,
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    BANK_REGNUM = 63,
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    IBCR_REGNUM = 64,
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    IBNR_REGNUM = 65,
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    TBR_REGNUM = 66,
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    PSEUDO_BANK_REGNUM = 67,
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    /* Floating point pseudo registers */
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    DR0_REGNUM = 68,
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    DR_LAST_REGNUM = 75,
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    FV0_REGNUM = 76,
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    FV_LAST_REGNUM = 79
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  };
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extern gdbarch_init_ftype sh64_gdbarch_init;
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extern void sh64_show_regs (struct frame_info *);
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/* This structure describes a register in a core-file.  */
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struct sh_corefile_regmap
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{
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  int regnum;
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  unsigned int offset;
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};
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struct gdbarch_tdep
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{
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  /* Non-NULL when debugging from a core file.  Provides the offset
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     where each general-purpose register is stored inside the associated
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     core file section.  */
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  struct sh_corefile_regmap *core_gregmap;
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  /* Non-NULL when debugging from a core file and when FP registers are
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     available.  Provides the offset where each FP register is stored
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     inside the associated core file section.  */
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  struct sh_corefile_regmap *core_fpregmap;
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};
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extern struct regset sh_corefile_gregset;
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void sh_corefile_supply_regset (const struct regset *regset,
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                                struct regcache *regcache,
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                                int regnum, const void *regs, size_t len);
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void sh_corefile_collect_regset (const struct regset *regset,
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                                 const struct regcache *regcache,
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                                 int regnum, void *regs, size_t len);
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#endif /* SH_TDEP_H */

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