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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [v850-tdep.c] - Blame information for rev 227

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1 227 jeremybenn
/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
2
 
3
   Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
4
   2008, 2009, 2010 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#include "defs.h"
22
#include "frame.h"
23
#include "frame-base.h"
24
#include "trad-frame.h"
25
#include "frame-unwind.h"
26
#include "dwarf2-frame.h"
27
#include "gdbtypes.h"
28
#include "inferior.h"
29
#include "gdb_string.h"
30
#include "gdb_assert.h"
31
#include "gdbcore.h"
32
#include "arch-utils.h"
33
#include "regcache.h"
34
#include "dis-asm.h"
35
#include "osabi.h"
36
 
37
enum
38
  {
39
    E_R0_REGNUM,
40
    E_R1_REGNUM,
41
    E_R2_REGNUM,
42
    E_R3_REGNUM, E_SP_REGNUM = E_R3_REGNUM,
43
    E_R4_REGNUM,
44
    E_R5_REGNUM,
45
    E_R6_REGNUM, E_ARG0_REGNUM = E_R6_REGNUM,
46
    E_R7_REGNUM,
47
    E_R8_REGNUM,
48
    E_R9_REGNUM, E_ARGLAST_REGNUM = E_R9_REGNUM,
49
    E_R10_REGNUM, E_V0_REGNUM = E_R10_REGNUM,
50
    E_R11_REGNUM, E_V1_REGNUM = E_R11_REGNUM,
51
    E_R12_REGNUM,
52
    E_R13_REGNUM,
53
    E_R14_REGNUM,
54
    E_R15_REGNUM,
55
    E_R16_REGNUM,
56
    E_R17_REGNUM,
57
    E_R18_REGNUM,
58
    E_R19_REGNUM,
59
    E_R20_REGNUM,
60
    E_R21_REGNUM,
61
    E_R22_REGNUM,
62
    E_R23_REGNUM,
63
    E_R24_REGNUM,
64
    E_R25_REGNUM,
65
    E_R26_REGNUM,
66
    E_R27_REGNUM,
67
    E_R28_REGNUM,
68
    E_R29_REGNUM, E_FP_REGNUM = E_R29_REGNUM,
69
    E_R30_REGNUM, E_EP_REGNUM = E_R30_REGNUM,
70
    E_R31_REGNUM, E_LP_REGNUM = E_R31_REGNUM,
71
    E_R32_REGNUM, E_SR0_REGNUM = E_R32_REGNUM,
72
    E_R33_REGNUM,
73
    E_R34_REGNUM,
74
    E_R35_REGNUM,
75
    E_R36_REGNUM,
76
    E_R37_REGNUM, E_PS_REGNUM = E_R37_REGNUM,
77
    E_R38_REGNUM,
78
    E_R39_REGNUM,
79
    E_R40_REGNUM,
80
    E_R41_REGNUM,
81
    E_R42_REGNUM,
82
    E_R43_REGNUM,
83
    E_R44_REGNUM,
84
    E_R45_REGNUM,
85
    E_R46_REGNUM,
86
    E_R47_REGNUM,
87
    E_R48_REGNUM,
88
    E_R49_REGNUM,
89
    E_R50_REGNUM,
90
    E_R51_REGNUM,
91
    E_R52_REGNUM, E_CTBP_REGNUM = E_R52_REGNUM,
92
    E_R53_REGNUM,
93
    E_R54_REGNUM,
94
    E_R55_REGNUM,
95
    E_R56_REGNUM,
96
    E_R57_REGNUM,
97
    E_R58_REGNUM,
98
    E_R59_REGNUM,
99
    E_R60_REGNUM,
100
    E_R61_REGNUM,
101
    E_R62_REGNUM,
102
    E_R63_REGNUM,
103
    E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM,
104
    E_R65_REGNUM,
105
    E_NUM_REGS
106
  };
107
 
108
enum
109
{
110
  v850_reg_size = 4
111
};
112
 
113
/* Size of return datatype which fits into all return registers.  */
114
enum
115
{
116
  E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size
117
};
118
 
119
struct v850_frame_cache
120
{
121
  /* Base address.  */
122
  CORE_ADDR base;
123
  LONGEST sp_offset;
124
  CORE_ADDR pc;
125
 
126
  /* Flag showing that a frame has been created in the prologue code.  */
127
  int uses_fp;
128
 
129
  /* Saved registers.  */
130
  struct trad_frame_saved_reg *saved_regs;
131
};
132
 
133
/* Info gleaned from scanning a function's prologue.  */
134
struct pifsr            /* Info about one saved register.  */
135
{
136
  int offset;           /* Offset from sp or fp.  */
137
  int cur_frameoffset;  /* Current frameoffset.  */
138
  int reg;              /* Saved register number.  */
139
};
140
 
141
static const char *
142
v850_register_name (struct gdbarch *gdbarch, int regnum)
143
{
144
  static const char *v850_reg_names[] =
145
  { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
146
    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
147
    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
148
    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
149
    "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
150
    "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
151
    "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23",
152
    "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
153
    "pc", "fp"
154
  };
155
  if (regnum < 0 || regnum >= E_NUM_REGS)
156
    return NULL;
157
  return v850_reg_names[regnum];
158
}
159
 
160
static const char *
161
v850e_register_name (struct gdbarch *gdbarch, int regnum)
162
{
163
  static const char *v850e_reg_names[] =
164
  {
165
    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
166
    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
167
    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
168
    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
169
    "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
170
    "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
171
    "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
172
    "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
173
    "pc", "fp"
174
  };
175
  if (regnum < 0 || regnum >= E_NUM_REGS)
176
    return NULL;
177
  return v850e_reg_names[regnum];
178
}
179
 
180
/* Returns the default type for register N.  */
181
 
182
static struct type *
183
v850_register_type (struct gdbarch *gdbarch, int regnum)
184
{
185
  if (regnum == E_PC_REGNUM)
186
    return builtin_type (gdbarch)->builtin_func_ptr;
187
  return builtin_type (gdbarch)->builtin_int32;
188
}
189
 
190
static int
191
v850_type_is_scalar (struct type *t)
192
{
193
  return (TYPE_CODE (t) != TYPE_CODE_STRUCT
194
          && TYPE_CODE (t) != TYPE_CODE_UNION
195
          && TYPE_CODE (t) != TYPE_CODE_ARRAY);
196
}
197
 
198
/* Should call_function allocate stack space for a struct return?  */
199
static int
200
v850_use_struct_convention (struct type *type)
201
{
202
  int i;
203
  struct type *fld_type, *tgt_type;
204
 
205
  /* 1. The value is greater than 8 bytes -> returned by copying.  */
206
  if (TYPE_LENGTH (type) > 8)
207
    return 1;
208
 
209
  /* 2. The value is a single basic type -> returned in register.  */
210
  if (v850_type_is_scalar (type))
211
    return 0;
212
 
213
  /* The value is a structure or union with a single element and that
214
     element is either a single basic type or an array of a single basic
215
     type whose size is greater than or equal to 4 -> returned in register.  */
216
  if ((TYPE_CODE (type) == TYPE_CODE_STRUCT
217
       || TYPE_CODE (type) == TYPE_CODE_UNION)
218
       && TYPE_NFIELDS (type) == 1)
219
    {
220
      fld_type = TYPE_FIELD_TYPE (type, 0);
221
      if (v850_type_is_scalar (fld_type) && TYPE_LENGTH (fld_type) >= 4)
222
        return 0;
223
 
224
      if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
225
        {
226
          tgt_type = TYPE_TARGET_TYPE (fld_type);
227
          if (v850_type_is_scalar (tgt_type) && TYPE_LENGTH (tgt_type) >= 4)
228
            return 0;
229
        }
230
    }
231
 
232
  /* The value is a structure whose first element is an integer or a float,
233
     and which contains no arrays of more than two elements -> returned in
234
     register.  */
235
  if (TYPE_CODE (type) == TYPE_CODE_STRUCT
236
      && v850_type_is_scalar (TYPE_FIELD_TYPE (type, 0))
237
      && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4)
238
    {
239
      for (i = 1; i < TYPE_NFIELDS (type); ++i)
240
        {
241
          fld_type = TYPE_FIELD_TYPE (type, 0);
242
          if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
243
            {
244
              tgt_type = TYPE_TARGET_TYPE (fld_type);
245
              if (TYPE_LENGTH (fld_type) >= 0 && TYPE_LENGTH (tgt_type) >= 0
246
                  && TYPE_LENGTH (fld_type) / TYPE_LENGTH (tgt_type) > 2)
247
                return 1;
248
            }
249
        }
250
      return 0;
251
    }
252
 
253
  /* The value is a union which contains at least one field which would be
254
     returned in registers according to these rules -> returned in register.  */
255
  if (TYPE_CODE (type) == TYPE_CODE_UNION)
256
    {
257
      for (i = 0; i < TYPE_NFIELDS (type); ++i)
258
        {
259
          fld_type = TYPE_FIELD_TYPE (type, 0);
260
          if (!v850_use_struct_convention (fld_type))
261
            return 0;
262
        }
263
    }
264
 
265
  return 1;
266
}
267
 
268
/* Structure for mapping bits in register lists to register numbers.  */
269
struct reg_list
270
{
271
  long mask;
272
  int regno;
273
};
274
 
275
/* Helper function for v850_scan_prologue to handle prepare instruction.  */
276
 
277
static void
278
v850_handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
279
                     struct v850_frame_cache *pi, struct pifsr **pifsr_ptr)
280
{
281
  CORE_ADDR current_pc = *current_pc_ptr;
282
  struct pifsr *pifsr = *pifsr_ptr;
283
  long next = insn2 & 0xffff;
284
  long list12 = ((insn & 1) << 16) + (next & 0xffe0);
285
  long offset = (insn & 0x3e) << 1;
286
  static struct reg_list reg_table[] =
287
  {
288
    {0x00800, 20},              /* r20 */
289
    {0x00400, 21},              /* r21 */
290
    {0x00200, 22},              /* r22 */
291
    {0x00100, 23},              /* r23 */
292
    {0x08000, 24},              /* r24 */
293
    {0x04000, 25},              /* r25 */
294
    {0x02000, 26},              /* r26 */
295
    {0x01000, 27},              /* r27 */
296
    {0x00080, 28},              /* r28 */
297
    {0x00040, 29},              /* r29 */
298
    {0x10000, 30},              /* ep */
299
    {0x00020, 31},              /* lp */
300
    {0, 0}                        /* end of table */
301
  };
302
  int i;
303
 
304
  if ((next & 0x1f) == 0x0b)            /* skip imm16 argument */
305
    current_pc += 2;
306
  else if ((next & 0x1f) == 0x13)       /* skip imm16 argument */
307
    current_pc += 2;
308
  else if ((next & 0x1f) == 0x1b)       /* skip imm32 argument */
309
    current_pc += 4;
310
 
311
  /* Calculate the total size of the saved registers, and add it to the
312
     immediate value used to adjust SP.  */
313
  for (i = 0; reg_table[i].mask != 0; i++)
314
    if (list12 & reg_table[i].mask)
315
      offset += v850_reg_size;
316
  pi->sp_offset -= offset;
317
 
318
  /* Calculate the offsets of the registers relative to the value the SP
319
     will have after the registers have been pushed and the imm5 value has
320
     been subtracted from it.  */
321
  if (pifsr)
322
    {
323
      for (i = 0; reg_table[i].mask != 0; i++)
324
        {
325
          if (list12 & reg_table[i].mask)
326
            {
327
              int reg = reg_table[i].regno;
328
              offset -= v850_reg_size;
329
              pifsr->reg = reg;
330
              pifsr->offset = offset;
331
              pifsr->cur_frameoffset = pi->sp_offset;
332
              pifsr++;
333
            }
334
        }
335
    }
336
 
337
  /* Set result parameters.  */
338
  *current_pc_ptr = current_pc;
339
  *pifsr_ptr = pifsr;
340
}
341
 
342
 
343
/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
344
   The SR bit of the register list is not supported.  gcc does not generate
345
   this bit.  */
346
 
347
static void
348
v850_handle_pushm (int insn, int insn2, struct v850_frame_cache *pi,
349
                   struct pifsr **pifsr_ptr)
350
{
351
  struct pifsr *pifsr = *pifsr_ptr;
352
  long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
353
  long offset = 0;
354
  static struct reg_list pushml_reg_table[] =
355
  {
356
    {0x80000, E_PS_REGNUM},     /* PSW */
357
    {0x40000, 1},               /* r1 */
358
    {0x20000, 2},               /* r2 */
359
    {0x10000, 3},               /* r3 */
360
    {0x00800, 4},               /* r4 */
361
    {0x00400, 5},               /* r5 */
362
    {0x00200, 6},               /* r6 */
363
    {0x00100, 7},               /* r7 */
364
    {0x08000, 8},               /* r8 */
365
    {0x04000, 9},               /* r9 */
366
    {0x02000, 10},              /* r10 */
367
    {0x01000, 11},              /* r11 */
368
    {0x00080, 12},              /* r12 */
369
    {0x00040, 13},              /* r13 */
370
    {0x00020, 14},              /* r14 */
371
    {0x00010, 15},              /* r15 */
372
    {0, 0}                        /* end of table */
373
  };
374
  static struct reg_list pushmh_reg_table[] =
375
  {
376
    {0x80000, 16},              /* r16 */
377
    {0x40000, 17},              /* r17 */
378
    {0x20000, 18},              /* r18 */
379
    {0x10000, 19},              /* r19 */
380
    {0x00800, 20},              /* r20 */
381
    {0x00400, 21},              /* r21 */
382
    {0x00200, 22},              /* r22 */
383
    {0x00100, 23},              /* r23 */
384
    {0x08000, 24},              /* r24 */
385
    {0x04000, 25},              /* r25 */
386
    {0x02000, 26},              /* r26 */
387
    {0x01000, 27},              /* r27 */
388
    {0x00080, 28},              /* r28 */
389
    {0x00040, 29},              /* r29 */
390
    {0x00010, 30},              /* r30 */
391
    {0x00020, 31},              /* r31 */
392
    {0, 0}                        /* end of table */
393
  };
394
  struct reg_list *reg_table;
395
  int i;
396
 
397
  /* Is this a pushml or a pushmh?  */
398
  if ((insn2 & 7) == 1)
399
    reg_table = pushml_reg_table;
400
  else
401
    reg_table = pushmh_reg_table;
402
 
403
  /* Calculate the total size of the saved registers, and add it it to the
404
     immediate value used to adjust SP.  */
405
  for (i = 0; reg_table[i].mask != 0; i++)
406
    if (list12 & reg_table[i].mask)
407
      offset += v850_reg_size;
408
  pi->sp_offset -= offset;
409
 
410
  /* Calculate the offsets of the registers relative to the value the SP
411
     will have after the registers have been pushed and the imm5 value is
412
     subtracted from it.  */
413
  if (pifsr)
414
    {
415
      for (i = 0; reg_table[i].mask != 0; i++)
416
        {
417
          if (list12 & reg_table[i].mask)
418
            {
419
              int reg = reg_table[i].regno;
420
              offset -= v850_reg_size;
421
              pifsr->reg = reg;
422
              pifsr->offset = offset;
423
              pifsr->cur_frameoffset = pi->sp_offset;
424
              pifsr++;
425
            }
426
        }
427
    }
428
 
429
  /* Set result parameters.  */
430
  *pifsr_ptr = pifsr;
431
}
432
 
433
/* Helper function to evaluate if register is one of the "save" registers.
434
   This allows to simplify conditionals in v850_analyze_prologue a lot.  */
435
 
436
static int
437
v850_is_save_register (int reg)
438
{
439
 /* The caller-save registers are R2, R20 - R29 and R31.  All other
440
    registers are either special purpose (PC, SP), argument registers,
441
    or just considered free for use in the caller. */
442
 return reg == E_R2_REGNUM
443
        || (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM)
444
        || reg == E_R31_REGNUM;
445
}
446
 
447
/* Scan the prologue of the function that contains PC, and record what
448
   we find in PI.  Returns the pc after the prologue.  Note that the
449
   addresses saved in frame->saved_regs are just frame relative (negative
450
   offsets from the frame pointer).  This is because we don't know the
451
   actual value of the frame pointer yet.  In some circumstances, the
452
   frame pointer can't be determined till after we have scanned the
453
   prologue.  */
454
 
455
static CORE_ADDR
456
v850_analyze_prologue (struct gdbarch *gdbarch,
457
                       CORE_ADDR func_addr, CORE_ADDR pc,
458
                       struct v850_frame_cache *pi, ULONGEST ctbp)
459
{
460
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
461
  CORE_ADDR prologue_end, current_pc;
462
  struct pifsr pifsrs[E_NUM_REGS + 1];
463
  struct pifsr *pifsr, *pifsr_tmp;
464
  int fp_used;
465
  int ep_used;
466
  int reg;
467
  CORE_ADDR save_pc, save_end;
468
  int regsave_func_p;
469
  int r12_tmp;
470
 
471
  memset (&pifsrs, 0, sizeof pifsrs);
472
  pifsr = &pifsrs[0];
473
 
474
  prologue_end = pc;
475
 
476
  /* Now, search the prologue looking for instructions that setup fp, save
477
     rp, adjust sp and such.  We also record the frame offset of any saved
478
     registers.  */
479
 
480
  pi->sp_offset = 0;
481
  pi->uses_fp = 0;
482
  ep_used = 0;
483
  regsave_func_p = 0;
484
  save_pc = 0;
485
  save_end = 0;
486
  r12_tmp = 0;
487
 
488
  for (current_pc = func_addr; current_pc < prologue_end;)
489
    {
490
      int insn;
491
      int insn2 = -1; /* dummy value */
492
 
493
      insn = read_memory_integer (current_pc, 2, byte_order);
494
      current_pc += 2;
495
      if ((insn & 0x0780) >= 0x0600)    /* Four byte instruction? */
496
        {
497
          insn2 = read_memory_integer (current_pc, 2, byte_order);
498
          current_pc += 2;
499
        }
500
 
501
      if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
502
        {                       /* jarl <func>,10 */
503
          long low_disp = insn2 & ~(long) 1;
504
          long disp = (((((insn & 0x3f) << 16) + low_disp)
505
                        & ~(long) 1) ^ 0x00200000) - 0x00200000;
506
 
507
          save_pc = current_pc;
508
          save_end = prologue_end;
509
          regsave_func_p = 1;
510
          current_pc += disp - 4;
511
          prologue_end = (current_pc
512
                          + (2 * 3)     /* moves to/from ep */
513
                          + 4           /* addi <const>,sp,sp */
514
                          + 2           /* jmp [r10] */
515
                          + (2 * 12)    /* sst.w to save r2, r20-r29, r31 */
516
                          + 20);        /* slop area */
517
        }
518
      else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
519
        {                       /* callt <imm6> */
520
          long adr = ctbp + ((insn & 0x3f) << 1);
521
 
522
          save_pc = current_pc;
523
          save_end = prologue_end;
524
          regsave_func_p = 1;
525
          current_pc = ctbp + (read_memory_unsigned_integer (adr, 2, byte_order)
526
                               & 0xffff);
527
          prologue_end = (current_pc
528
                          + (2 * 3)     /* prepare list2,imm5,sp/imm */
529
                          + 4           /* ctret */
530
                          + 20);        /* slop area */
531
          continue;
532
        }
533
      else if ((insn & 0xffc0) == 0x0780)       /* prepare list2,imm5 */
534
        {
535
          v850_handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
536
          continue;
537
        }
538
      else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
539
        {                       /* ctret after processing register save.  */
540
          current_pc = save_pc;
541
          prologue_end = save_end;
542
          regsave_func_p = 0;
543
          continue;
544
        }
545
      else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
546
        {                       /* pushml, pushmh */
547
          v850_handle_pushm (insn, insn2, pi, &pifsr);
548
          continue;
549
        }
550
      else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
551
        {                       /* jmp after processing register save.  */
552
          current_pc = save_pc;
553
          prologue_end = save_end;
554
          regsave_func_p = 0;
555
          continue;
556
        }
557
      else if ((insn & 0x07c0) == 0x0780        /* jarl or jr */
558
               || (insn & 0xffe0) == 0x0060     /* jmp */
559
               || (insn & 0x0780) == 0x0580)    /* branch */
560
        {
561
          break;                /* Ran into end of prologue */
562
        }
563
 
564
      else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240))
565
        /* add <imm>,sp */
566
        pi->sp_offset += ((insn & 0x1f) ^ 0x10) - 0x10;
567
      else if (insn == ((E_SP_REGNUM << 11) | 0x0600 | E_SP_REGNUM))
568
        /* addi <imm>,sp,sp */
569
        pi->sp_offset += insn2;
570
      else if (insn == ((E_FP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
571
        /* mov sp,fp */
572
        pi->uses_fp = 1;
573
      else if (insn == ((E_R12_REGNUM << 11) | 0x0640 | E_R0_REGNUM))
574
        /* movhi hi(const),r0,r12 */
575
        r12_tmp = insn2 << 16;
576
      else if (insn == ((E_R12_REGNUM << 11) | 0x0620 | E_R12_REGNUM))
577
        /* movea lo(const),r12,r12 */
578
        r12_tmp += insn2;
579
      else if (insn == ((E_SP_REGNUM << 11) | 0x01c0 | E_R12_REGNUM) && r12_tmp)
580
        /* add r12,sp */
581
        pi->sp_offset += r12_tmp;
582
      else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
583
        /* mov sp,ep */
584
        ep_used = 1;
585
      else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_R1_REGNUM))
586
        /* mov r1,ep */
587
        ep_used = 0;
588
      else if (((insn & 0x07ff) == (0x0760 | E_SP_REGNUM)
589
                || (pi->uses_fp
590
                    && (insn & 0x07ff) == (0x0760 | E_FP_REGNUM)))
591
               && pifsr
592
               && v850_is_save_register (reg = (insn >> 11) & 0x1f))
593
        {
594
          /* st.w <reg>,<offset>[sp] or st.w <reg>,<offset>[fp] */
595
          pifsr->reg = reg;
596
          pifsr->offset = insn2 & ~1;
597
          pifsr->cur_frameoffset = pi->sp_offset;
598
          pifsr++;
599
        }
600
      else if (ep_used
601
               && ((insn & 0x0781) == 0x0501)
602
               && pifsr
603
               && v850_is_save_register (reg = (insn >> 11) & 0x1f))
604
        {
605
          /* sst.w <reg>,<offset>[ep] */
606
          pifsr->reg = reg;
607
          pifsr->offset = (insn & 0x007e) << 1;
608
          pifsr->cur_frameoffset = pi->sp_offset;
609
          pifsr++;
610
        }
611
    }
612
 
613
  /* Fix up any offsets to the final offset.  If a frame pointer was created,
614
     use it instead of the stack pointer.  */
615
  for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++)
616
    {
617
      pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset;
618
      pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset;
619
    }
620
 
621
  return current_pc;
622
}
623
 
624
/* Return the address of the first code past the prologue of the function.  */
625
 
626
static CORE_ADDR
627
v850_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
628
{
629
  CORE_ADDR func_addr, func_end;
630
 
631
  /* See what the symbol table says */
632
 
633
  if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
634
    {
635
      struct symtab_and_line sal;
636
 
637
      sal = find_pc_line (func_addr, 0);
638
      if (sal.line != 0 && sal.end < func_end)
639
        return sal.end;
640
 
641
      /* Either there's no line info, or the line after the prologue is after
642
         the end of the function.  In this case, there probably isn't a
643
         prologue.  */
644
      return pc;
645
    }
646
 
647
  /* We can't find the start of this function, so there's nothing we can do.  */
648
  return pc;
649
}
650
 
651
static CORE_ADDR
652
v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
653
{
654
  return sp & ~3;
655
}
656
 
657
/* Setup arguments and LP for a call to the target.  First four args
658
   go in R6->R9, subsequent args go into sp + 16 -> sp + ...  Structs
659
   are passed by reference.  64 bit quantities (doubles and long longs)
660
   may be split between the regs and the stack.  When calling a function
661
   that returns a struct, a pointer to the struct is passed in as a secret
662
   first argument (always in R6).
663
 
664
   Stack space for the args has NOT been allocated: that job is up to us.  */
665
 
666
static CORE_ADDR
667
v850_push_dummy_call (struct gdbarch *gdbarch,
668
                      struct value *function,
669
                      struct regcache *regcache,
670
                      CORE_ADDR bp_addr,
671
                      int nargs,
672
                      struct value **args,
673
                      CORE_ADDR sp,
674
                      int struct_return,
675
                      CORE_ADDR struct_addr)
676
{
677
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
678
  int argreg;
679
  int argnum;
680
  int len = 0;
681
  int stack_offset;
682
 
683
  /* The offset onto the stack at which we will start copying parameters
684
     (after the registers are used up) begins at 16 rather than at zero.
685
     That's how the ABI is defined, though there's no indication that these
686
     16 bytes are used for anything, not even for saving incoming
687
     argument registers.  */
688
  stack_offset = 16;
689
 
690
  /* Now make space on the stack for the args.  */
691
  for (argnum = 0; argnum < nargs; argnum++)
692
    len += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
693
  sp -= len + stack_offset;
694
 
695
  argreg = E_ARG0_REGNUM;
696
  /* The struct_return pointer occupies the first parameter register.  */
697
  if (struct_return)
698
    regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
699
 
700
  /* Now load as many as possible of the first arguments into
701
     registers, and push the rest onto the stack.  There are 16 bytes
702
     in four registers available.  Loop thru args from first to last.  */
703
  for (argnum = 0; argnum < nargs; argnum++)
704
    {
705
      int len;
706
      gdb_byte *val;
707
      gdb_byte valbuf[v850_reg_size];
708
 
709
      if (!v850_type_is_scalar (value_type (*args))
710
          && TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
711
        {
712
          store_unsigned_integer (valbuf, 4, byte_order,
713
                                  value_address (*args));
714
          len = 4;
715
          val = valbuf;
716
        }
717
      else
718
        {
719
          len = TYPE_LENGTH (value_type (*args));
720
          val = (gdb_byte *) value_contents (*args);
721
        }
722
 
723
      while (len > 0)
724
        if (argreg <= E_ARGLAST_REGNUM)
725
          {
726
            CORE_ADDR regval;
727
 
728
            regval = extract_unsigned_integer (val, v850_reg_size, byte_order);
729
            regcache_cooked_write_unsigned (regcache, argreg, regval);
730
 
731
            len -= v850_reg_size;
732
            val += v850_reg_size;
733
            argreg++;
734
          }
735
        else
736
          {
737
            write_memory (sp + stack_offset, val, 4);
738
 
739
            len -= 4;
740
            val += 4;
741
            stack_offset += 4;
742
          }
743
      args++;
744
    }
745
 
746
  /* Store return address.  */
747
  regcache_cooked_write_unsigned (regcache, E_LP_REGNUM, bp_addr);
748
 
749
  /* Update stack pointer.  */
750
  regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
751
 
752
  return sp;
753
}
754
 
755
static void
756
v850_extract_return_value (struct type *type, struct regcache *regcache,
757
                           gdb_byte *valbuf)
758
{
759
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
760
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
761
  int len = TYPE_LENGTH (type);
762
 
763
  if (len <= v850_reg_size)
764
    {
765
      ULONGEST val;
766
 
767
      regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val);
768
      store_unsigned_integer (valbuf, len, byte_order, val);
769
    }
770
  else if (len <= 2 * v850_reg_size)
771
    {
772
      int i, regnum = E_V0_REGNUM;
773
      gdb_byte buf[v850_reg_size];
774
      for (i = 0; len > 0; i += 4, len -= 4)
775
        {
776
          regcache_raw_read (regcache, regnum++, buf);
777
          memcpy (valbuf + i, buf, len > 4 ? 4 : len);
778
        }
779
    }
780
}
781
 
782
static void
783
v850_store_return_value (struct type *type, struct regcache *regcache,
784
                         const gdb_byte *valbuf)
785
{
786
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
787
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
788
  int len = TYPE_LENGTH (type);
789
 
790
  if (len <= v850_reg_size)
791
      regcache_cooked_write_unsigned
792
        (regcache, E_V0_REGNUM,
793
         extract_unsigned_integer (valbuf, len, byte_order));
794
  else if (len <= 2 * v850_reg_size)
795
    {
796
      int i, regnum = E_V0_REGNUM;
797
      for (i = 0; i < len; i += 4)
798
        regcache_raw_write (regcache, regnum++, valbuf + i);
799
    }
800
}
801
 
802
static enum return_value_convention
803
v850_return_value (struct gdbarch *gdbarch, struct type *func_type,
804
                   struct type *type, struct regcache *regcache,
805
                   gdb_byte *readbuf, const gdb_byte *writebuf)
806
{
807
  if (v850_use_struct_convention (type))
808
    return RETURN_VALUE_STRUCT_CONVENTION;
809
  if (writebuf)
810
    v850_store_return_value (type, regcache, writebuf);
811
  else if (readbuf)
812
    v850_extract_return_value (type, regcache, readbuf);
813
  return RETURN_VALUE_REGISTER_CONVENTION;
814
}
815
 
816
const static unsigned char *
817
v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
818
{
819
  static unsigned char breakpoint[] = { 0x85, 0x05 };
820
  *lenptr = sizeof (breakpoint);
821
  return breakpoint;
822
}
823
 
824
static struct v850_frame_cache *
825
v850_alloc_frame_cache (struct frame_info *this_frame)
826
{
827
  struct v850_frame_cache *cache;
828
  int i;
829
 
830
  cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache);
831
  cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
832
 
833
  /* Base address.  */
834
  cache->base = 0;
835
  cache->sp_offset = 0;
836
  cache->pc = 0;
837
 
838
  /* Frameless until proven otherwise.  */
839
  cache->uses_fp = 0;
840
 
841
  return cache;
842
}
843
 
844
static struct v850_frame_cache *
845
v850_frame_cache (struct frame_info *this_frame, void **this_cache)
846
{
847
  struct gdbarch *gdbarch = get_frame_arch (this_frame);
848
  struct v850_frame_cache *cache;
849
  CORE_ADDR current_pc;
850
  int i;
851
 
852
  if (*this_cache)
853
    return *this_cache;
854
 
855
  cache = v850_alloc_frame_cache (this_frame);
856
  *this_cache = cache;
857
 
858
  /* In principle, for normal frames, fp holds the frame pointer,
859
     which holds the base address for the current stack frame.
860
     However, for functions that don't need it, the frame pointer is
861
     optional.  For these "frameless" functions the frame pointer is
862
     actually the frame pointer of the calling frame.  */
863
  cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
864
  if (cache->base == 0)
865
    return cache;
866
 
867
  cache->pc = get_frame_func (this_frame);
868
  current_pc = get_frame_pc (this_frame);
869
  if (cache->pc != 0)
870
    {
871
      ULONGEST ctbp;
872
      ctbp = get_frame_register_unsigned (this_frame, E_CTBP_REGNUM);
873
      v850_analyze_prologue (gdbarch, cache->pc, current_pc, cache, ctbp);
874
    }
875
 
876
  if (!cache->uses_fp)
877
    {
878
      /* We didn't find a valid frame, which means that CACHE->base
879
         currently holds the frame pointer for our calling frame.  If
880
         we're at the start of a function, or somewhere half-way its
881
         prologue, the function's frame probably hasn't been fully
882
         setup yet.  Try to reconstruct the base address for the stack
883
         frame by looking at the stack pointer.  For truly "frameless"
884
         functions this might work too.  */
885
      cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
886
    }
887
 
888
  /* Now that we have the base address for the stack frame we can
889
     calculate the value of sp in the calling frame.  */
890
  trad_frame_set_value (cache->saved_regs, E_SP_REGNUM,
891
                        cache->base - cache->sp_offset);
892
 
893
  /* Adjust all the saved registers such that they contain addresses
894
     instead of offsets.  */
895
  for (i = 0; i < E_NUM_REGS; i++)
896
    if (trad_frame_addr_p (cache->saved_regs, i))
897
      cache->saved_regs[i].addr += cache->base;
898
 
899
  /* The call instruction moves the caller's PC in the callee's LP.
900
     Since this is an unwind, do the reverse.  Copy the location of LP
901
     into PC (the address / regnum) so that a request for PC will be
902
     converted into a request for the LP.  */
903
 
904
  cache->saved_regs[E_PC_REGNUM] = cache->saved_regs[E_LP_REGNUM];
905
 
906
  return cache;
907
}
908
 
909
 
910
static struct value *
911
v850_frame_prev_register (struct frame_info *this_frame,
912
                          void **this_cache, int regnum)
913
{
914
  struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
915
 
916
  gdb_assert (regnum >= 0);
917
 
918
  return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum);
919
}
920
 
921
static void
922
v850_frame_this_id (struct frame_info *this_frame, void **this_cache,
923
                    struct frame_id *this_id)
924
{
925
  struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
926
 
927
  /* This marks the outermost frame.  */
928
  if (cache->base == 0)
929
    return;
930
 
931
  *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc);
932
}
933
 
934
static const struct frame_unwind v850_frame_unwind = {
935
  NORMAL_FRAME,
936
  v850_frame_this_id,
937
  v850_frame_prev_register,
938
  NULL,
939
  default_frame_sniffer
940
};
941
 
942
static CORE_ADDR
943
v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
944
{
945
  return frame_unwind_register_unsigned (next_frame,
946
                                         gdbarch_sp_regnum (gdbarch));
947
}
948
 
949
static CORE_ADDR
950
v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
951
{
952
  return frame_unwind_register_unsigned (next_frame,
953
                                         gdbarch_pc_regnum (gdbarch));
954
}
955
 
956
static struct frame_id
957
v850_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
958
{
959
  CORE_ADDR sp = get_frame_register_unsigned (this_frame,
960
                                              gdbarch_sp_regnum (gdbarch));
961
  return frame_id_build (sp, get_frame_pc (this_frame));
962
}
963
 
964
static CORE_ADDR
965
v850_frame_base_address (struct frame_info *this_frame, void **this_cache)
966
{
967
  struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache);
968
 
969
  return cache->base;
970
}
971
 
972
static const struct frame_base v850_frame_base = {
973
  &v850_frame_unwind,
974
  v850_frame_base_address,
975
  v850_frame_base_address,
976
  v850_frame_base_address
977
};
978
 
979
static struct gdbarch *
980
v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
981
{
982
  struct gdbarch *gdbarch;
983
 
984
  /* Change the register names based on the current machine type.  */
985
  if (info.bfd_arch_info->arch != bfd_arch_v850)
986
    return NULL;
987
 
988
  gdbarch = gdbarch_alloc (&info, NULL);
989
 
990
  switch (info.bfd_arch_info->mach)
991
    {
992
    case bfd_mach_v850:
993
      set_gdbarch_register_name (gdbarch, v850_register_name);
994
      break;
995
    case bfd_mach_v850e:
996
    case bfd_mach_v850e1:
997
      set_gdbarch_register_name (gdbarch, v850e_register_name);
998
      break;
999
    }
1000
 
1001
  set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
1002
  set_gdbarch_num_pseudo_regs (gdbarch, 0);
1003
  set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1004
  set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1005
  set_gdbarch_fp0_regnum (gdbarch, -1);
1006
 
1007
  set_gdbarch_register_type (gdbarch, v850_register_type);
1008
 
1009
  set_gdbarch_char_signed (gdbarch, 0);
1010
  set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1011
  set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1012
  set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1013
  set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1014
 
1015
  set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1016
  set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1017
  set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1018
 
1019
  set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1020
  set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1021
 
1022
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1023
  set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
1024
 
1025
  set_gdbarch_return_value (gdbarch, v850_return_value);
1026
  set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
1027
  set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue);
1028
 
1029
  set_gdbarch_print_insn (gdbarch, print_insn_v850);
1030
 
1031
  set_gdbarch_frame_align (gdbarch, v850_frame_align);
1032
  set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp);
1033
  set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc);
1034
  set_gdbarch_dummy_id (gdbarch, v850_dummy_id);
1035
  frame_base_set_default (gdbarch, &v850_frame_base);
1036
 
1037
  /* Hook in ABI-specific overrides, if they have been registered.  */
1038
  gdbarch_init_osabi (info, gdbarch);
1039
 
1040
  dwarf2_append_unwinders (gdbarch);
1041
  frame_unwind_append_unwinder (gdbarch, &v850_frame_unwind);
1042
 
1043
  return gdbarch;
1044
}
1045
 
1046
extern initialize_file_ftype _initialize_v850_tdep; /* -Wmissing-prototypes */
1047
 
1048
void
1049
_initialize_v850_tdep (void)
1050
{
1051
  register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init);
1052
}

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