OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [opcodes/] [m32c-asm.c] - Blame information for rev 455

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* Assembler interface for targets using CGEN. -*- C -*-
2
   CGEN: Cpu tools GENerator
3
 
4
   THIS FILE IS MACHINE GENERATED WITH CGEN.
5
   - the resultant file is machine generated, cgen-asm.in isn't
6
 
7
   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007, 2008, 2010
8
   Free Software Foundation, Inc.
9
 
10
   This file is part of libopcodes.
11
 
12
   This library is free software; you can redistribute it and/or modify
13
   it under the terms of the GNU General Public License as published by
14
   the Free Software Foundation; either version 3, or (at your option)
15
   any later version.
16
 
17
   It is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
20
   License for more details.
21
 
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, write to the Free Software Foundation, Inc.,
24
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
 
26
 
27
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
28
   Keep that in mind.  */
29
 
30
#include "sysdep.h"
31
#include <stdio.h>
32
#include "ansidecl.h"
33
#include "bfd.h"
34
#include "symcat.h"
35
#include "m32c-desc.h"
36
#include "m32c-opc.h"
37
#include "opintl.h"
38
#include "xregex.h"
39
#include "libiberty.h"
40
#include "safe-ctype.h"
41
 
42
#undef  min
43
#define min(a,b) ((a) < (b) ? (a) : (b))
44
#undef  max
45
#define max(a,b) ((a) > (b) ? (a) : (b))
46
 
47
static const char * parse_insn_normal
48
  (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
49
 
50
/* -- assembler routines inserted here.  */
51
 
52
/* -- asm.c */
53
#include "safe-ctype.h"
54
 
55
#define MACH_M32C 5             /* Must match md_begin.  */
56
 
57
static int
58
m32c_cgen_isa_register (const char **strp)
59
 {
60
   int u;
61
   const char *s = *strp;
62
   static char * m32c_register_names [] =
63
     {
64
       "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
65
       "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
66
       "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
67
       "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
68
     };
69
 
70
   for (u = 0; m32c_register_names[u]; u++)
71
     {
72
       int len = strlen (m32c_register_names[u]);
73
 
74
       if (memcmp (m32c_register_names[u], s, len) == 0
75
           && (s[len] == 0 || ! ISALNUM (s[len])))
76
        return 1;
77
     }
78
   return 0;
79
}
80
 
81
#define PARSE_UNSIGNED                                                  \
82
  do                                                                    \
83
    {                                                                   \
84
      /* Don't successfully parse literals beginning with '['.  */      \
85
      if (**strp == '[')                                                \
86
        return "Invalid literal"; /* Anything -- will not be seen.  */  \
87
                                                                        \
88
      errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
89
      if (errmsg)                                                       \
90
        return errmsg;                                                  \
91
    }                                                                   \
92
  while (0)
93
 
94
#define PARSE_SIGNED                                                    \
95
  do                                                                    \
96
    {                                                                   \
97
      /* Don't successfully parse literals beginning with '['.  */      \
98
      if (**strp == '[')                                                \
99
        return "Invalid literal"; /* Anything -- will not be seen.  */  \
100
                                                                        \
101
      errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);  \
102
      if (errmsg)                                                       \
103
        return errmsg;                                                  \
104
    }                                                                   \
105
  while (0)
106
 
107
static const char *
108
parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
109
                 int opindex, unsigned long *valuep)
110
{
111
  const char *errmsg = 0;
112
  unsigned long value;
113
 
114
  PARSE_UNSIGNED;
115
 
116
  if (value > 0x3f)
117
    return _("imm:6 immediate is out of range");
118
 
119
  *valuep = value;
120
  return 0;
121
}
122
 
123
static const char *
124
parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
125
                 int opindex, unsigned long *valuep)
126
{
127
  const char *errmsg = 0;
128
  unsigned long value = 0;
129
  long have_zero = 0;
130
 
131
  if (strncasecmp (*strp, "%dsp8(", 6) == 0)
132
    {
133
      enum cgen_parse_operand_result result_type;
134
      bfd_vma val;
135
 
136
      *strp += 6;
137
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138
                                   & result_type, & val);
139
      if (**strp != ')')
140
        return _("missing `)'");
141
      (*strp) ++;
142
 
143
      if (errmsg == NULL
144
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145
        return _("%dsp8() takes a symbolic address, not a number");
146
 
147
      value = val;
148
      *valuep = value;
149
      return errmsg;
150
    }
151
 
152
  if (strncmp (*strp, "0x0", 3) == 0
153
      || (**strp == '0' && *(*strp + 1) != 'x'))
154
    have_zero = 1;
155
 
156
  PARSE_UNSIGNED;
157
 
158
  if (value > 0xff)
159
    return _("dsp:8 immediate is out of range");
160
 
161
  /* If this field may require a relocation then use larger dsp16.  */
162
  if (! have_zero && value == 0)
163
    return _("dsp:8 immediate is out of range");
164
 
165
  *valuep = value;
166
  return 0;
167
}
168
 
169
static const char *
170
parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171
               int opindex, signed long *valuep)
172
{
173
  const char *errmsg = 0;
174
  signed long value;
175
  long have_zero = 0;
176
 
177
  if (strncmp (*strp, "0x0", 3) == 0
178
      || (**strp == '0' && *(*strp + 1) != 'x'))
179
    have_zero = 1;
180
 
181
  PARSE_SIGNED;
182
 
183
  if (value < -8 || value > 7)
184
    return _("Immediate is out of range -8 to 7");
185
 
186
  /* If this field may require a relocation then use larger dsp16.  */
187
  if (! have_zero && value == 0)
188
    return _("Immediate is out of range -8 to 7");
189
 
190
  *valuep = value;
191
  return 0;
192
}
193
 
194
static const char *
195
parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
196
                int opindex, signed long *valuep)
197
{
198
  const char *errmsg = 0;
199
  signed long value;
200
  long have_zero = 0;
201
 
202
  if (strncmp (*strp, "0x0", 3) == 0
203
      || (**strp == '0' && *(*strp + 1) != 'x'))
204
    have_zero = 1;
205
 
206
  PARSE_SIGNED;
207
 
208
  if (value < -7 || value > 8)
209
    return _("Immediate is out of range -7 to 8");
210
 
211
  /* If this field may require a relocation then use larger dsp16.  */
212
  if (! have_zero && value == 0)
213
    return _("Immediate is out of range -7 to 8");
214
 
215
  *valuep = -value;
216
  return 0;
217
}
218
 
219
static const char *
220
parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
221
               int opindex, signed long *valuep)
222
{
223
  const char *errmsg = 0;
224
  signed long value = 0;
225
 
226
  if (strncasecmp (*strp, "%hi8(", 5) == 0)
227
    {
228
      enum cgen_parse_operand_result result_type;
229
      bfd_vma val;
230
 
231
      *strp += 5;
232
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
233
                                   & result_type, & val);
234
      if (**strp != ')')
235
        return _("missing `)'");
236
      (*strp) ++;
237
 
238
      if (errmsg == NULL
239
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
240
        val >>= 16;
241
 
242
      value = val;
243
      *valuep = value;
244
      return errmsg;
245
    }
246
 
247
  PARSE_SIGNED;
248
 
249
  if (value <= 255 && value > 127)
250
    value -= 0x100;
251
 
252
  if (value < -128 || value > 127)
253
    return _("dsp:8 immediate is out of range");
254
 
255
  *valuep = value;
256
  return 0;
257
}
258
 
259
static const char *
260
parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
261
                 int opindex, unsigned long *valuep)
262
{
263
  const char *errmsg = 0;
264
  unsigned long value = 0;
265
  long have_zero = 0;
266
 
267
  if (strncasecmp (*strp, "%dsp16(", 7) == 0)
268
    {
269
      enum cgen_parse_operand_result result_type;
270
      bfd_vma val;
271
 
272
      *strp += 7;
273
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
274
                                   & result_type, & val);
275
      if (**strp != ')')
276
        return _("missing `)'");
277
      (*strp) ++;
278
 
279
      if (errmsg == NULL
280
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
281
        return _("%dsp16() takes a symbolic address, not a number");
282
 
283
      value = val;
284
      *valuep = value;
285
      return errmsg;
286
    }
287
 
288
  /* Don't successfully parse literals beginning with '['.  */
289
  if (**strp == '[')
290
    return "Invalid literal"; /* Anything -- will not be seen.  */
291
 
292
  /* Don't successfully parse register names.  */
293
  if (m32c_cgen_isa_register (strp))
294
    return "Invalid literal"; /* Anything -- will not be seen.  */
295
 
296
  if (strncmp (*strp, "0x0", 3) == 0
297
      || (**strp == '0' && *(*strp + 1) != 'x'))
298
    have_zero = 1;
299
 
300
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
301
  if (errmsg)
302
    return errmsg;
303
 
304
  if (value > 0xffff)
305
    return _("dsp:16 immediate is out of range");
306
 
307
  /* If this field may require a relocation then use larger dsp24.  */
308
  if (cd->machs == MACH_M32C && ! have_zero && value == 0
309
      && (strncmp (*strp, "[a", 2) == 0
310
          || **strp == ','
311
          || **strp == 0))
312
    return _("dsp:16 immediate is out of range");
313
 
314
  *valuep = value;
315
  return 0;
316
}
317
 
318
static const char *
319
parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
320
               int opindex, signed long *valuep)
321
{
322
  const char *errmsg = 0;
323
  signed long value = 0;
324
 
325
  if (strncasecmp (*strp, "%lo16(", 6) == 0)
326
    {
327
      enum cgen_parse_operand_result result_type;
328
      bfd_vma val;
329
 
330
      *strp += 6;
331
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
332
                                   & result_type, & val);
333
      if (**strp != ')')
334
        return _("missing `)'");
335
      (*strp) ++;
336
 
337
      if (errmsg == NULL
338
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
339
        val &= 0xffff;
340
 
341
      value = val;
342
      *valuep = value;
343
      return errmsg;
344
    }
345
 
346
  if (strncasecmp (*strp, "%hi16(", 6) == 0)
347
    {
348
      enum cgen_parse_operand_result result_type;
349
      bfd_vma val;
350
 
351
      *strp += 6;
352
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
353
                                   & result_type, & val);
354
      if (**strp != ')')
355
        return _("missing `)'");
356
      (*strp) ++;
357
 
358
      if (errmsg == NULL
359
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
360
        val >>= 16;
361
 
362
      value = val;
363
      *valuep = value;
364
      return errmsg;
365
    }
366
 
367
  PARSE_SIGNED;
368
 
369
  if (value <= 65535 && value > 32767)
370
    value -= 0x10000;
371
 
372
  if (value < -32768 || value > 32767)
373
    return _("dsp:16 immediate is out of range");
374
 
375
  *valuep = value;
376
  return 0;
377
}
378
 
379
static const char *
380
parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
381
                 int opindex, unsigned long *valuep)
382
{
383
  const char *errmsg = 0;
384
  unsigned long value;
385
 
386
  /* Don't successfully parse literals beginning with '['.  */
387
  if (**strp == '[')
388
    return "Invalid literal"; /* Anything -- will not be seen.  */
389
 
390
  /* Don't successfully parse register names.  */
391
  if (m32c_cgen_isa_register (strp))
392
    return "Invalid literal"; /* Anything -- will not be seen.  */
393
 
394
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
395
  if (errmsg)
396
    return errmsg;
397
 
398
  if (value > 0xfffff)
399
    return _("dsp:20 immediate is out of range");
400
 
401
  *valuep = value;
402
  return 0;
403
}
404
 
405
static const char *
406
parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
407
                 int opindex, unsigned long *valuep)
408
{
409
  const char *errmsg = 0;
410
  unsigned long value;
411
 
412
  /* Don't successfully parse literals beginning with '['.  */
413
  if (**strp == '[')
414
    return "Invalid literal"; /* Anything -- will not be seen.  */
415
 
416
  /* Don't successfully parse register names.  */
417
  if (m32c_cgen_isa_register (strp))
418
    return "Invalid literal"; /* Anything -- will not be seen.  */
419
 
420
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
421
  if (errmsg)
422
    return errmsg;
423
 
424
  if (value > 0xffffff)
425
    return _("dsp:24 immediate is out of range");
426
 
427
  *valuep = value;
428
  return 0;
429
}
430
 
431
/* This should only be used for #imm->reg.  */
432
static const char *
433
parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
434
                 int opindex, signed long *valuep)
435
{
436
  const char *errmsg = 0;
437
  signed long value;
438
 
439
  PARSE_SIGNED;
440
 
441
  if (value <= 0xffffff && value > 0x7fffff)
442
    value -= 0x1000000;
443
 
444
  if (value > 0xffffff)
445
    return _("dsp:24 immediate is out of range");
446
 
447
  *valuep = value;
448
  return 0;
449
}
450
 
451
static const char *
452
parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
453
                int opindex, signed long *valuep)
454
{
455
  const char *errmsg = 0;
456
  signed long value;
457
 
458
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
459
  if (errmsg)
460
    return errmsg;
461
 
462
  *valuep = value;
463
  return 0;
464
}
465
 
466
static const char *
467
parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
468
             int opindex, signed long *valuep)
469
{
470
  const char *errmsg = 0;
471
  signed long value;
472
 
473
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
474
  if (errmsg)
475
    return errmsg;
476
 
477
  if (value < 1 || value > 2)
478
    return _("immediate is out of range 1-2");
479
 
480
  *valuep = value;
481
  return 0;
482
}
483
 
484
static const char *
485
parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
486
             int opindex, signed long *valuep)
487
{
488
  const char *errmsg = 0;
489
  signed long value;
490
 
491
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
492
  if (errmsg)
493
    return errmsg;
494
 
495
  if (value < 1 || value > 8)
496
    return _("immediate is out of range 1-8");
497
 
498
  *valuep = value;
499
  return 0;
500
}
501
 
502
static const char *
503
parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
504
             int opindex, signed long *valuep)
505
{
506
  const char *errmsg = 0;
507
  signed long value;
508
 
509
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
510
  if (errmsg)
511
    return errmsg;
512
 
513
  if (value < 0 || value > 7)
514
    return _("immediate is out of range 0-7");
515
 
516
  *valuep = value;
517
  return 0;
518
}
519
 
520
static const char *
521
parse_lab_5_3 (CGEN_CPU_DESC cd,
522
               const char **strp,
523
               int opindex ATTRIBUTE_UNUSED,
524
               int opinfo,
525
               enum cgen_parse_operand_result *type_addr,
526
               bfd_vma *valuep)
527
{
528
  const char *errmsg = 0;
529
  bfd_vma value;
530
  enum cgen_parse_operand_result op_res;
531
 
532
  errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
533
                               opinfo, & op_res, & value);
534
 
535
  if (type_addr)
536
    *type_addr = op_res;
537
 
538
  if (op_res == CGEN_PARSE_OPERAND_RESULT_QUEUED)
539
    {
540
      /* This is a hack; the field cannot handle near-zero signed
541
         offsets that CGEN wants to put in to indicate an "empty"
542
         operand at first.  */
543
      *valuep = 2;
544
      return 0;
545
    }
546
  if (errmsg)
547
    return errmsg;
548
 
549
  if (value < 2 || value > 9)
550
    return _("immediate is out of range 2-9");
551
 
552
  *valuep = value;
553
  return 0;
554
}
555
 
556
static const char *
557
parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
558
                int opindex, unsigned long *valuep)
559
{
560
  const char *errmsg = 0;
561
  unsigned long value;
562
 
563
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
564
  if (errmsg)
565
    return errmsg;
566
 
567
  if (value > 15)
568
    return _("Bit number for indexing general register is out of range 0-15");
569
 
570
  *valuep = value;
571
  return 0;
572
}
573
 
574
static const char *
575
parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
576
                        int opindex, unsigned long *valuep,
577
                        unsigned bits, int allow_syms)
578
{
579
  const char *errmsg = 0;
580
  unsigned long bit;
581
  unsigned long base;
582
  const char *newp = *strp;
583
  unsigned long long bitbase;
584
  long have_zero = 0;
585
 
586
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
587
  if (errmsg)
588
    return errmsg;
589
 
590
  if (*newp != ',')
591
    return "Missing base for bit,base:8";
592
 
593
  ++newp;
594
 
595
  if (strncmp (newp, "0x0", 3) == 0
596
      || (newp[0] == '0' && newp[1] != 'x'))
597
    have_zero = 1;
598
 
599
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
600
  if (errmsg)
601
    return errmsg;
602
 
603
  bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
604
 
605
  if (bitbase >= (1ull << bits))
606
    return _("bit,base is out of range");
607
 
608
  /* If this field may require a relocation then use larger displacement.  */
609
  if (! have_zero && base == 0)
610
    {
611
      switch (allow_syms) {
612
      case 0:
613
        return _("bit,base out of range for symbol");
614
      case 1:
615
        break;
616
      case 2:
617
        if (strncmp (newp, "[sb]", 4) != 0)
618
          return _("bit,base out of range for symbol");
619
        break;
620
      }
621
    }
622
 
623
  *valuep = bitbase;
624
  *strp = newp;
625
  return 0;
626
}
627
 
628
static const char *
629
parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
630
                      int opindex, signed long *valuep,
631
                      unsigned bits, int allow_syms)
632
{
633
  const char *errmsg = 0;
634
  unsigned long bit;
635
  signed long base;
636
  const char *newp = *strp;
637
  long long bitbase;
638
  long long limit;
639
  long have_zero = 0;
640
 
641
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
642
  if (errmsg)
643
    return errmsg;
644
 
645
  if (*newp != ',')
646
    return "Missing base for bit,base:8";
647
 
648
  ++newp;
649
 
650
  if (strncmp (newp, "0x0", 3) == 0
651
      || (newp[0] == '0' && newp[1] != 'x'))
652
    have_zero = 1;
653
 
654
  errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
655
  if (errmsg)
656
    return errmsg;
657
 
658
  bitbase = (long long)bit + ((long long)base * 8);
659
 
660
  limit = 1ll << (bits - 1);
661
  if (bitbase < -limit || bitbase >= limit)
662
    return _("bit,base is out of range");
663
 
664
  /* If this field may require a relocation then use larger displacement.  */
665
  if (! have_zero && base == 0 && ! allow_syms)
666
    return _("bit,base out of range for symbol");
667
 
668
  *valuep = bitbase;
669
  *strp = newp;
670
  return 0;
671
}
672
 
673
static const char *
674
parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
675
                         int opindex, unsigned long *valuep)
676
{
677
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0);
678
}
679
 
680
static const char *
681
parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
682
                         int opindex, unsigned long *valuep)
683
{
684
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0);
685
}
686
 
687
static const char *
688
parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
689
                          int opindex, unsigned long *valuep)
690
{
691
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1);
692
}
693
 
694
static const char *
695
parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
696
                         int opindex, unsigned long *valuep)
697
{
698
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2);
699
}
700
 
701
static const char *
702
parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
703
                         int opindex, unsigned long *valuep)
704
{
705
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1);
706
}
707
 
708
static const char *
709
parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
710
                       int opindex, signed long *valuep)
711
{
712
  return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1);
713
}
714
 
715
static const char *
716
parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
717
                       int opindex, signed long *valuep)
718
{
719
  return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0);
720
}
721
 
722
static const char *
723
parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
724
                       int opindex, signed long *valuep)
725
{
726
  return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1);
727
}
728
 
729
/* Parse the suffix as :<char> or as nothing followed by a whitespace.  */
730
 
731
static const char *
732
parse_suffix (const char **strp, char suffix)
733
{
734
  const char *newp = *strp;
735
 
736
  if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
737
    newp = *strp + 2;
738
 
739
  if (ISSPACE (*newp))
740
    {
741
      *strp = newp;
742
      return 0;
743
    }
744
 
745
  return "Invalid suffix"; /* Anything -- will not be seen.  */
746
}
747
 
748
static const char *
749
parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
750
         int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
751
{
752
  return parse_suffix (strp, 's');
753
}
754
 
755
static const char *
756
parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
757
         int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
758
{
759
  return parse_suffix (strp, 'g');
760
}
761
 
762
static const char *
763
parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
764
         int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
765
{
766
  return parse_suffix (strp, 'q');
767
}
768
 
769
static const char *
770
parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
771
         int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
772
{
773
  return parse_suffix (strp, 'z');
774
}
775
 
776
/* Parse an empty suffix. Fail if the next char is ':'.  */
777
 
778
static const char *
779
parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
780
         int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
781
{
782
  if (**strp == ':')
783
    return "Unexpected suffix";
784
  return 0;
785
}
786
 
787
static const char *
788
parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
789
               int opindex ATTRIBUTE_UNUSED, signed long *valuep)
790
{
791
  const char *errmsg;
792
  signed long value;
793
  signed long junk;
794
  const char *newp = *strp;
795
 
796
  /* Parse r0[hl].  */
797
  errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
798
  if (errmsg)
799
    return errmsg;
800
 
801
  if (*newp != ',')
802
    return _("not a valid r0l/r0h pair");
803
  ++newp;
804
 
805
  /* Parse the second register in the pair.  */
806
  if (value == 0) /* r0l */
807
    errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
808
  else
809
    errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
810
  if (errmsg)
811
    return errmsg;
812
 
813
  *strp = newp;
814
  *valuep = ! value;
815
  return 0;
816
}
817
 
818
/* Accept .b or .w in any case.  */
819
 
820
static const char *
821
parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
822
            int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
823
{
824
  if (**strp == '.'
825
      && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
826
          || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
827
    {
828
      *strp += 2;
829
      return NULL;
830
    }
831
 
832
  return _("Invalid size specifier");
833
}
834
 
835
/* Special check to ensure that instruction exists for given machine.  */
836
 
837
int
838
m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
839
                          const CGEN_INSN *insn)
840
{
841
  int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
842
  CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
843
 
844
  /* If attributes are absent, assume no restriction.  */
845
  if (machs == 0)
846
    machs = ~0;
847
 
848
  return ((machs & cd->machs)
849
          && cgen_bitset_intersect_p (& isas, cd->isas));
850
}
851
 
852
/* Parse a set of registers, R0,R1,A0,A1,SB,FB.  */
853
 
854
static const char *
855
parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
856
              const char **strp,
857
              int opindex ATTRIBUTE_UNUSED,
858
              unsigned long *valuep,
859
              int push)
860
{
861
  const char *errmsg = 0;
862
  int regno = 0;
863
 
864
  *valuep = 0;
865
  while (**strp && **strp != ')')
866
    {
867
      if (**strp == 'r' || **strp == 'R')
868
        {
869
          ++*strp;
870
          regno = **strp - '0';
871
          if (regno > 4)
872
            errmsg = _("Register number is not valid");
873
        }
874
      else if (**strp == 'a' || **strp == 'A')
875
        {
876
          ++*strp;
877
          regno = **strp - '0';
878
          if (regno > 2)
879
            errmsg = _("Register number is not valid");
880
          regno = **strp - '0' + 4;
881
        }
882
 
883
      else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
884
        {
885
          regno = 6;
886
          ++*strp;
887
        }
888
 
889
      else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
890
        {
891
          regno = 7;
892
          ++*strp;
893
        }
894
 
895
      if (push) /* Mask is reversed for push.  */
896
        *valuep |= 0x80 >> regno;
897
      else
898
        *valuep |= 1 << regno;
899
 
900
      ++*strp;
901
      if (**strp == ',')
902
        {
903
          if (*(*strp + 1) == ')')
904
            break;
905
          ++*strp;
906
        }
907
    }
908
 
909
  if (!*strp)
910
    errmsg = _("Register list is not valid");
911
 
912
  return errmsg;
913
}
914
 
915
#define POP  0
916
#define PUSH 1
917
 
918
static const char *
919
parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
920
                  const char **strp,
921
                  int opindex ATTRIBUTE_UNUSED,
922
                  unsigned long *valuep)
923
{
924
  return parse_regset (cd, strp, opindex, valuep, POP);
925
}
926
 
927
static const char *
928
parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
929
                   const char **strp,
930
                   int opindex ATTRIBUTE_UNUSED,
931
                   unsigned long *valuep)
932
{
933
  return parse_regset (cd, strp, opindex, valuep, PUSH);
934
}
935
 
936
/* -- dis.c */
937
 
938
const char * m32c_cgen_parse_operand
939
  (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
940
 
941
/* Main entry point for operand parsing.
942
 
943
   This function is basically just a big switch statement.  Earlier versions
944
   used tables to look up the function to use, but
945
   - if the table contains both assembler and disassembler functions then
946
     the disassembler contains much of the assembler and vice-versa,
947
   - there's a lot of inlining possibilities as things grow,
948
   - using a switch statement avoids the function call overhead.
949
 
950
   This function could be moved into `parse_insn_normal', but keeping it
951
   separate makes clear the interface between `parse_insn_normal' and each of
952
   the handlers.  */
953
 
954
const char *
955
m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
956
                           int opindex,
957
                           const char ** strp,
958
                           CGEN_FIELDS * fields)
959
{
960
  const char * errmsg = NULL;
961
  /* Used by scalar operands that still need to be parsed.  */
962
  long junk ATTRIBUTE_UNUSED;
963
 
964
  switch (opindex)
965
    {
966
    case M32C_OPERAND_A0 :
967
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
968
      break;
969
    case M32C_OPERAND_A1 :
970
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
971
      break;
972
    case M32C_OPERAND_AN16_PUSH_S :
973
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
974
      break;
975
    case M32C_OPERAND_BIT16AN :
976
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
977
      break;
978
    case M32C_OPERAND_BIT16RN :
979
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
980
      break;
981
    case M32C_OPERAND_BIT3_S :
982
      errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S));
983
      break;
984
    case M32C_OPERAND_BIT32ANPREFIXED :
985
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
986
      break;
987
    case M32C_OPERAND_BIT32ANUNPREFIXED :
988
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
989
      break;
990
    case M32C_OPERAND_BIT32RNPREFIXED :
991
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
992
      break;
993
    case M32C_OPERAND_BIT32RNUNPREFIXED :
994
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
995
      break;
996
    case M32C_OPERAND_BITBASE16_16_S8 :
997
      errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
998
      break;
999
    case M32C_OPERAND_BITBASE16_16_U16 :
1000
      errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1001
      break;
1002
    case M32C_OPERAND_BITBASE16_16_U8 :
1003
      errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1004
      break;
1005
    case M32C_OPERAND_BITBASE16_8_U11_S :
1006
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
1007
      break;
1008
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1009
      errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
1010
      break;
1011
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1012
      errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
1013
      break;
1014
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1015
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
1016
      break;
1017
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1018
      errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
1019
      break;
1020
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1021
      errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
1022
      break;
1023
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1024
      errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
1025
      break;
1026
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1027
      errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
1028
      break;
1029
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1030
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
1031
      break;
1032
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1033
      errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
1034
      break;
1035
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1036
      errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
1037
      break;
1038
    case M32C_OPERAND_BITNO16R :
1039
      errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
1040
      break;
1041
    case M32C_OPERAND_BITNO32PREFIXED :
1042
      errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
1043
      break;
1044
    case M32C_OPERAND_BITNO32UNPREFIXED :
1045
      errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
1046
      break;
1047
    case M32C_OPERAND_DSP_10_U6 :
1048
      errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1049
      break;
1050
    case M32C_OPERAND_DSP_16_S16 :
1051
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1052
      break;
1053
    case M32C_OPERAND_DSP_16_S8 :
1054
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1055
      break;
1056
    case M32C_OPERAND_DSP_16_U16 :
1057
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1058
      break;
1059
    case M32C_OPERAND_DSP_16_U20 :
1060
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1061
      break;
1062
    case M32C_OPERAND_DSP_16_U24 :
1063
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1064
      break;
1065
    case M32C_OPERAND_DSP_16_U8 :
1066
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1067
      break;
1068
    case M32C_OPERAND_DSP_24_S16 :
1069
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1070
      break;
1071
    case M32C_OPERAND_DSP_24_S8 :
1072
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1073
      break;
1074
    case M32C_OPERAND_DSP_24_U16 :
1075
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1076
      break;
1077
    case M32C_OPERAND_DSP_24_U20 :
1078
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1079
      break;
1080
    case M32C_OPERAND_DSP_24_U24 :
1081
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1082
      break;
1083
    case M32C_OPERAND_DSP_24_U8 :
1084
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1085
      break;
1086
    case M32C_OPERAND_DSP_32_S16 :
1087
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1088
      break;
1089
    case M32C_OPERAND_DSP_32_S8 :
1090
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1091
      break;
1092
    case M32C_OPERAND_DSP_32_U16 :
1093
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1094
      break;
1095
    case M32C_OPERAND_DSP_32_U20 :
1096
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1097
      break;
1098
    case M32C_OPERAND_DSP_32_U24 :
1099
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1100
      break;
1101
    case M32C_OPERAND_DSP_32_U8 :
1102
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1103
      break;
1104
    case M32C_OPERAND_DSP_40_S16 :
1105
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1106
      break;
1107
    case M32C_OPERAND_DSP_40_S8 :
1108
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1109
      break;
1110
    case M32C_OPERAND_DSP_40_U16 :
1111
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1112
      break;
1113
    case M32C_OPERAND_DSP_40_U20 :
1114
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20));
1115
      break;
1116
    case M32C_OPERAND_DSP_40_U24 :
1117
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1118
      break;
1119
    case M32C_OPERAND_DSP_40_U8 :
1120
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1121
      break;
1122
    case M32C_OPERAND_DSP_48_S16 :
1123
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1124
      break;
1125
    case M32C_OPERAND_DSP_48_S8 :
1126
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1127
      break;
1128
    case M32C_OPERAND_DSP_48_U16 :
1129
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1130
      break;
1131
    case M32C_OPERAND_DSP_48_U20 :
1132
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20));
1133
      break;
1134
    case M32C_OPERAND_DSP_48_U24 :
1135
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1136
      break;
1137
    case M32C_OPERAND_DSP_48_U8 :
1138
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1139
      break;
1140
    case M32C_OPERAND_DSP_8_S24 :
1141
      errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1142
      break;
1143
    case M32C_OPERAND_DSP_8_S8 :
1144
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1145
      break;
1146
    case M32C_OPERAND_DSP_8_U16 :
1147
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1148
      break;
1149
    case M32C_OPERAND_DSP_8_U24 :
1150
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1151
      break;
1152
    case M32C_OPERAND_DSP_8_U6 :
1153
      errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1154
      break;
1155
    case M32C_OPERAND_DSP_8_U8 :
1156
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1157
      break;
1158
    case M32C_OPERAND_DST16AN :
1159
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1160
      break;
1161
    case M32C_OPERAND_DST16AN_S :
1162
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1163
      break;
1164
    case M32C_OPERAND_DST16ANHI :
1165
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1166
      break;
1167
    case M32C_OPERAND_DST16ANQI :
1168
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1169
      break;
1170
    case M32C_OPERAND_DST16ANQI_S :
1171
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1172
      break;
1173
    case M32C_OPERAND_DST16ANSI :
1174
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1175
      break;
1176
    case M32C_OPERAND_DST16RNEXTQI :
1177
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1178
      break;
1179
    case M32C_OPERAND_DST16RNHI :
1180
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1181
      break;
1182
    case M32C_OPERAND_DST16RNQI :
1183
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1184
      break;
1185
    case M32C_OPERAND_DST16RNQI_S :
1186
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1187
      break;
1188
    case M32C_OPERAND_DST16RNSI :
1189
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1190
      break;
1191
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1192
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1193
      break;
1194
    case M32C_OPERAND_DST32ANPREFIXED :
1195
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1196
      break;
1197
    case M32C_OPERAND_DST32ANPREFIXEDHI :
1198
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1199
      break;
1200
    case M32C_OPERAND_DST32ANPREFIXEDQI :
1201
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1202
      break;
1203
    case M32C_OPERAND_DST32ANPREFIXEDSI :
1204
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1205
      break;
1206
    case M32C_OPERAND_DST32ANUNPREFIXED :
1207
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1208
      break;
1209
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1210
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1211
      break;
1212
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1213
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1214
      break;
1215
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1216
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1217
      break;
1218
    case M32C_OPERAND_DST32R0HI_S :
1219
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1220
      break;
1221
    case M32C_OPERAND_DST32R0QI_S :
1222
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1223
      break;
1224
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1225
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1226
      break;
1227
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1228
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1229
      break;
1230
    case M32C_OPERAND_DST32RNPREFIXEDHI :
1231
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1232
      break;
1233
    case M32C_OPERAND_DST32RNPREFIXEDQI :
1234
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1235
      break;
1236
    case M32C_OPERAND_DST32RNPREFIXEDSI :
1237
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1238
      break;
1239
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1240
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1241
      break;
1242
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1243
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1244
      break;
1245
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1246
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1247
      break;
1248
    case M32C_OPERAND_G :
1249
      errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1250
      break;
1251
    case M32C_OPERAND_IMM_12_S4 :
1252
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1253
      break;
1254
    case M32C_OPERAND_IMM_12_S4N :
1255
      errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4));
1256
      break;
1257
    case M32C_OPERAND_IMM_13_U3 :
1258
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1259
      break;
1260
    case M32C_OPERAND_IMM_16_HI :
1261
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1262
      break;
1263
    case M32C_OPERAND_IMM_16_QI :
1264
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1265
      break;
1266
    case M32C_OPERAND_IMM_16_SI :
1267
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1268
      break;
1269
    case M32C_OPERAND_IMM_20_S4 :
1270
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1271
      break;
1272
    case M32C_OPERAND_IMM_24_HI :
1273
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1274
      break;
1275
    case M32C_OPERAND_IMM_24_QI :
1276
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1277
      break;
1278
    case M32C_OPERAND_IMM_24_SI :
1279
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1280
      break;
1281
    case M32C_OPERAND_IMM_32_HI :
1282
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1283
      break;
1284
    case M32C_OPERAND_IMM_32_QI :
1285
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1286
      break;
1287
    case M32C_OPERAND_IMM_32_SI :
1288
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1289
      break;
1290
    case M32C_OPERAND_IMM_40_HI :
1291
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1292
      break;
1293
    case M32C_OPERAND_IMM_40_QI :
1294
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1295
      break;
1296
    case M32C_OPERAND_IMM_40_SI :
1297
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1298
      break;
1299
    case M32C_OPERAND_IMM_48_HI :
1300
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1301
      break;
1302
    case M32C_OPERAND_IMM_48_QI :
1303
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1304
      break;
1305
    case M32C_OPERAND_IMM_48_SI :
1306
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1307
      break;
1308
    case M32C_OPERAND_IMM_56_HI :
1309
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1310
      break;
1311
    case M32C_OPERAND_IMM_56_QI :
1312
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1313
      break;
1314
    case M32C_OPERAND_IMM_64_HI :
1315
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1316
      break;
1317
    case M32C_OPERAND_IMM_8_HI :
1318
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1319
      break;
1320
    case M32C_OPERAND_IMM_8_QI :
1321
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1322
      break;
1323
    case M32C_OPERAND_IMM_8_S4 :
1324
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1325
      break;
1326
    case M32C_OPERAND_IMM_8_S4N :
1327
      errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4));
1328
      break;
1329
    case M32C_OPERAND_IMM_SH_12_S4 :
1330
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1331
      break;
1332
    case M32C_OPERAND_IMM_SH_20_S4 :
1333
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1334
      break;
1335
    case M32C_OPERAND_IMM_SH_8_S4 :
1336
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1337
      break;
1338
    case M32C_OPERAND_IMM1_S :
1339
      errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1340
      break;
1341
    case M32C_OPERAND_IMM3_S :
1342
      errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1343
      break;
1344
    case M32C_OPERAND_LAB_16_8 :
1345
      {
1346
        bfd_vma value = 0;
1347
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL,  & value);
1348
        fields->f_lab_16_8 = value;
1349
      }
1350
      break;
1351
    case M32C_OPERAND_LAB_24_8 :
1352
      {
1353
        bfd_vma value = 0;
1354
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL,  & value);
1355
        fields->f_lab_24_8 = value;
1356
      }
1357
      break;
1358
    case M32C_OPERAND_LAB_32_8 :
1359
      {
1360
        bfd_vma value = 0;
1361
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL,  & value);
1362
        fields->f_lab_32_8 = value;
1363
      }
1364
      break;
1365
    case M32C_OPERAND_LAB_40_8 :
1366
      {
1367
        bfd_vma value = 0;
1368
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL,  & value);
1369
        fields->f_lab_40_8 = value;
1370
      }
1371
      break;
1372
    case M32C_OPERAND_LAB_5_3 :
1373
      {
1374
        bfd_vma value = 0;
1375
        errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL,  & value);
1376
        fields->f_lab_5_3 = value;
1377
      }
1378
      break;
1379
    case M32C_OPERAND_LAB_8_16 :
1380
      {
1381
        bfd_vma value = 0;
1382
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL,  & value);
1383
        fields->f_lab_8_16 = value;
1384
      }
1385
      break;
1386
    case M32C_OPERAND_LAB_8_24 :
1387
      {
1388
        bfd_vma value = 0;
1389
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL,  & value);
1390
        fields->f_lab_8_24 = value;
1391
      }
1392
      break;
1393
    case M32C_OPERAND_LAB_8_8 :
1394
      {
1395
        bfd_vma value = 0;
1396
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL,  & value);
1397
        fields->f_lab_8_8 = value;
1398
      }
1399
      break;
1400
    case M32C_OPERAND_LAB32_JMP_S :
1401
      {
1402
        bfd_vma value = 0;
1403
        errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL,  & value);
1404
        fields->f_lab32_jmp_s = value;
1405
      }
1406
      break;
1407
    case M32C_OPERAND_Q :
1408
      errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1409
      break;
1410
    case M32C_OPERAND_R0 :
1411
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1412
      break;
1413
    case M32C_OPERAND_R0H :
1414
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1415
      break;
1416
    case M32C_OPERAND_R0L :
1417
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1418
      break;
1419
    case M32C_OPERAND_R1 :
1420
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1421
      break;
1422
    case M32C_OPERAND_R1R2R0 :
1423
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1424
      break;
1425
    case M32C_OPERAND_R2 :
1426
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1427
      break;
1428
    case M32C_OPERAND_R2R0 :
1429
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1430
      break;
1431
    case M32C_OPERAND_R3 :
1432
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1433
      break;
1434
    case M32C_OPERAND_R3R1 :
1435
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1436
      break;
1437
    case M32C_OPERAND_REGSETPOP :
1438
      errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1439
      break;
1440
    case M32C_OPERAND_REGSETPUSH :
1441
      errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1442
      break;
1443
    case M32C_OPERAND_RN16_PUSH_S :
1444
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1445
      break;
1446
    case M32C_OPERAND_S :
1447
      errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1448
      break;
1449
    case M32C_OPERAND_SRC16AN :
1450
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1451
      break;
1452
    case M32C_OPERAND_SRC16ANHI :
1453
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1454
      break;
1455
    case M32C_OPERAND_SRC16ANQI :
1456
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1457
      break;
1458
    case M32C_OPERAND_SRC16RNHI :
1459
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1460
      break;
1461
    case M32C_OPERAND_SRC16RNQI :
1462
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1463
      break;
1464
    case M32C_OPERAND_SRC32ANPREFIXED :
1465
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1466
      break;
1467
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
1468
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1469
      break;
1470
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
1471
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1472
      break;
1473
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
1474
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1475
      break;
1476
    case M32C_OPERAND_SRC32ANUNPREFIXED :
1477
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1478
      break;
1479
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1480
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1481
      break;
1482
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1483
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1484
      break;
1485
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1486
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1487
      break;
1488
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
1489
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1490
      break;
1491
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
1492
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1493
      break;
1494
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
1495
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1496
      break;
1497
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1498
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1499
      break;
1500
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1501
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1502
      break;
1503
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1504
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1505
      break;
1506
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1507
      errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1508
      break;
1509
    case M32C_OPERAND_X :
1510
      errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1511
      break;
1512
    case M32C_OPERAND_Z :
1513
      errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1514
      break;
1515
    case M32C_OPERAND_COND16_16 :
1516
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1517
      break;
1518
    case M32C_OPERAND_COND16_24 :
1519
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1520
      break;
1521
    case M32C_OPERAND_COND16_32 :
1522
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1523
      break;
1524
    case M32C_OPERAND_COND16C :
1525
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1526
      break;
1527
    case M32C_OPERAND_COND16J :
1528
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1529
      break;
1530
    case M32C_OPERAND_COND16J5 :
1531
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1532
      break;
1533
    case M32C_OPERAND_COND32 :
1534
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1535
      break;
1536
    case M32C_OPERAND_COND32_16 :
1537
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1538
      break;
1539
    case M32C_OPERAND_COND32_24 :
1540
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1541
      break;
1542
    case M32C_OPERAND_COND32_32 :
1543
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1544
      break;
1545
    case M32C_OPERAND_COND32_40 :
1546
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1547
      break;
1548
    case M32C_OPERAND_COND32J :
1549
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1550
      break;
1551
    case M32C_OPERAND_CR1_PREFIXED_32 :
1552
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1553
      break;
1554
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
1555
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1556
      break;
1557
    case M32C_OPERAND_CR16 :
1558
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1559
      break;
1560
    case M32C_OPERAND_CR2_32 :
1561
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1562
      break;
1563
    case M32C_OPERAND_CR3_PREFIXED_32 :
1564
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1565
      break;
1566
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
1567
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1568
      break;
1569
    case M32C_OPERAND_FLAGS16 :
1570
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1571
      break;
1572
    case M32C_OPERAND_FLAGS32 :
1573
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1574
      break;
1575
    case M32C_OPERAND_SCCOND32 :
1576
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1577
      break;
1578
    case M32C_OPERAND_SIZE :
1579
      errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1580
      break;
1581
 
1582
    default :
1583
      /* xgettext:c-format */
1584
      fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1585
      abort ();
1586
  }
1587
 
1588
  return errmsg;
1589
}
1590
 
1591
cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1592
{
1593
  parse_insn_normal,
1594
};
1595
 
1596
void
1597
m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1598
{
1599
  m32c_cgen_init_opcode_table (cd);
1600
  m32c_cgen_init_ibld_table (cd);
1601
  cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1602
  cd->parse_operand = m32c_cgen_parse_operand;
1603
#ifdef CGEN_ASM_INIT_HOOK
1604
CGEN_ASM_INIT_HOOK
1605
#endif
1606
}
1607
 
1608
 
1609
 
1610
/* Regex construction routine.
1611
 
1612
   This translates an opcode syntax string into a regex string,
1613
   by replacing any non-character syntax element (such as an
1614
   opcode) with the pattern '.*'
1615
 
1616
   It then compiles the regex and stores it in the opcode, for
1617
   later use by m32c_cgen_assemble_insn
1618
 
1619
   Returns NULL for success, an error message for failure.  */
1620
 
1621
char *
1622
m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1623
{
1624
  CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1625
  const char *mnem = CGEN_INSN_MNEMONIC (insn);
1626
  char rxbuf[CGEN_MAX_RX_ELEMENTS];
1627
  char *rx = rxbuf;
1628
  const CGEN_SYNTAX_CHAR_TYPE *syn;
1629
  int reg_err;
1630
 
1631
  syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1632
 
1633
  /* Mnemonics come first in the syntax string.  */
1634
  if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1635
    return _("missing mnemonic in syntax string");
1636
  ++syn;
1637
 
1638
  /* Generate a case sensitive regular expression that emulates case
1639
     insensitive matching in the "C" locale.  We cannot generate a case
1640
     insensitive regular expression because in Turkish locales, 'i' and 'I'
1641
     are not equal modulo case conversion.  */
1642
 
1643
  /* Copy the literal mnemonic out of the insn.  */
1644
  for (; *mnem; mnem++)
1645
    {
1646
      char c = *mnem;
1647
 
1648
      if (ISALPHA (c))
1649
        {
1650
          *rx++ = '[';
1651
          *rx++ = TOLOWER (c);
1652
          *rx++ = TOUPPER (c);
1653
          *rx++ = ']';
1654
        }
1655
      else
1656
        *rx++ = c;
1657
    }
1658
 
1659
  /* Copy any remaining literals from the syntax string into the rx.  */
1660
  for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1661
    {
1662
      if (CGEN_SYNTAX_CHAR_P (* syn))
1663
        {
1664
          char c = CGEN_SYNTAX_CHAR (* syn);
1665
 
1666
          switch (c)
1667
            {
1668
              /* Escape any regex metacharacters in the syntax.  */
1669
            case '.': case '[': case '\\':
1670
            case '*': case '^': case '$':
1671
 
1672
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
1673
            case '?': case '{': case '}':
1674
            case '(': case ')': case '*':
1675
            case '|': case '+': case ']':
1676
#endif
1677
              *rx++ = '\\';
1678
              *rx++ = c;
1679
              break;
1680
 
1681
            default:
1682
              if (ISALPHA (c))
1683
                {
1684
                  *rx++ = '[';
1685
                  *rx++ = TOLOWER (c);
1686
                  *rx++ = TOUPPER (c);
1687
                  *rx++ = ']';
1688
                }
1689
              else
1690
                *rx++ = c;
1691
              break;
1692
            }
1693
        }
1694
      else
1695
        {
1696
          /* Replace non-syntax fields with globs.  */
1697
          *rx++ = '.';
1698
          *rx++ = '*';
1699
        }
1700
    }
1701
 
1702
  /* Trailing whitespace ok.  */
1703
  * rx++ = '[';
1704
  * rx++ = ' ';
1705
  * rx++ = '\t';
1706
  * rx++ = ']';
1707
  * rx++ = '*';
1708
 
1709
  /* But anchor it after that.  */
1710
  * rx++ = '$';
1711
  * rx = '\0';
1712
 
1713
  CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1714
  reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1715
 
1716
  if (reg_err == 0)
1717
    return NULL;
1718
  else
1719
    {
1720
      static char msg[80];
1721
 
1722
      regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1723
      regfree ((regex_t *) CGEN_INSN_RX (insn));
1724
      free (CGEN_INSN_RX (insn));
1725
      (CGEN_INSN_RX (insn)) = NULL;
1726
      return msg;
1727
    }
1728
}
1729
 
1730
 
1731
/* Default insn parser.
1732
 
1733
   The syntax string is scanned and operands are parsed and stored in FIELDS.
1734
   Relocs are queued as we go via other callbacks.
1735
 
1736
   ??? Note that this is currently an all-or-nothing parser.  If we fail to
1737
   parse the instruction, we return 0 and the caller will start over from
1738
   the beginning.  Backtracking will be necessary in parsing subexpressions,
1739
   but that can be handled there.  Not handling backtracking here may get
1740
   expensive in the case of the m68k.  Deal with later.
1741
 
1742
   Returns NULL for success, an error message for failure.  */
1743
 
1744
static const char *
1745
parse_insn_normal (CGEN_CPU_DESC cd,
1746
                   const CGEN_INSN *insn,
1747
                   const char **strp,
1748
                   CGEN_FIELDS *fields)
1749
{
1750
  /* ??? Runtime added insns not handled yet.  */
1751
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1752
  const char *str = *strp;
1753
  const char *errmsg;
1754
  const char *p;
1755
  const CGEN_SYNTAX_CHAR_TYPE * syn;
1756
#ifdef CGEN_MNEMONIC_OPERANDS
1757
  /* FIXME: wip */
1758
  int past_opcode_p;
1759
#endif
1760
 
1761
  /* For now we assume the mnemonic is first (there are no leading operands).
1762
     We can parse it without needing to set up operand parsing.
1763
     GAS's input scrubber will ensure mnemonics are lowercase, but we may
1764
     not be called from GAS.  */
1765
  p = CGEN_INSN_MNEMONIC (insn);
1766
  while (*p && TOLOWER (*p) == TOLOWER (*str))
1767
    ++p, ++str;
1768
 
1769
  if (* p)
1770
    return _("unrecognized instruction");
1771
 
1772
#ifndef CGEN_MNEMONIC_OPERANDS
1773
  if (* str && ! ISSPACE (* str))
1774
    return _("unrecognized instruction");
1775
#endif
1776
 
1777
  CGEN_INIT_PARSE (cd);
1778
  cgen_init_parse_operand (cd);
1779
#ifdef CGEN_MNEMONIC_OPERANDS
1780
  past_opcode_p = 0;
1781
#endif
1782
 
1783
  /* We don't check for (*str != '\0') here because we want to parse
1784
     any trailing fake arguments in the syntax string.  */
1785
  syn = CGEN_SYNTAX_STRING (syntax);
1786
 
1787
  /* Mnemonics come first for now, ensure valid string.  */
1788
  if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1789
    abort ();
1790
 
1791
  ++syn;
1792
 
1793
  while (* syn != 0)
1794
    {
1795
      /* Non operand chars must match exactly.  */
1796
      if (CGEN_SYNTAX_CHAR_P (* syn))
1797
        {
1798
          /* FIXME: While we allow for non-GAS callers above, we assume the
1799
             first char after the mnemonic part is a space.  */
1800
          /* FIXME: We also take inappropriate advantage of the fact that
1801
             GAS's input scrubber will remove extraneous blanks.  */
1802
          if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1803
            {
1804
#ifdef CGEN_MNEMONIC_OPERANDS
1805
              if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1806
                past_opcode_p = 1;
1807
#endif
1808
              ++ syn;
1809
              ++ str;
1810
            }
1811
          else if (*str)
1812
            {
1813
              /* Syntax char didn't match.  Can't be this insn.  */
1814
              static char msg [80];
1815
 
1816
              /* xgettext:c-format */
1817
              sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1818
                       CGEN_SYNTAX_CHAR(*syn), *str);
1819
              return msg;
1820
            }
1821
          else
1822
            {
1823
              /* Ran out of input.  */
1824
              static char msg [80];
1825
 
1826
              /* xgettext:c-format */
1827
              sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1828
                       CGEN_SYNTAX_CHAR(*syn));
1829
              return msg;
1830
            }
1831
          continue;
1832
        }
1833
 
1834
      /* We have an operand of some sort.  */
1835
      errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1836
                                          &str, fields);
1837
      if (errmsg)
1838
        return errmsg;
1839
 
1840
      /* Done with this operand, continue with next one.  */
1841
      ++ syn;
1842
    }
1843
 
1844
  /* If we're at the end of the syntax string, we're done.  */
1845
  if (* syn == 0)
1846
    {
1847
      /* FIXME: For the moment we assume a valid `str' can only contain
1848
         blanks now.  IE: We needn't try again with a longer version of
1849
         the insn and it is assumed that longer versions of insns appear
1850
         before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
1851
      while (ISSPACE (* str))
1852
        ++ str;
1853
 
1854
      if (* str != '\0')
1855
        return _("junk at end of line"); /* FIXME: would like to include `str' */
1856
 
1857
      return NULL;
1858
    }
1859
 
1860
  /* We couldn't parse it.  */
1861
  return _("unrecognized instruction");
1862
}
1863
 
1864
/* Main entry point.
1865
   This routine is called for each instruction to be assembled.
1866
   STR points to the insn to be assembled.
1867
   We assume all necessary tables have been initialized.
1868
   The assembled instruction, less any fixups, is stored in BUF.
1869
   Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1870
   still needs to be converted to target byte order, otherwise BUF is an array
1871
   of bytes in target byte order.
1872
   The result is a pointer to the insn's entry in the opcode table,
1873
   or NULL if an error occured (an error message will have already been
1874
   printed).
1875
 
1876
   Note that when processing (non-alias) macro-insns,
1877
   this function recurses.
1878
 
1879
   ??? It's possible to make this cpu-independent.
1880
   One would have to deal with a few minor things.
1881
   At this point in time doing so would be more of a curiosity than useful
1882
   [for example this file isn't _that_ big], but keeping the possibility in
1883
   mind helps keep the design clean.  */
1884
 
1885
const CGEN_INSN *
1886
m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1887
                           const char *str,
1888
                           CGEN_FIELDS *fields,
1889
                           CGEN_INSN_BYTES_PTR buf,
1890
                           char **errmsg)
1891
{
1892
  const char *start;
1893
  CGEN_INSN_LIST *ilist;
1894
  const char *parse_errmsg = NULL;
1895
  const char *insert_errmsg = NULL;
1896
  int recognized_mnemonic = 0;
1897
 
1898
  /* Skip leading white space.  */
1899
  while (ISSPACE (* str))
1900
    ++ str;
1901
 
1902
  /* The instructions are stored in hashed lists.
1903
     Get the first in the list.  */
1904
  ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1905
 
1906
  /* Keep looking until we find a match.  */
1907
  start = str;
1908
  for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1909
    {
1910
      const CGEN_INSN *insn = ilist->insn;
1911
      recognized_mnemonic = 1;
1912
 
1913
#ifdef CGEN_VALIDATE_INSN_SUPPORTED 
1914
      /* Not usually needed as unsupported opcodes
1915
         shouldn't be in the hash lists.  */
1916
      /* Is this insn supported by the selected cpu?  */
1917
      if (! m32c_cgen_insn_supported (cd, insn))
1918
        continue;
1919
#endif
1920
      /* If the RELAXED attribute is set, this is an insn that shouldn't be
1921
         chosen immediately.  Instead, it is used during assembler/linker
1922
         relaxation if possible.  */
1923
      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1924
        continue;
1925
 
1926
      str = start;
1927
 
1928
      /* Skip this insn if str doesn't look right lexically.  */
1929
      if (CGEN_INSN_RX (insn) != NULL &&
1930
          regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1931
        continue;
1932
 
1933
      /* Allow parse/insert handlers to obtain length of insn.  */
1934
      CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1935
 
1936
      parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1937
      if (parse_errmsg != NULL)
1938
        continue;
1939
 
1940
      /* ??? 0 is passed for `pc'.  */
1941
      insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1942
                                                 (bfd_vma) 0);
1943
      if (insert_errmsg != NULL)
1944
        continue;
1945
 
1946
      /* It is up to the caller to actually output the insn and any
1947
         queued relocs.  */
1948
      return insn;
1949
    }
1950
 
1951
  {
1952
    static char errbuf[150];
1953
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1954
    const char *tmp_errmsg;
1955
 
1956
    /* If requesting verbose error messages, use insert_errmsg.
1957
       Failing that, use parse_errmsg.  */
1958
    tmp_errmsg = (insert_errmsg ? insert_errmsg :
1959
                  parse_errmsg ? parse_errmsg :
1960
                  recognized_mnemonic ?
1961
                  _("unrecognized form of instruction") :
1962
                  _("unrecognized instruction"));
1963
 
1964
    if (strlen (start) > 50)
1965
      /* xgettext:c-format */
1966
      sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1967
    else
1968
      /* xgettext:c-format */
1969
      sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1970
#else
1971
    if (strlen (start) > 50)
1972
      /* xgettext:c-format */
1973
      sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1974
    else
1975
      /* xgettext:c-format */
1976
      sprintf (errbuf, _("bad instruction `%.50s'"), start);
1977
#endif
1978
 
1979
    *errmsg = errbuf;
1980
    return NULL;
1981
  }
1982
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.