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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [arm/] [tconfig.in] - Blame information for rev 421

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/* ARM target configuration file.  */
 
/* Define this if the simulator supports profiling.
   See the mips simulator for an example.
   This enables the `-p foo' and `-s bar' options.
   The target is required to provide sim_set_profile{,_size}.  */
/* #define SIM_HAVE_PROFILE */
 
/* Define this if the simulator uses an instruction cache.
   See the h8/300 simulator for an example.
   This enables the `-c size' option to set the size of the cache.
   The target is required to provide sim_set_simcache_size.  */
/* #define SIM_HAVE_SIMCACHE */
 
/* Define this if the target cpu is bi-endian
   and the simulator supports it.  */
#define SIM_HAVE_BIENDIAN

Line No.	Rev	Author	Line
1	227	jeremybenn	`/* ARM target configuration file. */`
2
3			`/* Define this if the simulator supports profiling.`
4			`See the mips simulator for an example.`
5			This enables the `-p foo' and `-s bar' options.
6			`The target is required to provide sim_set_profile{,_size}. */`
7			`/* #define SIM_HAVE_PROFILE */`
8
9			`/* Define this if the simulator uses an instruction cache.`
10			`See the h8/300 simulator for an example.`
11			This enables the `-c size' option to set the size of the cache.
12			`The target is required to provide sim_set_simcache_size. */`
13			`/* #define SIM_HAVE_SIMCACHE */`
14
15			`/* Define this if the target cpu is bi-endian`
16			`and the simulator supports it. */`
17			`#define SIM_HAVE_BIENDIAN`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [arm/] [tconfig.in] - Blame information for rev 421