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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [common/] [cgen-scache.h] - Blame information for rev 227

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1 227 jeremybenn
/* Simulator header for cgen scache support.
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   Copyright (C) 1998, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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   Contributed by Cygnus Solutions.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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#ifndef CGEN_SCACHE_H
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#define CGEN_SCACHE_H
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#ifndef WITH_SCACHE
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#define WITH_SCACHE 0
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#endif
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/* When caching bb's, instructions are extracted into "chains".
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   SCACHE_MAP is a hash table into these chains.  */
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typedef struct {
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  IADDR pc;
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  SCACHE *sc;
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} SCACHE_MAP;
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typedef struct cpu_scache {
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  /* Simulator cache size.  Must be a power of 2.
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     This is the number of elements in the `cache' member.  */
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  unsigned int size;
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#define CPU_SCACHE_SIZE(cpu) ((cpu) -> cgen_cpu.scache.size)
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  /* The cache.  */
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  SCACHE *cache;
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#define CPU_SCACHE_CACHE(cpu) ((cpu) -> cgen_cpu.scache.cache)
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#if WITH_SCACHE_PBB
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  /* Number of hash chains.  Must be a power of 2.  */
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  unsigned int num_hash_chains;
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#define CPU_SCACHE_NUM_HASH_CHAINS(cpu) ((cpu) -> cgen_cpu.scache.num_hash_chains)
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  /* Number of entries in each hash chain.
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     The hash table is a statically allocated NxM array where
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     N = num_hash_chains
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     M = num_hash_chain_entries.  */
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  unsigned int num_hash_chain_entries;
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#define CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES(cpu) ((cpu) -> cgen_cpu.scache.num_hash_chain_entries)
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  /* Maximum number of instructions in a chain.
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     ??? This just let's us set a static size of chain_lengths table.
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     In a simulation that handles more than just the cpu, this might also be
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     used to keep too many instructions from being executed before checking
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     for events (or some such).  */
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  unsigned int max_chain_length;
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#define CPU_SCACHE_MAX_CHAIN_LENGTH(cpu) ((cpu) -> cgen_cpu.scache.max_chain_length)
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  /* Special scache entry for (re)starting bb extraction.  */
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  SCACHE *pbb_begin;
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#define CPU_SCACHE_PBB_BEGIN(cpu) ((cpu) -> cgen_cpu.scache.pbb_begin)
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  /* Hash table into cached chains.  */
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  SCACHE_MAP *hash_table;
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#define CPU_SCACHE_HASH_TABLE(cpu) ((cpu) -> cgen_cpu.scache.hash_table)
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  /* Next free entry in cache.  */
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  SCACHE *next_free;
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#define CPU_SCACHE_NEXT_FREE(cpu) ((cpu) -> cgen_cpu.scache.next_free)
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  /* Kind of branch being taken.
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     Only used by functional semantics, not switch form.  */
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  SEM_BRANCH_TYPE pbb_br_type;
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#define CPU_PBB_BR_TYPE(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_type)
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  /* Target's branch address.  */
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  IADDR pbb_br_npc;
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#define CPU_PBB_BR_NPC(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_npc)
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#endif /* WITH_SCACHE_PBB */
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#if WITH_PROFILE_SCACHE_P
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  /* Cache hits, misses.  */
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  unsigned long hits, misses;
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#define CPU_SCACHE_HITS(cpu) ((cpu) -> cgen_cpu.scache.hits)
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#define CPU_SCACHE_MISSES(cpu) ((cpu) -> cgen_cpu.scache.misses)
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#if WITH_SCACHE_PBB
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  /* Chain length counts.
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     Each element is a count of the number of chains created with that
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     length.  */
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  unsigned long *chain_lengths;
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#define CPU_SCACHE_CHAIN_LENGTHS(cpu) ((cpu) -> cgen_cpu.scache.chain_lengths)
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  /* Number of times cache was flushed due to its being full.  */
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  unsigned long full_flushes;
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#define CPU_SCACHE_FULL_FLUSHES(cpu) ((cpu) -> cgen_cpu.scache.full_flushes)
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#endif
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#endif
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} CPU_SCACHE;
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/* Hash a PC value.
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   This is split into two parts to help with moving as much of the
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   computation out of the main loop.  */
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#define CPU_SCACHE_HASH_MASK(cpu) (CPU_SCACHE_SIZE (cpu) - 1)
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#define SCACHE_HASH_PC(pc, mask) \
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((CGEN_MIN_INSN_SIZE == 2 ? ((pc) >> 1) \
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  : CGEN_MIN_INSN_SIZE == 4 ? ((pc) >> 2) \
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  : (pc)) \
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 & (mask))
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/* Non-zero if cache is in use.  */
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#define USING_SCACHE_P(sd) (STATE_SCACHE_SIZE (sd) > 0)
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/* Install the simulator cache into the simulator.  */
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MODULE_INSTALL_FN scache_install;
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/* Lookup a PC value in the scache [compilation only].  */
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extern SCACHE * scache_lookup (SIM_CPU *, IADDR);
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/* Return a pointer to at least N buffers.  */
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extern SCACHE *scache_lookup_or_alloc (SIM_CPU *, IADDR, int, SCACHE **);
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/* Flush all cpu's scaches.  */
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extern void scache_flush (SIM_DESC);
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/* Flush a cpu's scache.  */
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extern void scache_flush_cpu (SIM_CPU *);
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/* Scache profiling support.  */
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/* Print summary scache usage information.  */
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extern void scache_print_profile (SIM_CPU *cpu, int verbose);
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#if WITH_PROFILE_SCACHE_P
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#define PROFILE_COUNT_SCACHE_HIT(cpu) \
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do { \
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  if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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    ++ CPU_SCACHE_HITS (cpu); \
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} while (0)
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#define PROFILE_COUNT_SCACHE_MISS(cpu) \
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do { \
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  if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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    ++ CPU_SCACHE_MISSES (cpu); \
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} while (0)
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#define PROFILE_COUNT_SCACHE_CHAIN_LENGTH(cpu,length) \
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do { \
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  if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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    ++ CPU_SCACHE_CHAIN_LENGTHS (cpu) [length]; \
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} while (0)
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#define PROFILE_COUNT_SCACHE_FULL_FLUSH(cpu) \
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do { \
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  if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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    ++ CPU_SCACHE_FULL_FLUSHES (cpu); \
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} while (0)
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#else
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#define PROFILE_COUNT_SCACHE_HIT(cpu)
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#define PROFILE_COUNT_SCACHE_MISS(cpu)
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#define PROFILE_COUNT_SCACHE_CHAIN_LENGTH(cpu,length)
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#define PROFILE_COUNT_SCACHE_FULL_FLUSH(cpu)
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#endif
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#endif /* CGEN_SCACHE_H */

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