OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [common/] [dv-sockser.h] - Blame information for rev 300

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* Serial port emulation via sockets.
2
   Copyright (C) 1998, Free Software Foundation, Inc.
3
 
4
This file is part of the GNU simulators.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 3 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
18
 
19
#ifndef DV_SOCKSER_H
20
#define DV_SOCKSER_H
21
 
22
/* bits in result of dev_sockser_status */
23
#define DV_SOCKSER_INPUT_EMPTY  1
24
#define DV_SOCKSER_OUTPUT_EMPTY 2
25
 
26
/* FIXME: later add a device ptr arg */
27
extern int dv_sockser_status (SIM_DESC);
28
int dv_sockser_write (SIM_DESC, unsigned char);
29
int dv_sockser_read (SIM_DESC);
30
 
31
#endif /* DV_SOCKSER_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.